Re: [U-Boot] [PATCH] MIPS: Add initial support for EMMA3SL/LP

2012-04-03 Thread Shinya Kuribayashi
On Sun, Apr 1, 2012 at 4:40 AM, Marek Vasut marek.va...@gmail.com wrote:
 This patch adds initial support for EMMA3SL/LP board.
 Network and USB support will be added as follow up patches.

 Signed-off-by: Serge Ziryukin ftrvxm...@gmail.com

 Would you care to resubmit updated version of this patch please? Or shall I
 discard it?

This was posted by mistake, he was not allowed to make it public.  Also we
(Renesas) have no intention of mainlining it at the moment.

Please discard it.  I would give an official NACK, if necessary.

  Shinya
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Re: [U-Boot] [PATCH 0/3] MIPS: fixes for 2012.04-rc1

2012-04-03 Thread Shinya Kuribayashi
 this series collects the bugfix patches from the open patches at patchwork
 delegated to you. Only these patches should be merged for the release.
 The other patches are superseeded for now.

 The series is rebased against v2012.04-rc1 and needs your patch
 http://patchwork.ozlabs.org/patch/149924/ to run MAKEALL -a mips.

 Shinya-san, you ok with these patches hitting .04?

Suggestions/comments from Mike to the last submission are not reflected in
[PATCH 2/3] (MIPS: fix inconsistency in config option for cache operation mode),
but other than that these three patches are Ok with me.

 I'll roll then through my -staging if it's fine.

Thanks in advance, I don't have enough bandwidth to catch up with the latest
tree/discussion, nor doing build tests and/or boot tests.
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Re: [U-Boot] [PATCH 2/3] MIPS: fix inconsistency in config option for cache operation mode

2012-04-03 Thread Shinya Kuribayashi
On Wed, Apr 4, 2012 at 1:09 AM, Marek Vasut ma...@denx.de wrote:
 I only changed start.S and forgot to change this code part too. That is why
 I created this patch to fix this inconsistency.

 I see ... so this fixes some other commit. What was Shinya-san's concern, that
 you only changed this file?

On Wed, Apr 4, 2012 at 5:33 AM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 03 April 2012 09:40:08 Marek Vasut wrote:
 Mike, there was some issue with this patch?

 i had feedback on the endian flags last time Daniel posted it, but i don't
 think i ever gave feedback on this ... i certainly don't know mips asm beyond
 the extreme basics ;).

Apologies for confusing, I intended to refer to PATCH 3/3, not 2/3.
If everybody is Ok with 3/3 as-is, I'm fine.

  Shinya
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Re: [U-Boot] [PATCH] MIPS: fix endianess handling

2011-12-04 Thread Shinya Kuribayashi

On 12/4/11 9:02 PM, Daniel Schwierzeck wrote:

diff --git a/boards.cfg b/boards.cfg
index c83d861..2cd917e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -324,13 +324,13 @@ dbau1000 mipsmips32  
dbau1x00-
   dbau1100 mipsmips32  dbau1x00-   
   au1x00  dbau1x00:DBAU1100
   dbau1500 mipsmips32  dbau1x00-   
   au1x00  dbau1x00:DBAU1500
   dbau1550 mipsmips32  dbau1x00-   
   au1x00  dbau1x00:DBAU1550
-dbau1550_el  mipsmips32  dbau1x00- 
 au1x00  dbau1x00:DBAU1550
+dbau1550_el  mipsmips32  dbau1x00- 
 au1x00  dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN


This looks Ok.


   gth2 mipsmips32  -   -   
   au1x00
   incaip   mipsmips32  incaip  -   
   incaip
   incaip_100MHzmipsmips32  incaip  -   
   incaip  incaip:CPU_CLOCK_RATE=1
   incaip_133MHzmipsmips32  incaip  -   
   incaip  incaip:CPU_CLOCK_RATE=13300
   incaip_150MHzmipsmips32  incaip  -   
   incaip  incaip:CPU_CLOCK_RATE=15000
-pb1000   mipsmips32  pb1x00  - 
 au1x00  pb1x00:PB1000
+pb1000   mipsmips32  pb1x00  - 
 au1x00  pb1x00:PB1000,SYS_LITTLE_ENDIAN
   qemu_mipsmipsmips32  qemu-mips   -   
   -   qemu-mips
   tb0229   mipsmips32
   vct_premium  mipsmips32  vct 
micronas   -   vct:VCT_PREMIUM


But I don't see any reason CONFIG_SYS_LITTLE_ENDIAN is specified in
boards.cfg.  Just putting it in configs/pb1000.h is enough, isn't it?


Shinya, do you have an opinion about this?


No, if it works for you, I'm fine.  Thanks for tackling this issue.
Does anyone disagree with this change?  If not, I'll pick this up.


diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile
index e23865b..eab23b4 100644
--- a/examples/standalone/Makefile
+++ b/examples/standalone/Makefile
@@ -88,6 +88,10 @@ endif
   CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder)
   CFLAGS += $(CFLAGS_NTR)

+# Pass through endianess settings in LDFLAGS to LD


s/endianess/endianness/


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Re: [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems

2011-11-28 Thread Shinya Kuribayashi

On 11/24/11 10:57 PM, Daniel Schwierzeck wrote:

diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 9c1b2f7..b6cb4be 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -224,6 +224,14 @@ reset:

setup_c0_status_reset

+   /* Set all slave CPUs in sleep mode */
+#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP
+   mfc0k0, CP0_EBASE
+   and k0, EBASEF_CPUNUM
+   bne k0, zero, slave_cpu_sleep
+nop
+#endif
+
/* Init Timer */
mtc0zero, CP0_COUNT
mtc0zero, CP0_COMPARE


Just wondered, why is this conditionally selected?  To save text size,
or other reason?

The change looks Ok with s/MPS/MIPS/ typo fixed as pointed by Andrew.
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Re: [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores

2011-11-28 Thread Shinya Kuribayashi

On 11/24/11 10:57 PM, Daniel Schwierzeck wrote:

@@ -206,11 +206,28 @@ _start:
RVECENT(romReserved,125)
RVECENT(romReserved,126)
RVECENT(romReserved,127)
+   XVECENT(romExcHandle,0x400);
+   RVECENT(romReserved,129);
+   RVECENT(romReserved,130);
+   RVECENT(romReserved,131);
+   RVECENT(romReserved,132);
+   RVECENT(romReserved,133);
+   RVECENT(romReserved,134);
+   RVECENT(romReserved,135);
+   RVECENT(romReserved,136);
+   RVECENT(romReserved,137);
+   RVECENT(romReserved,138);
+   RVECENT(romReserved,139);
+   RVECENT(romReserved,140);
+   RVECENT(romReserved,141);
+   RVECENT(romReserved,142);
+   RVECENT(romReserved,143);
+   XVECENT(romExcHandle,0x480);# bfc00480: EJTAG debug exception

/*
 * We hope there are no more reserved vectors!
-* 128 * 8 == 1024 == 0x400
-* so this is address R_VEC+0x400 == 0xbfc00400
+* 144 * 8 == 1152 == 0x480
+* so this is address R_VEC+0x480 == 0xbfc00480
 */
.align 4
  reset:


IIUC those exception vectors of +0x400/+0x480 have nothing to do with
24K processor core nor 34K either.

The change itself is Ok, and any other version taking Marek's comment
into account is also welcome.

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[U-Boot] [PATCH v8 0/3] those series patches for add ben nanonote board

2011-10-12 Thread Shinya Kuribayashi
Hi,

v8
--

Fix all checkpatch errors/warnings except for known false positives.
I'll make a pull-request shortly.

 total: 0 errors, 0 warnings, 2105 lines checked
 
 jz4740-v8/0001-MIPS-Ingenic-XBurst-Jz4740-processor-support.patch has no 
 obvious style problems and is ready for submission.
 WARNING: Use #include linux/io.h instead of asm/io.h
 #69: FILE: drivers/mtd/nand/jz4740_nand.c:15:
 +#include asm/io.h
 
 total: 0 errors, 1 warnings, 268 lines checked
 
 jz4740-v8/0002-MIPS-Jz4740-Add-NAND-driver.patch has style problems, please 
 review.
 
 If any of these errors are false positives, please report
 them to the maintainer, see CHECKPATCH in MAINTAINERS.
 WARNING: Use #include linux/io.h instead of asm/io.h
 #194: FILE: board/qi/qi_lb60/qi_lb60.c:11:
 +#include asm/io.h
 
 WARNING: line over 80 characters
 #407: FILE: include/configs/qi_lb60.h:35:
 +#define CONFIG_BOOTARGS  mem=32M console=tty0 
 console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait
 
 total: 0 errors, 2 warnings, 479 lines checked
 
 jz4740-v8/0003-MIPS-Jz4740-Add-qi_lb60-board-support.patch has style 
 problems, please review.
 
 If any of these errors are false positives, please report
 them to the maintainer, see CHECKPATCH in MAINTAINERS.

v7
--
Here's seventh patchset for Ben NanoNote initial support.  I've been
working with Xiangfu past six months to polish v6 patches.  We have
addressed all comments from Wolfgang and Scott so far, drop nand_spl
and USB_boot functions to make the initial bring-up minimum and simple.

I think the patchset is now in good shape, so will merge and make a
pull-request during this merge window.  Please give it a final review
and if something to fix, please let us know.

Scott and Wolfgang, I know NAND land changes should go through Scott's
tree, but the NAND driver is part of the initial support.  May I take
it through MIPS tree?  Hope it's Ok with you.

Changes since v6 patchset are described in each patch.

  Shinya

--- 8 ---
Boilerplate from Xiangfu Liu:

  those patches are for add xburst jz4740 base file and Ben NanoNote
  (codename qi_lb60) to U-Boot
  
some info about xburst jz4740:
  the xburst jz4740 is recently added to linux 2.6.36
  and it's support the device Ben NanoNote out of box,

  this xburst jz4740 cpu have one feature is Boot From USB, there is a 
  small rom in jz4740, but LOW some PIN, the cpu will boot to this small
  rom, then init cpu and USB module, then we can send 8KB bin file to 
  the cpu by USB(by using 'xbboot' or 'usbboot'[1]).

  which means if your bootloader is borken,(the first few KBs in NAND)
  you can always boot the device from usb, then reflash the nand.

  in OpenMoko FreeRunner, there are NOR and NAND. when people broken the 
  nand bootloader, it's must boot from NOR, reflash the bootloader back
  when people broken the NAND and NOR, he(she) must reflash by using JTAG
  but in Ben NanoNote, we just need boot from usb. flash the nand again :)

  BTW:there are a lot of PMP, Audio device in China use the Xburst cpu,
  but I think they are all base on u-boot 1.1.6. by working on
  Ben NanoNote (http://en.qi-hardware.com) one year, we try to
  update the u-boot to last version and send it to upstream. :)

  for more info about Ingenic Xburst JZ4740
http://www.ingenic.cn/eng/default.aspx
http://www.linux-mips.org/wiki/Ingenic

Xiangfu Liu (3):
  MIPS: Ingenic XBurst Jz4740 processor support
  MIPS: Jz4740: Add NAND driver
  MIPS: Jz4740: Add qi_lb60 board support

 MAINTAINERS |4 +
 MAKEALL |4 +-
 README  |1 +
 arch/mips/cpu/xburst/Makefile   |   49 ++
 arch/mips/cpu/xburst/config.mk  |   24 +
 arch/mips/cpu/xburst/cpu.c  |  152 +
 arch/mips/cpu/xburst/jz4740.c   |  248 
 arch/mips/cpu/xburst/jz_serial.c|  114 
 arch/mips/cpu/xburst/start.S|  171 ++
 arch/mips/cpu/xburst/timer.c|  162 +
 arch/mips/include/asm/global_data.h |   11 +
 arch/mips/include/asm/jz4740.h  | 1150 +++
 board/qi/qi_lb60/Makefile   |   45 ++
 board/qi/qi_lb60/config.mk  |   31 +
 board/qi/qi_lb60/qi_lb60.c  |  104 
 board/qi/qi_lb60/u-boot.lds |   61 ++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/jz4740_nand.c  |  261 
 include/configs/qi_lb60.h   |  211 +++
 20 files changed, 2804 insertions(+), 1 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/Makefile
 create mode 100644 arch/mips/cpu/xburst/config.mk
 create mode 100644 arch/mips/cpu/xburst/cpu.c
 create mode 100644 arch/mips/cpu/xburst/jz4740.c
 create mode 100644 arch/mips/cpu/xburst/jz_serial.c
 create mode 100644 arch/mips/cpu/xburst/start.S
 create mode 100644 arch/mips/cpu/xburst/timer.c
 create mode 100644 arch/mips/include/asm/jz4740.h
 create mode 

[U-Boot] [PATCH v8 2/3] MIPS: Jz4740: Add NAND driver

2011-10-12 Thread Shinya Kuribayashi
From: Xiangfu Liu xian...@openmobilefree.net
Date: Wed, 12 Oct 2011 12:24:06 +0800

Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices

nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.

Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
Changes since v7:

* Fix checkpatch errors/warnings

Changes since v6:

* Remove NAND-boot stuff.  Those bits will be submitted as a nand-spl
  support once this Jz4740 base support is merged.

* All previous comments from Scott are fixed.

* Bunch of coding style issues fixed.

 drivers/mtd/nand/Makefile  |1 +
 drivers/mtd/nand/jz4740_nand.c |  261 
 2 files changed, 262 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/jz4740_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index dae2442..1eeba5c 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -45,6 +45,7 @@ COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
 COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
 COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
 COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
new file mode 100644
index 000..3ec34f3
--- /dev/null
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -0,0 +1,261 @@
+/*
+ * Platform independend driver for JZ4740.
+ *
+ * Copyright (c) 2007 Ingenic Semiconductor Inc.
+ * Author: jl...@ingenic.cn
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+#include common.h
+
+#include nand.h
+#include asm/io.h
+#include asm/jz4740.h
+
+#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB800)
+#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
+#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x1)
+
+#define BIT(x) (1  (x))
+#define JZ_NAND_ECC_CTRL_ENCODING  BIT(3)
+#define JZ_NAND_ECC_CTRL_RSBIT(2)
+#define JZ_NAND_ECC_CTRL_RESET BIT(1)
+#define JZ_NAND_ECC_CTRL_ENABLEBIT(0)
+
+#define EMC_SMCR1_OPT_NAND 0x094c4400
+/* Optimize the timing of nand */
+
+static struct jz4740_emc * emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
+
+static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
+   .eccbytes = 72,
+   .eccpos = {
+   12, 13, 14, 15, 16, 17, 18, 19,
+   20, 21, 22, 23, 24, 25, 26, 27,
+   28, 29, 30, 31, 32, 33, 34, 35,
+   36, 37, 38, 39, 40, 41, 42, 43,
+   44, 45, 46, 47, 48, 49, 50, 51,
+   52, 53, 54, 55, 56, 57, 58, 59,
+   60, 61, 62, 63, 64, 65, 66, 67,
+   68, 69, 70, 71, 72, 73, 74, 75,
+   76, 77, 78, 79, 80, 81, 82, 83 },
+   .oobfree = {
+   {.offset = 2,
+.length = 10 },
+   {.offset = 84,
+.length = 44 } }
+};
+
+static int is_reading;
+
+static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+   struct nand_chip *this = mtd-priv;
+   uint32_t reg;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = JZ_NAND_ADDR_ADDR;
+   else if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = JZ_NAND_CMD_ADDR;
+   else
+   this-IO_ADDR_W = JZ_NAND_DATA_ADDR;
+
+   reg = readl(emc-nfcsr);
+   if (ctrl  NAND_NCE)
+   reg |= EMC_NFCSR_NFCE1;
+   else
+   reg = ~EMC_NFCSR_NFCE1;
+   writel(reg, emc-nfcsr);
+   }
+
+   if (cmd != NAND_CMD_NONE)
+   writeb(cmd, this-IO_ADDR_W);
+}
+
+static int jz_nand_device_ready(struct mtd_info *mtd)
+{
+   return (readl(GPIO_PXPIN(2))  0x4000) ? 1 : 0;
+}
+
+void board_nand_select_device(struct nand_chip *nand, int chip)
+{
+   /*
+* Don't use chip to address the NAND device,
+* generate the cs from the address where it is encoded.
+*/
+}
+
+static int jz_nand_rs_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+   u_char *ecc_code)
+{
+   uint32_t status;
+   int i;
+
+   if (is_reading)
+   return 0;
+
+   do {
+   status = readl(emc-nfints);
+   } while (!(status  EMC_NFINTS_ENCF

[U-Boot] [PATCH v8 3/3] MIPS: Jz4740: Add qi_lb60 board support

2011-10-12 Thread Shinya Kuribayashi
From: Xiangfu Liu xian...@openmobilefree.net
Date: Wed, 12 Oct 2011 12:24:06 +0800

Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device
from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot.
The initial bring-up assumes that U-Boot is directly loaded into SDRAM
using USB boot tool, and starts from 0x8010.

About USB boot tool
---

Jz4740 is one of the XBurst processors with USB boot functionality
supported.  The CPU can boot from a small ROM in the LSI, initialize
CPU and USB module, then wait for USB commands from the USB host.
We can send 8 KB binary data to the CPU cache using USB boot tool.

USB boot tool is available to the public at Ingenic website.  Also
there is an alternative Debian package named xburst-tools.

Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
Changes since v7:

* Fix checkpatch errors/warnings

Changes since v6:

* nanonote.h config files is folded into qi_lb60.h

* Following configs are deleted:
  CONFIG_SYS_64BIT_VSPRINTF
  CONFIG_NANDBOOT_CFG
  CONFIG_QI_LB60

 MAINTAINERS |4 +
 MAKEALL |4 +-
 board/qi/qi_lb60/Makefile   |   45 +
 board/qi/qi_lb60/config.mk  |   31 +++
 board/qi/qi_lb60/qi_lb60.c  |  104 +
 board/qi/qi_lb60/u-boot.lds |   61 +
 boards.cfg  |1 +
 include/configs/qi_lb60.h   |  211 +++
 8 files changed, 460 insertions(+), 1 deletions(-)
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 include/configs/qi_lb60.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 3ab38fa..bb95e6d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -928,6 +928,10 @@ Stefan Roese s...@denx.de
 
vct_xxx MIPS32 4Kc
 
+Xiangfu Liu xian...@openmobilefree.net
+
+   qi_lb60 MIPS32 (XBurst Jz4740 SoC)
+
 #
 # Nios-II Systems: #
 #  #
diff --git a/MAKEALL b/MAKEALL
index 52bc355..f582f8b 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -400,7 +400,9 @@ LIST_mips= \
 ## MIPS Systems(little endian)
 #
 
-LIST_mips4kc_el=
+LIST_mips4kc_el=  \
+   qi_lb60 \
+
 
 LIST_mips5kc_el=
 
diff --git a/board/qi/qi_lb60/Makefile b/board/qi/qi_lb60/Makefile
new file mode 100644
index 000..2f5b4be
--- /dev/null
+++ b/board/qi/qi_lb60/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2006
+# Ingenic Semiconductor, jl...@ingenic.cn
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := $(BOARD).o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/qi/qi_lb60/config.mk b/board/qi/qi_lb60/config.mk
new file mode 100644
index 000..858e6a2
--- /dev/null
+++ b/board/qi/qi_lb60/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2006 Qi Hardware, Inc.
+# Author: Xiangfu Liu xiangf...@gmail.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope

[U-Boot] [GIT PULL] MIPS patch

2011-10-12 Thread Shinya Kuribayashi
Hi Wolfgang,

please pull the following patchset from Xiangfu introducing NanoNote
initial support.  The device is one of most easy-to-get MIPS devices
and active people and communities are there in the world.  The Linux
kernel also has been supporting it since v2.6.36.  It's about time to
support in U-Boot.

  Shinya


The following changes since commit 0841ca90f22d73b0ea4642ef1ce33d879bb2f3ff:

  arm920t/s3c24x0/usb_ohci.c: fix warning: variable ... set but not used 
(2011-10-09 23:24:50 +0200)

are available in the git repository at:
  git://git.denx.de/u-boot-mips.git master

Xiangfu Liu (3):
  MIPS: Ingenic XBurst Jz4740 processor support
  MIPS: Jz4740: Add NAND driver
  MIPS: Jz4740: Add qi_lb60 board support

 MAINTAINERS |4 +
 MAKEALL |4 +-
 README  |1 +
 arch/mips/cpu/xburst/Makefile   |   49 ++
 arch/mips/cpu/xburst/config.mk  |   24 +
 arch/mips/cpu/xburst/cpu.c  |  152 +
 arch/mips/cpu/xburst/jz4740.c   |  248 
 arch/mips/cpu/xburst/jz_serial.c|  114 
 arch/mips/cpu/xburst/start.S|  171 ++
 arch/mips/cpu/xburst/timer.c|  162 +
 arch/mips/include/asm/global_data.h |   11 +
 arch/mips/include/asm/jz4740.h  | 1150 +++
 board/qi/qi_lb60/Makefile   |   45 ++
 board/qi/qi_lb60/config.mk  |   31 +
 board/qi/qi_lb60/qi_lb60.c  |  104 
 board/qi/qi_lb60/u-boot.lds |   61 ++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/jz4740_nand.c  |  261 
 include/configs/qi_lb60.h   |  211 +++
 20 files changed, 2804 insertions(+), 1 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/Makefile
 create mode 100644 arch/mips/cpu/xburst/config.mk
 create mode 100644 arch/mips/cpu/xburst/cpu.c
 create mode 100644 arch/mips/cpu/xburst/jz4740.c
 create mode 100644 arch/mips/cpu/xburst/jz_serial.c
 create mode 100644 arch/mips/cpu/xburst/start.S
 create mode 100644 arch/mips/cpu/xburst/timer.c
 create mode 100644 arch/mips/include/asm/jz4740.h
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 drivers/mtd/nand/jz4740_nand.c
 create mode 100644 include/configs/qi_lb60.h
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[U-Boot] [PATCH v7 0/3] those series patches for add ben nanonote board

2011-10-02 Thread Shinya Kuribayashi
Hi,

Here's seventh patchset for Ben NanoNote initial support.  I've been
working with Xiangfu past six months to polish v6 patches.  We have
addressed all comments from Wolfgang and Scott so far, drop nand_spl
and USB_boot functions to make the initial bring-up minimum and simple.

I think the patchset is now in good shape, so will merge and make a
pull-request during this merge window.  Please give it a final review
and if something to fix, please let us know.

Scott and Wolfgang, I know NAND land changes should go through Scott's
tree, but the NAND driver is part of the initial support.  May I take
it through MIPS tree?  Hope it's Ok with you.

Changes since v6 patchset are described in each patch.

  Shinya

--- 8 ---
Boilerplate from Xiangfu Liu:

  those patches are for add xburst jz4740 base file and Ben NanoNote
  (codename qi_lb60) to U-Boot
  
some info about xburst jz4740:
  the xburst jz4740 is recently added to linux 2.6.36
  and it's support the device Ben NanoNote out of box,

  this xburst jz4740 cpu have one feature is Boot From USB, there is a 
  small rom in jz4740, but LOW some PIN, the cpu will boot to this small
  rom, then init cpu and USB module, then we can send 8KB bin file to 
  the cpu by USB(by using 'xbboot' or 'usbboot'[1]).

  which means if your bootloader is borken,(the first few KBs in NAND)
  you can always boot the device from usb, then reflash the nand.

  in OpenMoko FreeRunner, there are NOR and NAND. when people broken the 
  nand bootloader, it's must boot from NOR, reflash the bootloader back
  when people broken the NAND and NOR, he(she) must reflash by using JTAG
  but in Ben NanoNote, we just need boot from usb. flash the nand again :)

  BTW:there are a lot of PMP, Audio device in China use the Xburst cpu,
  but I think they are all base on u-boot 1.1.6. by working on
  Ben NanoNote (http://en.qi-hardware.com) one year, we try to
  update the u-boot to last version and send it to upstream. :)

  for more info about Ingenic Xburst JZ4740
http://www.ingenic.cn/eng/default.aspx
http://www.linux-mips.org/wiki/Ingenic

Xiangfu Liu (3):
  MIPS: Ingenic XBurst Jz4740 processor support
  MIPS: Jz4740: Add NAND driver
  MIPS: JZ4740: Add qi_lb60 board support

 MAINTAINERS |4 +
 MAKEALL |4 +-
 README  |1 +
 arch/mips/cpu/xburst/Makefile   |   49 ++
 arch/mips/cpu/xburst/config.mk  |   24 +
 arch/mips/cpu/xburst/cpu.c  |  152 +
 arch/mips/cpu/xburst/jz4740.c   |  248 
 arch/mips/cpu/xburst/jz_serial.c|  114 
 arch/mips/cpu/xburst/start.S|  171 ++
 arch/mips/cpu/xburst/timer.c|  169 ++
 arch/mips/include/asm/global_data.h |   11 +
 arch/mips/include/asm/jz4740.h  | 1115 +++
 board/qi/qi_lb60/Makefile   |   45 ++
 board/qi/qi_lb60/config.mk  |   31 +
 board/qi/qi_lb60/qi_lb60.c  |  104 
 board/qi/qi_lb60/u-boot.lds |   61 ++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/jz4740_nand.c  |  261 
 include/configs/qi_lb60.h   |  210 +++
 20 files changed, 2775 insertions(+), 1 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/Makefile
 create mode 100644 arch/mips/cpu/xburst/config.mk
 create mode 100644 arch/mips/cpu/xburst/cpu.c
 create mode 100644 arch/mips/cpu/xburst/jz4740.c
 create mode 100644 arch/mips/cpu/xburst/jz_serial.c
 create mode 100644 arch/mips/cpu/xburst/start.S
 create mode 100644 arch/mips/cpu/xburst/timer.c
 create mode 100644 arch/mips/include/asm/jz4740.h
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 drivers/mtd/nand/jz4740_nand.c
 create mode 100644 include/configs/qi_lb60.h
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[U-Boot] [PATCH v7 2/3] MIPS: Jz4740: Add NAND driver

2011-10-02 Thread Shinya Kuribayashi
From: Xiangfu Liu xian...@openmobilefree.net
Date: Fri, 19 Aug 2011 14:35:29 +0800

Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices

nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.

Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---

Changes since v6:

* Remove NAND-boot stuff.  Those bits will be submitted as a nand-spl
  support once this Jz4740 base support is merged.

* All previous comments from Scott are fixed.

* Bunch of coding style issues fixed.

 drivers/mtd/nand/Makefile  |1 +
 drivers/mtd/nand/jz4740_nand.c |  261 
 2 files changed, 262 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/jz4740_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index b6a7886..c257128 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -44,6 +44,7 @@ COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
 COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
 COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
 COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
 COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
new file mode 100644
index 000..db50da3
--- /dev/null
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -0,0 +1,261 @@
+/*
+ * Platform independend driver for JZ4740.
+ *
+ * Copyright (c) 2007 Ingenic Semiconductor Inc.
+ * Author: jl...@ingenic.cn
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+#include common.h
+
+#include nand.h
+#include asm/io.h
+#include asm/jz4740.h
+
+#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB800)
+#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
+#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x1)
+
+#define BIT(x) (1  (x))
+#define JZ_NAND_ECC_CTRL_ENCODING  BIT(3)
+#define JZ_NAND_ECC_CTRL_RSBIT(2)
+#define JZ_NAND_ECC_CTRL_RESET BIT(1)
+#define JZ_NAND_ECC_CTRL_ENABLEBIT(0)
+
+#define EMC_SMCR1_OPT_NAND 0x094c4400
+/* Optimize the timing of nand */
+
+static struct jz4740_emc * emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
+
+static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
+   .eccbytes = 72,
+   .eccpos = {
+   12, 13, 14, 15, 16, 17, 18, 19,
+   20, 21, 22, 23, 24, 25, 26, 27,
+   28, 29, 30, 31, 32, 33, 34, 35,
+   36, 37, 38, 39, 40, 41, 42, 43,
+   44, 45, 46, 47, 48, 49, 50, 51,
+   52, 53, 54, 55, 56, 57, 58, 59,
+   60, 61, 62, 63, 64, 65, 66, 67,
+   68, 69, 70, 71, 72, 73, 74, 75,
+   76, 77, 78, 79, 80, 81, 82, 83 },
+   .oobfree = {
+   {.offset = 2,
+.length = 10 },
+   {.offset = 84,
+.length = 44 } }
+};
+
+static int is_reading;
+
+static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+   struct nand_chip *this = mtd-priv;
+   uint32_t reg;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = JZ_NAND_ADDR_ADDR;
+   else if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = JZ_NAND_CMD_ADDR;
+   else
+   this-IO_ADDR_W = JZ_NAND_DATA_ADDR;
+
+   reg = readl(emc-nfcsr);
+   if (ctrl  NAND_NCE)
+   reg |= EMC_NFCSR_NFCE1;
+   else
+   reg = ~EMC_NFCSR_NFCE1;
+   writel(reg, emc-nfcsr);
+   }
+
+   if (cmd != NAND_CMD_NONE)
+   writeb(cmd, this-IO_ADDR_W);
+}
+
+static int jz_nand_device_ready(struct mtd_info *mtd)
+{
+   return (readl(GPIO_PXPIN(2))  0x4000) ? 1 : 0;
+}
+
+void board_nand_select_device(struct nand_chip *nand, int chip)
+{
+   /*
+* Don't use chip to address the NAND device,
+* generate the cs from the address where it is encoded.
+*/
+}
+
+static int jz_nand_rs_calculate_ecc(struct mtd_info* mtd, const u_char* dat,
+   u_char* ecc_code)
+{
+   uint32_t status;
+   int i;
+
+   if (is_reading)
+   return 0;
+
+   do {
+   status = readl(emc-nfints);
+   } while (!(status  EMC_NFINTS_ENCF));
+
+   /* disable ecc */
+   writel(readl

[U-Boot] [PATCH v7 3/3] MIPS: JZ4740: Add qi_lb60 board support

2011-10-02 Thread Shinya Kuribayashi
From: Xiangfu Liu xian...@openmobilefree.net
Date: Fri, 19 Aug 2011 14:35:29 +0800

Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device
from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot.
The initial bring-up assumes that U-Boot is directly loaded into SDRAM
using USB boot tool, and starts from 0x8010.

About USB boot tool
---

Jz4740 is one of the XBurst processors with USB boot functionality
supported.  The CPU can boot from a small ROM in the LSI, initialize
CPU and USB module, then wait for USB commands from the USB host.
We can send 8 KB binary data to the CPU cache using USB boot tool.

USB boot tool is available to the public at Ingenic website.  Also
there is an alternative Debian package named xburst-tools.

Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---

Changes since v6:

* nanonote.h config files is folded into qi_lb60.h

* Following configs are deleted:
  CONFIG_SYS_64BIT_VSPRINTF
  CONFIG_NANDBOOT_CFG
  CONFIG_QI_LB60

 MAINTAINERS |4 +
 MAKEALL |4 +-
 board/qi/qi_lb60/Makefile   |   45 +
 board/qi/qi_lb60/config.mk  |   31 +++
 board/qi/qi_lb60/qi_lb60.c  |  104 +
 board/qi/qi_lb60/u-boot.lds |   61 +
 boards.cfg  |1 +
 include/configs/qi_lb60.h   |  210 +++
 8 files changed, 459 insertions(+), 1 deletions(-)
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 include/configs/qi_lb60.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 3ab38fa..bb95e6d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -928,6 +928,10 @@ Stefan Roese s...@denx.de
 
vct_xxx MIPS32 4Kc
 
+Xiangfu Liu xian...@openmobilefree.net
+
+   qi_lb60 MIPS32 (XBurst Jz4740 SoC)
+
 #
 # Nios-II Systems: #
 #  #
diff --git a/MAKEALL b/MAKEALL
index 4d18c11..f57d47d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -400,7 +400,9 @@ LIST_mips= \
 ## MIPS Systems(little endian)
 #
 
-LIST_mips4kc_el=
+LIST_mips4kc_el=  \
+   qi_lb60 \
+
 
 LIST_mips5kc_el=
 
diff --git a/board/qi/qi_lb60/Makefile b/board/qi/qi_lb60/Makefile
new file mode 100644
index 000..2f5b4be
--- /dev/null
+++ b/board/qi/qi_lb60/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2006
+# Ingenic Semiconductor, jl...@ingenic.cn
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := $(BOARD).o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/qi/qi_lb60/config.mk b/board/qi/qi_lb60/config.mk
new file mode 100644
index 000..858e6a2
--- /dev/null
+++ b/board/qi/qi_lb60/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2006 Qi Hardware, Inc.
+# Author: Xiangfu Liu xiangf...@gmail.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even

Re: [U-Boot] Is it necessary that uboot(mips) should read status register($12) before setting it

2011-09-30 Thread Shinya Kuribayashi
On 09/28/2011 06:09 PM, RdrouterUboot Router wrote:
 2.Is it right?I can delete this code mfc0 $10,$12 from uboot.

You can delete that MFC0 instruction in this case and save one word.
Presumably the original code used to update the Status register value
in read-modify-write manner, and at some point someone modified into
current shape.

By the way, since the first MIPS implementation of U-Boot was merged
into the tree (by wdenk), we've been using k0($26) or t0($8) register
as a scratch pad when modifying the Status register, while your example
code uses t2($10).  So it would be a custom U-Boot we don't know of.
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[U-Boot] [GIT PULL] MIPS patche

2011-09-02 Thread Shinya Kuribayashi
Hi Wolfgang,

please pull the following patch from Yao, thanks in advance.

The following changes since commit a1118d60423c1fe25afc9df9015f72739f96fd67:

  MPC8xx: fix build problem for ETX094 board (2011-08-31 22:38:20 +0200)

are available in the git repository at:
  git://git.denx.de/u-boot-mips.git master

Yao Cheng (1):
  MIPS: mips32: fix wrong loop bound in flush_cache()

 arch/mips/cpu/mips32/cpu.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)
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Re: [U-Boot] [PATCH v3] mips32: fix wrong loop bound in flush_cache()

2011-08-11 Thread Shinya Kuribayashi
Hi,

On 08/10/2011 04:11 PM, Yao Cheng wrote:
 The issue is found when calling flush_cache() with zero size argument.
 The bound of loop is miscalculated in this case and flush_cache() enters a 
 wrong flushing loop.
 To fix this issue I skipped the operations when size is found to be zero.

It feels like the last sentence is somewhat redundant (the diff output
speaks for itself), so omitted.  Other than that, the patch is ok and
queued up to u-boot-mips/master.  If no MIPS patches come up within a
couple of weeks, I'll make a pull request.

Thanks for your report,
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Re: [U-Boot] Interrupt handler in U-Boot for MIPS based platform

2011-05-27 Thread Shinya Kuribayashi
On 5/27/11 2:44 AM, Pandurang Kale wrote:
Has any one implemented it for MIPS based platform? If not, any hint to
 get it working.

https://www.ibm.com/developerworks/mydeveloperworks/blogs/ddou/entry/implementing_mips_interrupts_for_u_boot28?lang=en
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[U-Boot] [GIT PULL] MIPS patches

2011-05-09 Thread Shinya Kuribayashi
Hi,

Please pull the MIPS updates, thanks in advance.

--- 8 ---
The following changes since commit 96d04c3150ae9284500aef48803d7d132968f2b2:

  IDE: fix compiler warnings (2011-04-30 23:29:55 +0200)

are available in the git repository at:
  ssh://gu-m...@git.denx.de/u-boot-mips.git master

Daniel Schwierzeck (1):
  MIPS: Introduce --gc-sections for MIPS

Shinya Kuribayashi (3):
  MIPS: Remove mips_cache_lock() feature
  MIPS: Coding style cleanups on common assembly files
  MIPS: Move timer code to arch/mips/cpu/$(CPU)/

 arch/mips/config.mk  |2 +
 arch/mips/cpu/mips32/Makefile|2 +-
 arch/mips/cpu/mips32/cache.S |  174 --
 arch/mips/cpu/mips32/start.S |  124 +++--
 arch/mips/{lib = cpu/mips32}/time.c |0
 arch/mips/lib/Makefile   |1 -
 board/dbau1x00/u-boot.lds|   10 +-
 board/gth2/u-boot.lds|   10 +-
 board/incaip/u-boot.lds  |   10 +-
 board/micronas/vct/u-boot.lds|   10 +-
 board/pb1x00/u-boot.lds  |   10 +-
 board/qemu-mips/u-boot.lds   |   10 +-
 board/tb0229/u-boot.lds  |   10 +-
 examples/standalone/mips.lds |   10 +-
 14 files changed, 135 insertions(+), 248 deletions(-)
 rename arch/mips/{lib = cpu/mips32}/time.c (100%)

diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index 318d34b..6ab8acd 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -50,3 +50,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
 PLATFORM_CPPFLAGS  += -G 0 -mabicalls -fpic
 PLATFORM_CPPFLAGS  += -msoft-float
 PLATFORM_LDFLAGS   += -G 0 -static -n -nostdlib
+PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
+LDFLAGS_FINAL  += --gc-sections
diff --git a/arch/mips/cpu/mips32/Makefile b/arch/mips/cpu/mips32/Makefile
index e315c1b..eb8e005 100644
--- a/arch/mips/cpu/mips32/Makefile
+++ b/arch/mips/cpu/mips32/Makefile
@@ -27,7 +27,7 @@ LIB   = $(obj)lib$(CPU).o
 
 START  = start.o
 SOBJS-y= cache.o
-COBJS-y= cpu.o interrupts.o
+COBJS-y= cpu.o interrupts.o time.o
 
 SRCS   := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index 2965938..5ce0ec4 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -51,75 +51,6 @@
.setpop
.endm
 
-/*
- * cacheop macro to automate cache operations
- * first some helpers...
- */
-#define _mincache(size, maxsize) \
-   bltu  size,maxsize,9f ; \
-   move  size,maxsize ;\
-9:
-
-#define _align(minaddr, maxaddr, linesize) \
-   .set noat ; \
-   subu  AT,linesize,1 ;   \
-   not   AT ;\
-   and   minaddr,AT ;  \
-   addu  maxaddr,-1 ;  \
-   and   maxaddr,AT ;  \
-   .set at
-
-/* general operations */
-#define doop1(op1) \
-   cache op1,0(a0)
-#define doop2(op1, op2) \
-   cache op1,0(a0) ;\
-   nop ;  \
-   cache op2,0(a0)
-
-/* specials for cache initialisation */
-#define doop1lw(op1) \
-   lw zero,0(a0)
-#define doop1lw1(op1) \
-   cache op1,0(a0) ;\
-   lw zero,0(a0) ;  \
-   cache op1,0(a0)
-#define doop121(op1,op2) \
-   cache op1,0(a0) ;\
-   nop;   \
-   cache op2,0(a0) ;\
-   nop;   \
-   cache op1,0(a0)
-
-#define _oploopn(minaddr, maxaddr, linesize, tag, ops) \
-   .set  noreorder ;\
-10:   doop##tag##ops ;  \
-   bne minaddr,maxaddr,10b ; \
-   add  minaddr,linesize ;   \
-   .set  reorder
-
-/* finally the cache operation macros */
-#define vcacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \
-   blez  n,11f ;\
-   addu  n,kva ;\
-   _align(kva, n, cacheLineSize) ; \
-   _oploopn(kva, n, cacheLineSize, tag, ops) ; \
-11:
-
-#define icacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \
-   _mincache(n, cacheSize);   \
-   blez  n,11f ;\
-   addu  n,kva ;\
-   _align(kva, n, cacheLineSize) ; \
-   _oploopn(kva, n, cacheLineSize, tag, ops) ; \
-11:
-
-#define vcacheop(kva, n, cacheSize, cacheLineSize, op) \
-   vcacheopn(kva, n, cacheSize, cacheLineSize, 1, (op))
-
-#define icacheop(kva, n, cacheSize, cacheLineSize, op) \
-   icacheopn(kva, n, cacheSize, cacheLineSize, 1, (op))
-
.macro  f_fill64 dst, offset, val
LONG_S  \val, (\offset +  0 * LONGSIZE)(\dst)
LONG_S  \val, (\offset +  1 * LONGSIZE)(\dst)
@@ -145,8 +76,8 @@
  * mips_init_icache(uint PRId, ulong icache_size, unchar icache_linesz)
  */
 LEAF(mips_init_icache)
-   bleza1, 9f
-   mtc0zero, CP0_TAGLO
+   bleza1, 9f
+   mtc0zero, CP0_TAGLO
/* clear tag to invalidate */
PTR_LI  t0, INDEX_BASE
PTR_ADDUt1, t0, a1
@@ -163,15 +94,15 @@ LEAF(mips_init_icache)
 1: cache_opIndex_Store_Tag_I t0

Re: [U-Boot] [PATCH] MIPS: Introduce --gc-sections for MIPS

2011-05-09 Thread Shinya Kuribayashi
Hi Daniel,

On 04/16/2011 12:16 AM, daniel.schwierz...@googlemail.com wrote:
 All architectures but MIPS are using --gc-sections on final linking.
 This patch introduces that feature for MIPS to reduce the memory and
 flash footprint.
 
 Signed-off-by: Daniel Schwierzeck daniel.schwierz...@googlemail.com
 Cc: Shinya Kuribayashi skuri...@pobox.com
 Cc: Wolfgang Denk w...@denx.de
 Cc: Stefan Roese s...@denx.de
 Cc: Thomas Lange tho...@corelatus.se
 Cc: Vlad Lungu vlad.lu...@windriver.com
 ---
 Tested with ELDK-4.1 and self-built gcc-4.3.3/binutils-2.19.1 on my
 boards. I could not test the other boards so I would appreciate it if
 the maintainers in CC could do a quick test on their boards.
 
  arch/mips/config.mk   |2 ++
  board/dbau1x00/u-boot.lds |   10 +-
  board/gth2/u-boot.lds |   10 +-
  board/incaip/u-boot.lds   |   10 +-
  board/micronas/vct/u-boot.lds |   10 +-
  board/pb1x00/u-boot.lds   |   10 +-
  board/qemu-mips/u-boot.lds|   10 +-
  board/tb0229/u-boot.lds   |   10 +-
  examples/standalone/mips.lds  |   10 +-
  9 files changed, 42 insertions(+), 40 deletions(-)

Thanks for the work, now pushed to u-boot-mips/master.

By the way, would you do me a favor.  In your mail header,

 From: daniel.schwierz...@googlemail.com

Please provide this in the form of, From: Your Name your@address

This helps patch maintainer(s) to avoid manually fixing Author: field,
which is wrongly set when importing patches from E-mails using git-am.
I noticed this when we got patches from you for the first time around
this February or March and fixed manually at that time, but forgot to
tell about that.
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[U-Boot] [PATCH] MIPS: Move timer code to arch/mips/cpu/$(CPU)/

2011-05-03 Thread Shinya Kuribayashi
Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available.  But this doesn't always work.

We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources.  And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.

This patch makes each $(CPU) can have its own timer code.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 arch/mips/cpu/mips32/Makefile|2 +-
 arch/mips/{lib = cpu/mips32}/time.c |0
 arch/mips/lib/Makefile   |1 -
 3 files changed, 1 insertions(+), 2 deletions(-)
 rename arch/mips/{lib = cpu/mips32}/time.c (100%)

diff --git a/arch/mips/cpu/mips32/Makefile b/arch/mips/cpu/mips32/Makefile
index e315c1b..eb8e005 100644
--- a/arch/mips/cpu/mips32/Makefile
+++ b/arch/mips/cpu/mips32/Makefile
@@ -27,7 +27,7 @@ LIB   = $(obj)lib$(CPU).o
 
 START  = start.o
 SOBJS-y= cache.o
-COBJS-y= cpu.o interrupts.o
+COBJS-y= cpu.o interrupts.o time.o
 
 SRCS   := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/arch/mips/lib/time.c b/arch/mips/cpu/mips32/time.c
similarity index 100%
rename from arch/mips/lib/time.c
rename to arch/mips/cpu/mips32/time.c
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 4e90704..9244f31 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -33,7 +33,6 @@ COBJS-y   += bootm_qemu_mips.o
 else
 COBJS-y+= bootm.o
 endif
-COBJS-y+= time.o
 
 SRCS   := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-- 
1.7.4.5

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Re: [U-Boot] [PATCH] MIPS: Introduce --gc-sections for MIPS

2011-04-15 Thread Shinya Kuribayashi
On 04/16/2011 12:16 AM, daniel.schwierz...@googlemail.com wrote:
 All architectures but MIPS are using --gc-sections on final linking.
 This patch introduces that feature for MIPS to reduce the memory and
 flash footprint.
 
 Signed-off-by: Daniel Schwierzeck daniel.schwierz...@googlemail.com
 Cc: Shinya Kuribayashi skuri...@pobox.com
 Cc: Wolfgang Denk w...@denx.de
 Cc: Stefan Roese s...@denx.de
 Cc: Thomas Lange tho...@corelatus.se
 Cc: Vlad Lungu vlad.lu...@windriver.com
 ---
 Tested with ELDK-4.1 and self-built gcc-4.3.3/binutils-2.19.1 on my
 boards. I could not test the other boards so I would appreciate it if
 the maintainers in CC could do a quick test on their boards.
 
  arch/mips/config.mk   |2 ++
  board/dbau1x00/u-boot.lds |   10 +-
  board/gth2/u-boot.lds |   10 +-
  board/incaip/u-boot.lds   |   10 +-
  board/micronas/vct/u-boot.lds |   10 +-
  board/pb1x00/u-boot.lds   |   10 +-
  board/qemu-mips/u-boot.lds|   10 +-
  board/tb0229/u-boot.lds   |   10 +-
  examples/standalone/mips.lds  |   10 +-
  9 files changed, 42 insertions(+), 40 deletions(-)

Basically, changes made look good.  I'm going to apply after a couple
of weeks (or a month) of interval, even without reports from the
maintainers.  As the patch has been proposed in the last minutes during
the merge window, we'll make it in the v2011.06 release, thanks.

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Re: [U-Boot] [PATCH 2/2] MIPS: Coding style cleanups on common assembly files

2011-04-12 Thread Shinya Kuribayashi
On 04/12/2011 12:35 AM, Daniel Schwierzeck wrote:
 diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
 index 0a9d9d5..f1e3447 100644
 --- a/arch/mips/cpu/mips32/start.S
 +++ b/arch/mips/cpu/mips32/start.S
 @@ -62,11 +62,11 @@
.globl _start
.text
  _start:
 -   RVECENT(reset,0)/* U-boot entry point */
 -   RVECENT(reset,1)/* software reboot */
 -#if defined(CONFIG_INCA_IP)
 -   .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting 
 */
 -   .word 0x   /* phase of the flash
 */
 +   RVECENT(reset,0)# U-boot entry point
 +   RVECENT(reset,1)# software reboot
 +#ifdef CONFIG_INCA_IP
 +   .word INFINEON_EBU_BOOTCFG  # EBU init code, fetched 
 during
 +   .word 0x# booting phase of the flash
  #else
RVECENT(romReserved,2)
  #endif
 
 can we use #ifdef INFINEON_EBU_BOOTCFG instead? This would help me
 with other SOCs which uses this feature too.

I don't see any problem with that plan, although I'm not sure what
EBU stands for and whether it could be generalized for other SoCs or
not at this moment.

Anyway patches are welcome.  But that's out of the scope of this clean-
up patch, so should be prepared separately.

 you missed that line:
 XVECENT(romExcHandle,0x380)   /* bfc00380: R4000 general vector */

Thanks, now fixed.
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[U-Boot] [MIPS 0/2] Trivial cleanups

2011-04-09 Thread Shinya Kuribayashi
Two boring patches for common MIPS area.
Build tested on gth2, and verified no logical changes are incorporated.
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[U-Boot] [PATCH 1/2] MIPS: Remove mips_cache_lock() feature

2011-04-09 Thread Shinya Kuribayashi
As requested in commit e1390801a3c1a2b6d12fa90be368efc19f5b9bfd ([MIPS]
Request for the 'mips_cache_lock()' removal), such feature is no longer
needed for current MIPS implementation of U-Boot, and no one in the tree
use it for years.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 arch/mips/cpu/mips32/cache.S |   93 --
 arch/mips/cpu/mips32/start.S |7 ---
 2 files changed, 0 insertions(+), 100 deletions(-)

diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index 2965938..edc0674 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -51,75 +51,6 @@
.setpop
.endm
 
-/*
- * cacheop macro to automate cache operations
- * first some helpers...
- */
-#define _mincache(size, maxsize) \
-   bltu  size,maxsize,9f ; \
-   move  size,maxsize ;\
-9:
-
-#define _align(minaddr, maxaddr, linesize) \
-   .set noat ; \
-   subu  AT,linesize,1 ;   \
-   not   AT ;\
-   and   minaddr,AT ;  \
-   addu  maxaddr,-1 ;  \
-   and   maxaddr,AT ;  \
-   .set at
-
-/* general operations */
-#define doop1(op1) \
-   cache op1,0(a0)
-#define doop2(op1, op2) \
-   cache op1,0(a0) ;\
-   nop ;  \
-   cache op2,0(a0)
-
-/* specials for cache initialisation */
-#define doop1lw(op1) \
-   lw zero,0(a0)
-#define doop1lw1(op1) \
-   cache op1,0(a0) ;\
-   lw zero,0(a0) ;  \
-   cache op1,0(a0)
-#define doop121(op1,op2) \
-   cache op1,0(a0) ;\
-   nop;   \
-   cache op2,0(a0) ;\
-   nop;   \
-   cache op1,0(a0)
-
-#define _oploopn(minaddr, maxaddr, linesize, tag, ops) \
-   .set  noreorder ;\
-10:   doop##tag##ops ;  \
-   bne minaddr,maxaddr,10b ; \
-   add  minaddr,linesize ;   \
-   .set  reorder
-
-/* finally the cache operation macros */
-#define vcacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \
-   blez  n,11f ;\
-   addu  n,kva ;\
-   _align(kva, n, cacheLineSize) ; \
-   _oploopn(kva, n, cacheLineSize, tag, ops) ; \
-11:
-
-#define icacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \
-   _mincache(n, cacheSize);   \
-   blez  n,11f ;\
-   addu  n,kva ;\
-   _align(kva, n, cacheLineSize) ; \
-   _oploopn(kva, n, cacheLineSize, tag, ops) ; \
-11:
-
-#define vcacheop(kva, n, cacheSize, cacheLineSize, op) \
-   vcacheopn(kva, n, cacheSize, cacheLineSize, 1, (op))
-
-#define icacheop(kva, n, cacheSize, cacheLineSize, op) \
-   icacheopn(kva, n, cacheSize, cacheLineSize, 1, (op))
-
.macro  f_fill64 dst, offset, val
LONG_S  \val, (\offset +  0 * LONGSIZE)(\dst)
LONG_S  \val, (\offset +  1 * LONGSIZE)(\dst)
@@ -302,27 +233,3 @@ LEAF(dcache_enable)
mtc0t0, CP0_CONFIG
jr  ra
END(dcache_enable)
-
-#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS
-/***
-*
-* mips_cache_lock - lock RAM area pointed to by a0 in cache.
-*
-* RETURNS: N/A
-*
-*/
-# define   CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE)
-   .globl  mips_cache_lock
-   .entmips_cache_lock
-mips_cache_lock:
-   li  a1, CKSEG0 - CACHE_LOCK_SIZE
-   addua0, a1
-   li  a2, CACHE_LOCK_SIZE
-   li  a3, CONFIG_SYS_CACHELINE_SIZE
-   movea1, a2
-   icacheop(a0,a1,a2,a3,0x1d)
-
-   jr  ra
-
-   .endmips_cache_lock
-#endif /* CONFIG_SYS_INIT_RAM_LOCK_MIPS */
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index e661d46..0a9d9d5 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -252,13 +252,6 @@ reset:
 
/* Set up temporary stack.
 */
-#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS
-   li  a0, CONFIG_SYS_INIT_SP_OFFSET
-   la  t9, mips_cache_lock
-   jalrt9
-   nop
-#endif
-
li  t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
la  sp, 0(t0)
 
-- 
1.7.4.4

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[U-Boot] [PATCH 2/2] MIPS: Coding style cleanups on common assembly files

2011-04-09 Thread Shinya Kuribayashi
Fix style issues and alignments globally.  No logical changes.
- Replace C comments with AS line comments where possible
- Use ifndef where possible, rather than if !defined for simplicity
- An instruction executed in a delay slot is now indicated by a leading
  space, not by C comment

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 arch/mips/cpu/mips32/cache.S |   81 ++---
 arch/mips/cpu/mips32/start.S |  117 +++--
 2 files changed, 92 insertions(+), 106 deletions(-)

diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index edc0674..5ce0ec4 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -76,8 +76,8 @@
  * mips_init_icache(uint PRId, ulong icache_size, unchar icache_linesz)
  */
 LEAF(mips_init_icache)
-   bleza1, 9f
-   mtc0zero, CP0_TAGLO
+   bleza1, 9f
+   mtc0zero, CP0_TAGLO
/* clear tag to invalidate */
PTR_LI  t0, INDEX_BASE
PTR_ADDUt1, t0, a1
@@ -94,15 +94,15 @@ LEAF(mips_init_icache)
 1: cache_opIndex_Store_Tag_I t0
PTR_ADDUt0, a2
bne t0, t1, 1b
-9: jr  ra
+9: jr  ra
END(mips_init_icache)
 
 /*
  * mips_init_dcache(uint PRId, ulong dcache_size, unchar dcache_linesz)
  */
 LEAF(mips_init_dcache)
-   bleza1, 9f
-   mtc0zero, CP0_TAGLO
+   bleza1, 9f
+   mtc0zero, CP0_TAGLO
/* clear all tags */
PTR_LI  t0, INDEX_BASE
PTR_ADDUt1, t0, a1
@@ -119,25 +119,23 @@ LEAF(mips_init_dcache)
 1: cache_opIndex_Store_Tag_D t0
PTR_ADDUt0, a2
bne t0, t1, 1b
-9: jr  ra
+9: jr  ra
END(mips_init_dcache)
 
-/***
-*
-* mips_cache_reset - low level initialisation of the primary caches
-*
-* This routine initialises the primary caches to ensure that they
-* have good parity.  It must be called by the ROM before any cached locations
-* are used to prevent the possibility of data with bad parity being written to
-* memory.
-* To initialise the instruction cache it is essential that a source of data
-* with good parity is available. This routine
-* will initialise an area of memory starting at location zero to be used as
-* a source of parity.
-*
-* RETURNS: N/A
-*
-*/
+/*
+ * mips_cache_reset - low level initialisation of the primary caches
+ *
+ * This routine initialises the primary caches to ensure that they have good
+ * parity.  It must be called by the ROM before any cached locations are used
+ * to prevent the possibility of data with bad parity being written to memory.
+ *
+ * To initialise the instruction cache it is essential that a source of data
+ * with good parity is available. This routine will initialise an area of
+ * memory starting at location zero to be used as a source of parity.
+ *
+ * RETURNS: N/A
+ *
+ */
 NESTED(mips_cache_reset, 0, ra)
moveRA, ra
li  t2, CONFIG_SYS_ICACHE_SIZE
@@ -185,13 +183,12 @@ NESTED(mips_cache_reset, 0, ra)
jr  RA
END(mips_cache_reset)
 
-/***
-*
-* dcache_status - get cache status
-*
-* RETURNS: 0 - cache disabled; 1 - cache enabled
-*
-*/
+/*
+ * dcache_status - get cache status
+ *
+ * RETURNS: 0 - cache disabled; 1 - cache enabled
+ *
+ */
 LEAF(dcache_status)
mfc0t0, CP0_CONFIG
li  t1, CONF_CM_UNCACHED
@@ -202,13 +199,12 @@ LEAF(dcache_status)
 2: jr  ra
END(dcache_status)
 
-/***
-*
-* dcache_disable - disable cache
-*
-* RETURNS: N/A
-*
-*/
+/*
+ * dcache_disable - disable cache
+ *
+ * RETURNS: N/A
+ *
+ */
 LEAF(dcache_disable)
mfc0t0, CP0_CONFIG
li  t1, -8
@@ -218,13 +214,12 @@ LEAF(dcache_disable)
jr  ra
END(dcache_disable)
 
-/***
-*
-* dcache_enable - enable cache
-*
-* RETURNS: N/A
-*
-*/
+/*
+ * dcache_enable - enable cache
+ *
+ * RETURNS: N/A
+ *
+ */
 LEAF(dcache_enable)
mfc0t0, CP0_CONFIG
ori t0, CONF_CM_CMASK
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 0a9d9d5..f1e3447 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -62,11 +62,11 @@
.globl _start
.text
 _start:
-   RVECENT(reset,0)/* U-boot entry point */
-   RVECENT(reset,1)/* software reboot */
-#if defined(CONFIG_INCA_IP)
-   .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
-   .word 0x   /* phase of the flash*/
+   RVECENT(reset

[U-Boot] [GIT PULL] MIPS patches

2011-04-02 Thread Shinya Kuribayashi
Hi,

Please pull the MIPS updates, thanks in advance.

--- 8 ---
The following changes since commit 67a490d60d70f2b01d55976440ba30154af96965:

  atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN (2011-04-01 14:49:08 
-0500)

are available in the git repository at:
  git://git.denx.de/u-boot-mips.git master

Daniel Schwierzeck (5):
  MIPS: Purple: Remove Purple support
  MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32
  MIPS: Optimize the setup of CPU optimization flags
  MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory
  MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory

 MAINTAINERS|1 -
 MAKEALL|4 +-
 arch/mips/cpu/{ = mips32}/Makefile|5 -
 .../mips/cpu/mips32/au1x00}/Makefile   |   15 +-
 arch/mips/cpu/{ = mips32/au1x00}/au1x00_eth.c |0
 arch/mips/cpu/{ = mips32/au1x00}/au1x00_serial.c  |0
 .../mips/cpu/{ = mips32/au1x00}/au1x00_usb_ohci.c |0
 .../mips/cpu/{ = mips32/au1x00}/au1x00_usb_ohci.h |0
 .../mips/cpu/mips32/au1x00}/config.mk  |   12 +-
 arch/mips/cpu/{ = mips32}/cache.S |4 -
 arch/mips/cpu/{ = mips32}/config.mk   |   15 +-
 arch/mips/cpu/{ = mips32}/cpu.c   |0
 .../mips/cpu/mips32/incaip}/Makefile   |   16 +-
 arch/mips/cpu/{ = mips32/incaip}/asc_serial.c |   83 ---
 arch/mips/cpu/{ = mips32/incaip}/asc_serial.h |0
 .../mips/cpu/mips32/incaip}/config.mk  |   12 +-
 arch/mips/cpu/{ = mips32/incaip}/incaip_clock.c   |0
 arch/mips/cpu/{ = mips32/incaip}/incaip_wdt.S |0
 arch/mips/cpu/{ = mips32}/interrupts.c|0
 arch/mips/cpu/{ = mips32}/start.S |   32 -
 arch/mips/include/asm/inca-ip.h|   10 -
 arch/mips/lib/board.c  |   10 -
 board/purple/flash.c   |  595 
 board/purple/lowlevel_init.S   |   36 --
 board/purple/purple.c  |  284 --
 board/purple/sconsole.c|  125 
 board/purple/sconsole.h|   46 --
 board/purple/u-boot.lds|   75 ---
 boards.cfg |   51 +-
 doc/README.Purple  |   84 ---
 include/configs/purple.h   |  173 --
 31 files changed, 53 insertions(+), 1635 deletions(-)
 rename arch/mips/cpu/{ = mips32}/Makefile (87%)
 copy {board/purple = arch/mips/cpu/mips32/au1x00}/Makefile (83%)
 rename arch/mips/cpu/{ = mips32/au1x00}/au1x00_eth.c (100%)
 rename arch/mips/cpu/{ = mips32/au1x00}/au1x00_serial.c (100%)
 rename arch/mips/cpu/{ = mips32/au1x00}/au1x00_usb_ohci.c (100%)
 rename arch/mips/cpu/{ = mips32/au1x00}/au1x00_usb_ohci.h (100%)
 copy {board/purple = arch/mips/cpu/mips32/au1x00}/config.mk (83%)
 rename arch/mips/cpu/{ = mips32}/cache.S (98%)
 rename arch/mips/cpu/{ = mips32}/config.mk (83%)
 rename arch/mips/cpu/{ = mips32}/cpu.c (100%)
 rename {board/purple = arch/mips/cpu/mips32/incaip}/Makefile (83%)
 rename arch/mips/cpu/{ = mips32/incaip}/asc_serial.c (77%)
 rename arch/mips/cpu/{ = mips32/incaip}/asc_serial.h (100%)
 rename {board/purple = arch/mips/cpu/mips32/incaip}/config.mk (83%)
 rename arch/mips/cpu/{ = mips32/incaip}/incaip_clock.c (100%)
 rename arch/mips/cpu/{ = mips32/incaip}/incaip_wdt.S (100%)
 rename arch/mips/cpu/{ = mips32}/interrupts.c (100%)
 rename arch/mips/cpu/{ = mips32}/start.S (92%)
 delete mode 100644 board/purple/flash.c
 delete mode 100644 board/purple/lowlevel_init.S
 delete mode 100644 board/purple/purple.c
 delete mode 100644 board/purple/sconsole.c
 delete mode 100644 board/purple/sconsole.h
 delete mode 100644 board/purple/u-boot.lds
 delete mode 100644 doc/README.Purple
 delete mode 100644 include/configs/purple.h
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[U-Boot] MIPS: tb0229 build error caused by asm/ppc4xx.h reference

2011-03-30 Thread Shinya Kuribayashi
Hi Komiya-san,

Since the commit below, tb0229 target has been broken for months because
ppc4xx.h and ppc405.h can not be easily included as used to by MIPS
ports any more.

 commit b36df561154bdd0a41bb77e09c5575ca2cf48013
 Author: Stefan Roese s...@denx.de
 Date:   Thu Sep 9 19:18:00 2010 +0200
 
 ppc4xx: Move ppc4xx headers to powerpc include directory
 
 This patch moves some ppc4xx related headers from the common include
 directory (include/) to the powerpc specific one
 (arch/powerpc/include/asm/). This way to common include directory is not
 so cluttered with files.
 
 Signed-off-by: Stefan Roese s...@denx.de

$ ./MAKEALL tb0229
[...]
flash.c:27: fatal error: asm/ppc4xx.h: No such file or directory
make[1]: *** [flash.o] Error 1

I can not come up with a reasonble workaround at this moment.  Could you
take a look please?  And let us know what we do next, thanks.
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Re: [U-Boot] [PATCH v3 0/5] MIPS: Refactoring and cleanup of CPU and SoC code

2011-03-30 Thread Shinya Kuribayashi
On 03/29/2011 01:33 AM, daniel.schwierz...@googlemail.com wrote:
 This patch series refactors the Mips CPU directory and put all current
 code into an own mips32 subdirectory. Furthermore the SoC specific code
 of IncaIP and Au1x00 is moved to separate SoC subdirectories.
 The support for Purple is dropped because not actively maintained
 anymore.
 
 Changes since RFC/v1:
 - drop Purple supported as agreed with Wolfgang Denk
 - use MIPS rather than Mips in patch subject
 - fixed Cc lines in all patches
 
 Changes since v2:
 - reverted patch for endianess flag setup
 - always use -march=mips32r2 as default CPU optimization for
   all MIPS32 CPU cores
 
 Daniel Schwierzeck (5):
   MIPS: Purple: Remove Purple support
   MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32
   MIPS: Optimize the setup of CPU optimization flags
   MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory
   MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory

I've reviewed and build tested, all patches look good.

Applied and queued to u-boot-mips tree along with several s/Mips/MIPS/
keyword cleanups in the git commitlogs.  Will make a pull-request once
v2011.03 gets released.
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Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags

2011-03-28 Thread Shinya Kuribayashi
Sorry for being late,

On 03/24/2011 01:37 AM, Daniel Schwierzeck wrote:
 2011/3/23 Shinya Kuribayashi skuri...@pobox.com:
 Following changes have been introduced to ld in binutils-2.16:
[...]
 I'd claim that all toolchains with binutils lesser than 2.16 are not
 working anymore.
[...]
 I suggest to drop official support for ELDK-3.1.1 / binutils-2.14 and
 earlier.

Excellent, no comments from me.  Let's forget about all pre-binutils
2.16 releases from now on, and ELDK-3.1.1 as well.

 I have prepared a v3 of this patch that checks whether -mips32r2 is
 supported. If not than -mips32 will be used as fallback. But I want
 to clarify this first before I send it.

I'm guessting you're worried that the corresponding line will differ
from what the Linux/MIPS has, but that's not a problem.  The Linux/MIPS
tries to tighten the condition in accordance with explicit configuration
options such as CONFIG_CPU_MIPS32_R1/R2, CONFIG_CPU_MIPS64_R1/R2.

 cflags-$(CONFIG_CPU_MIPS32_R1)+= $(call 
 cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
   -Wa,-mips32 -Wa,--trap
 cflags-$(CONFIG_CPU_MIPS32_R2)+= $(call 
 cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) 
 \
   -Wa,-mips32r2 -Wa,--trap
 cflags-$(CONFIG_CPU_MIPS64_R1)+= $(call 
 cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
   -Wa,-mips64 -Wa,--trap
 cflags-$(CONFIG_CPU_MIPS64_R2)+= $(call 
 cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 
 \
   -Wa,-mips64r2 -Wa,--trap

We U-Boot doesn't have to follow this convention, and can relax the cc-
option rules.

I'll wait for v3 patch(es), and push them during the next merge window.
Thanks in advance,
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Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags

2011-03-28 Thread Shinya Kuribayashi
On 3/29/11 12:27 AM, Daniel Schwierzeck wrote:
 Ok if we drop toolchain support for binutils lesser than 2.16 than I
 can simplify the
 this patch to one line because the assembler check is obsolete too:

 MIPSFLAGS = $(call cc-option,-march=mips32r2)

 Do you agree?

It sounds you're misunderstanding how cc-option works.  Could you take
a look at $(TOPDIR)/config.mk again?
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Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags

2011-03-23 Thread Shinya Kuribayashi
On 03/21/2011 09:42 PM, Daniel Schwierzeck wrote:
 I did some researching and testing with ELDK-4.1, ELDK-4.0 and ELDK-3.1.1.

Thanks, much appreciated.

 In ELDK-3.1.1 we have:
 - mips_4KC-gcc (GCC) 3.3.3 (DENX ELDK 3.1.1 3.3.3-9)
 - GNU assembler 2.14 20030612
 
 Therefore mips32r2 is already supported. But there is another problem
 with this binutils version. The latest additions to mips.lds and
 u-boot.lds for supporting recent binutils are causing parse errors.

I wonder what's that 'the latest additions to mips.lds and u-boot.lds
for supporting recent binutils' to be exact.  Which commit(s) are you
referring to? Or could you provide error logs just in case please?

 Thus ELDK-3.1.1 and earlier are not functional with mainline U-Boot
 anyway. ELDK-4.0 and 4.1 with gcc-4.0.0 and binutils-2.16.1 are
 working properly.
 
 I suggest to drop official support for ELDK-3.1.1 / binutils-2.14 and
 earlier.

Hmm.  According to the README file, even the Linux kernel still builds
with at least gcc 3.2.  I'm feeling that it might be a bit too early to
drop gcc 3.3.3 (ELDK-3.1.1).

So I'd like to take a look at the issue you found this time, first.  If
it's easy to fix, let's fix it.  And if not, revise the patch please.
We have not heard of any problem reports on MIPS builds with ELDK-3.1.1
so far (at least I'm not aware of them).  The change won't be a problem.
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Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags

2011-03-17 Thread Shinya Kuribayashi
On 03/16/2011 11:41 PM, Daniel Schwierzeck wrote:
 Is my approach with -march acceptable? This is more important to me
 for supporting new SoCs with 24k and 34k CPU cores. I think its a
 clean approach to use a default Mips32 architecture optimization plus
 a per CPU optimization configured in the SoC directories.

IIUC this is a binutils related issue.

 @@ -20,20 +20,13 @@
  # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  # MA 02111-1307 USA
  #
 -v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | 
 cut -d. -f2)
 -MIPSFLAGS:=$(shell \
 -if [ $v -lt 14 ]; then \
 - echo -mcpu=4kc; \
 -else \
 - echo -march=4kc -mtune=4kc; \
 -fi)
 
 [...]
 +# Optimization flags for all Mips32 CPUs
 +MIPSFLAGS = $(call cc-option,-march=mips32r2,-mips32r2 -Wa,-mips32r2)

According to GNU gas NEWS, mips32r2 support was introduced in 2.14:

http://sourceware.org/cgi-bin/cvsweb.cgi/~checkout~/src/gas/NEWS?rev=1.117content-type=text/plaincvsroot=srconly_with_tag=binutils-binutils-2_21

On the other hand, we have a number of the ELDK releases so far, and
their binutils versions vary from 2.11 (ELDK2.1.0) to 2.16.1 (ELDK4.1).

2.1.0: 
http://mirror.switch.ch/ftp/mirror/eldk/2.1.0/eldk-mips-linux-x86/README.html
3.0:   (N/A for MIPS?)
3.1:   
http://mirror.switch.ch/ftp/mirror/eldk/3.1/mips-linux-x86/distribution/README.html
3.1.1: 
http://mirror.switch.ch/ftp/mirror/eldk/3.1.1/mips-linux-x86/distribution/README.html
4.0:   
http://mirror.switch.ch/ftp/mirror/eldk/4.0/mips-linux-x86/distribution/README.html
   http://www.denx.de/en/News/PressReleaseELDK40
4.1:   
http://mirror.switch.ch/ftp/mirror/eldk/4.1/mips-linux-x86/distribution/README.html
   http://www.denx.de/en/News/PressReleaseELDK41
4.2:   (N/A for MIPS?)

Does above change break any builds with older binutils?  Personally, I'm
ok with dropping older toolchains to some extent.  However, if it breaks
builds with older toolchains, strictly speaking older versions of the
ELDK releases, the decision is up to Wolfgang.

Along with the code, it'd be nice to provide a note in the git commit
log about which ELDK version(s) will be affected by this change.  I'm
not sure that anyone still uses the ELSK2.1.0 in the wild, nor current
U-Boot/MIPS can be built with it, though.
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Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags

2011-03-16 Thread Shinya Kuribayashi
On 3/15/11 10:20 PM, Daniel Schwierzeck wrote:
 http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/81572/focus=81735

 sorry, I missed that discussion

You can find a lot more in the list archive.

 Do we need this endianess flag stuff at all? Each toolchain that is
 built with a specific
 endinaness does not really need the extra setting of -EB/-EL or am I
 miss something?

True, as far as toolchain-default-endianness build goes.

The Linux/MIPS kernel however is maintained where Big-Endian and Little-
-Endian machines can be configured and compiled using a single toolchain,
regardless of its default endianness.  CONFIG_LITTLE_ENDIAN is exactly
for that purpose.
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Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags

2011-03-14 Thread Shinya Kuribayashi
On 3/15/11 6:14 AM, daniel.schwierz...@googlemail.com wrote:
 Replace the current MIPSFLAGS code by cc-option macro and use
 -march=mips32r2 as default optimization level for all Mips32 CPUs.
 Replace the endianess determination code from toolchain prefix by
 a more generic one inspired by the Linux arch/mips/Makefile.
[...]
 -ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
 -ENDIANNESS = -EL
 -else
 -ENDIANNESS = -EB
 -endif
 +# Optimization flags for all Mips32 CPUs
 +MIPSFLAGS = $(call cc-option,-march=mips32r2,-mips32r2 -Wa,-mips32r2)

 -MIPSFLAGS += $(ENDIANNESS)
 +# Determine endianess from toolchain prefix
 +ENDIANESS = $(shell $(CC) -dumpmachine | \
 + grep -q 'mips.*el-.*'  echo -EL || echo -EB)
 +
 +PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANESS)

 -PLATFORM_CPPFLAGS += $(MIPSFLAGS)

This trick can not work with the ELDK toolchain, which also I don't
want to think about and be involved in discussion any more.   See:

http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/81572/focus=81735

Users who need to dig into this area should install the ELDK first,
build little-endian targets with it by yourself, then find a way
to handle endianness appropriately which works for both the ELDK and
non-ELDK toolchains.

Or I may miss something.  If it's already verified with the ELDK,
please let me know, thanks.
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Re: [U-Boot] [PATCH v6 1/7] those files are jz4740 base files

2011-03-14 Thread Shinya Kuribayashi
On 02/28/2011 03:57 PM, Xiangfu Liu wrote:
 diff --git a/arch/mips/cpu/xburst/jz_serial.c 
 b/arch/mips/cpu/xburst/jz_serial.c
 new file mode 100644
 index 000..65ce993
 --- /dev/null
 +++ b/arch/mips/cpu/xburst/jz_serial.c
[...]
 +/*
 + * serial_init - initialize a channel
 + *
 + * This routine initializes the number of data bits, parity
 + * and set the selected baud rate. Interrupts are disabled.
 + * Set the modem control signals if the option is selected.
 + *
 + * RETURNS: N/A
 + */
 +struct jz4740_uart *uart = (struct jz4740_uart *) CONFIG_SYS_UART_BASE;
 +

Can we make this static?
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Re: [U-Boot] [PATCH v6 2/7] this is jz4740 head file

2011-03-14 Thread Shinya Kuribayashi
On 02/28/2011 03:57 PM, Xiangfu Liu wrote:
 this is jz4740 base head file
 
 Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
 Acked-by: Daniel z...@ingenic.cn
 ---
 Changes for v2:
 - remove useless code, prepare for using io.h
 - delete all base + offset. using C struct 
 
  arch/mips/include/asm/jz4740.h | 1102 
 
  1 files changed, 1102 insertions(+), 0 deletions(-)
  create mode 100644 arch/mips/include/asm/jz4740.h

This asm/jz4740.h is used by files in PATCH v6 1/7.  Please fold
this patch into the v6 1/7.  That should be ok.
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Re: [U-Boot] [PATCH v6 1/7] those files are jz4740 base files

2011-03-14 Thread Shinya Kuribayashi
On 02/28/2011 03:57 PM, Xiangfu Liu wrote:
  arch/mips/cpu/xburst/Makefile|   50 +++
  arch/mips/cpu/xburst/config.mk   |   33 ++
  arch/mips/cpu/xburst/cpu.c   |  160 
  arch/mips/cpu/xburst/jz4740.c|  264 
  arch/mips/cpu/xburst/jz_serial.c |  114 +
  arch/mips/cpu/xburst/start.S |  160 
  arch/mips/cpu/xburst/start_spl.S |   63 +++
  arch/mips/cpu/xburst/timer.c |  167 
  arch/mips/cpu/xburst/usbboot.S   |  841 
 ++
  9 files changed, 1852 insertions(+), 0 deletions(-)
  create mode 100644 arch/mips/cpu/xburst/Makefile
  create mode 100644 arch/mips/cpu/xburst/config.mk
  create mode 100644 arch/mips/cpu/xburst/cpu.c
  create mode 100644 arch/mips/cpu/xburst/jz4740.c
  create mode 100644 arch/mips/cpu/xburst/jz_serial.c
  create mode 100644 arch/mips/cpu/xburst/start.S
  create mode 100644 arch/mips/cpu/xburst/start_spl.S
  create mode 100644 arch/mips/cpu/xburst/timer.c
  create mode 100644 arch/mips/cpu/xburst/usbboot.S

Please pay more attention to coding style issues.
- Comments with multiple lines
- Trailing whitespaces
- Inconsistent tab and space usages
- Follow the basic Linux CodingStyle guide

and so on.

Here's quick fixes on 1/7 part.  2/7..7/7 should be checked as well.

diff --git a/arch/mips/cpu/xburst/Makefile b/arch/mips/cpu/xburst/Makefile
index a9a6e77..6d6ffb7 100644
--- a/arch/mips/cpu/xburst/Makefile
+++ b/arch/mips/cpu/xburst/Makefile
@@ -26,8 +26,8 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(CPU).o
 
 START  = start.o
-SOBJS-y= 
-COBJS-y = cpu.o timer.o jz_serial.o 
+SOBJS-y=
+COBJS-y= cpu.o timer.o jz_serial.o
 
 COBJS-$(CONFIG_JZ4740) += jz4740.o
 
diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
index 5eb047d..43e8c3d 100644
--- a/arch/mips/cpu/xburst/cpu.c
+++ b/arch/mips/cpu/xburst/cpu.c
@@ -40,7 +40,7 @@
:   \
: i (op), R (*(unsigned char *)(addr)))
 
-#if !defined (CONFIG_NAND_SPL)  !defined (CONFIG_MSC_SPL) 
+#if !defined (CONFIG_NAND_SPL)  !defined (CONFIG_MSC_SPL)
 
 void __attribute__((weak)) _machine_restart(void)
 {
@@ -79,7 +79,7 @@ void flush_cache(ulong start_addr, ulong size)
unsigned long addr = start_addr  ~(lsize - 1);
unsigned long aend = (start_addr + size - 1)  ~(lsize - 1);
 
-   for (;addr = aend;addr += lsize) {
+   for (;addr = aend; addr += lsize) {
cache_op(Hit_Writeback_Inv_D, addr);
cache_op(Hit_Invalidate_I, addr);
}
@@ -91,7 +91,7 @@ void flush_dcache_range(ulong start_addr, ulong stop)
unsigned long addr = start_addr  ~(lsize - 1);
unsigned long aend = (stop - 1)  ~(lsize - 1);
 
-   for (;addr = aend;addr += lsize)
+   for (;addr = aend; addr += lsize)
cache_op(Hit_Writeback_Inv_D, addr);
 }
 
@@ -101,7 +101,7 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
unsigned long addr = start_addr  ~(lsize - 1);
unsigned long aend = (stop - 1)  ~(lsize - 1);
 
-   for (;addr = aend;addr += lsize)
+   for (;addr = aend; addr += lsize)
cache_op(Hit_Invalidate_D, addr);
 }
 
@@ -145,7 +145,7 @@ void flush_dcache_all(void)
 {
u32 addr;
 
-   for (addr = KSEG0; addr  KSEG0 + CONFIG_SYS_DCACHE_SIZE; 
+   for (addr = KSEG0; addr  KSEG0 + CONFIG_SYS_DCACHE_SIZE;
 addr += CONFIG_SYS_CACHELINE_SIZE) {
cache_op(Index_Writeback_Inv_D, addr);
}
diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
index aedee52..63952b7 100644
--- a/arch/mips/cpu/xburst/jz4740.c
+++ b/arch/mips/cpu/xburst/jz4740.c
@@ -27,18 +27,19 @@ void enable_interrupts(void)
 {
 }
 
-int disable_interrupts(void) 
+int disable_interrupts(void)
 {
return 0;
 }
 
-/* PLL output clock = EXTAL * NF / (NR * NO)
+/*
+ * PLL output clock = EXTAL * NF / (NR * NO)
  * NF = FD + 2, NR = RD + 2
  * NO = 1 (if OD = 0), NO = 2 (if OD = 1 or 2), NO = 4 (if OD = 3)
  */
 void pll_init(void)
 {
-   struct jz4740_cpm * cpm = (struct jz4740_cpm *) JZ4740_CPM_BASE;
+   struct jz4740_cpm *cpm = (struct jz4740_cpm *) JZ4740_CPM_BASE;
 
register unsigned int cfcr, plcr1;
int n2FR[33] = {
@@ -56,7 +57,7 @@ void pll_init(void)
(n2FR[div[3]]  CPM_CPCCR_MDIV_BIT) |
(n2FR[div[4]]  CPM_CPCCR_LDIV_BIT);
 
-   pllout2 = (cfcr  CPM_CPCCR_PCS) ? 
+   pllout2 = (cfcr  CPM_CPCCR_PCS) ?
CONFIG_SYS_CPU_SPEED : (CONFIG_SYS_CPU_SPEED / 2);
 
/* Init USB Host clock, pllout2 must be n*48MHz */
@@ -65,9 +66,9 @@ void pll_init(void)
nf = CONFIG_SYS_CPU_SPEED * 2 / CONFIG_SYS_EXTAL;
plcr1 = ((nf - 2)  CPM_CPPCR_PLLM_BIT) | /* FD */
(0  CPM_CPPCR_PLLN_BIT) | /* RD=0, NR=2 */
-   (0  CPM_CPPCR_PLLOD_BIT) |/* OD=0, NO=1 */
-   (0x20  

Re: [U-Boot] [PATCH v6 7/7] modify files for ben nanonote board

2011-03-14 Thread Shinya Kuribayashi
On 02/28/2011 03:57 PM, Xiangfu Liu wrote:
 diff --git a/Makefile b/Makefile
 index dc2e3d8..758daf2 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -1093,6 +1093,19 @@ smdk6400_config:   unconfig
   @echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
  
  #
 +# MIPS
 +#
 +#
 +## MIPS32 XBurst jz4740
 +#
 +qi_lb60_config  : unconfig
 + @mkdir -p $(obj)include
 + @echo #define CONFIG_NAND_U_BOOT  $(obj)include/config.h
 + @echo Compile NAND boot image for QI LB60
 + @$(MKCONFIG) -a qi_lb60 mips xburst nanonote xburst
 + @echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
 +
 +#
  # Nios
  #

(In PATCH v6 6/7)
 diff --git a/boards.cfg b/boards.cfg
 index 45c3102..cb8c6a0 100644
 --- a/boards.cfg
 +++ b/boards.cfg
 @@ -243,6 +243,7 @@ vct_platinumavc  mipsmipsvct  
microna
  vct_platinumavc_smallmipsmipsvct 
 micronas   -   vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE
  vct_platinumavc_onenand  mipsmipsvct 
 micronas   -   vct:VCT_PLATINUMAVC,VCT_ONENAND
  vct_platinumavc_onenand_small mips   mipsvct 
 micronas   -   vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE
 +qi_lb60  mipsmips
  PCI5441  nios2   nios2   pci5441 
 psyent
  PK1C20   nios2   nios2   pk1c20  
 psyent
  EVB64260 powerpc 74xx_7xxevb64260-   
-   EVB64260

You added targets with the same name to two places.  In this case,
boards.cfg will be used to configure qi_lb60.  All MIPS targets can
be configured through boards.cfg now, so please 1) remove $(TOPDIR)/
Makefile part, and 2) get 'qi_lb60' entry work as expected, instead.
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Re: [U-Boot] [RFC PATCH 2/6] Mips: Purple: Adapt u-boot.lds to changed CPU directory layout

2011-03-12 Thread Shinya Kuribayashi
On 3/9/11 10:16 PM, daniel.schwierz...@googlemail.com wrote:
 This fixes a linker error introduced by the previous commit.

If so, such fix should be made along with that previous commit.
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Re: [U-Boot] [RFC PATCH 1/6] Mips: Move content of arch/mips/cpu to arch/mips/cpu/mips32

2011-03-12 Thread Shinya Kuribayashi
On 3/9/11 10:16 PM, daniel.schwierz...@googlemail.com wrote:
 All current CPUs and SoCs are based on Mips32 arch. The complete

Is that true?  What about purple SoC?  IIUC It's based on MIPS 5Kc
and capable of 64-bit, which MIPS32 is 32-bit only architecture.

 code resides in the global arch/mips/cpu directory. This is not
 suitable if other Mips architectures like Mips64 or Octeon should
 be supported in the future.

Just for the record.

Personally, Octeon is sort of a special case.  It's based on MIPS64
architecture, and definitely a MIPS SoC, but not usual MIPS machine.
As Aaron already mentioned before, we have very few files sharable
with other MIPS machines even in the Linux kernel case.  I think it
will take long time the Octeon port gets merged to upstream, regard-
less of my opinions, because they have a lot of things need to be
resolved prior to Octeon itself.

 To achieve this the current CPU code is moved to its own mips32
 subdirectory. All Mips32 boards have to use mips32 as config switch
 in board.cfg.

 Signed-off-by: Daniel Schwierzeckdaniel.schwierz...@googlemail.com
 Cc: Shinya Kuribayashiskuri...@pobox.com
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Re: [U-Boot] [RFC PATCH 0/6] Mips: Refactoring of CPU and SoC code

2011-03-12 Thread Shinya Kuribayashi
On 3/9/11 10:16 PM, daniel.schwierz...@googlemail.com wrote:
 This patch series refactors the Mips CPU directory and put all current
 code into an own mips32 subdirectory. Furthermore the SoC specific code
 of IncaIP, Purple and Au1x00 is moved to separate SoC subdirectories.

Personally I'm not a big fan of current arch/arch/cpu/ directory usages
in the U-Boot tree.  But that's a matter of personal preference, and I've
already ended up regarding this area a few years ago.  Not having strong
opinions now.

When they get ready for merge, please let me know.  Then I'll queue them
up for the next release, thanks.
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Re: [U-Boot] [RFC PATCH 0/6] Mips: Refactoring of CPU and SoC code

2011-03-12 Thread Shinya Kuribayashi
By the way, please use MIPS:  next time, not Mips:

Thanks in advance,
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[U-Boot] [GIT PULL] MIPS patches

2011-02-11 Thread Shinya Kuribayashi
Hi,

Please pull the following MIPS patches, thanks.

Daniel Schwierzeck (3):
  MIPS: VCT: Fix enabling of unwanted options if networking or USB support 
are disabled
  MIPS: Purple: Fix multiple definition error on final linking of u-boot 
binary
  MIPS: dbau1x00: Remove unused flash driver stub

Shinya Kuribayashi (5):
  cmd_ide: Fix an unused CONFIG_AU1X00 symbol to work as intended
  MIPS: Move Alchemy Au1x00 based boards to boards.cfg
  MIPS: Move Qemu MIPS target to boards.cfg
  MIPS: Move Inca-IP targets to boards.cfg
  MIPS: Move VCT boards to boards.cfg

 Makefile |   89 --
 board/dbau1x00/Makefile  |2 +-
 board/dbau1x00/flash.c   |   43 
 board/incaip/lowlevel_init.S |2 +-
 board/purple/u-boot.lds  |5 --
 boards.cfg   |   24 +++
 common/cmd_ide.c |3 +-
 include/configs/incaip.h |9 +++-
 include/configs/vct.h|7 ++-
 9 files changed, 39 insertions(+), 145 deletions(-)
 delete mode 100644 board/dbau1x00/flash.c

diff --git a/Makefile b/Makefile
index 05b404d..6133160 100644
--- a/Makefile
+++ b/Makefile
@@ -1092,95 +1092,6 @@ smdk6400_config  :   unconfig
@echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
 
 #
-# MIPS
-#
-#
-## MIPS32 4Kc
-#
-
-incaip_100MHz_config   \
-incaip_133MHz_config   \
-incaip_150MHz_config   \
-incaip_config: unconfig
-   @mkdir -p $(obj)include
-   @[ -z $(findstring _100MHz,$@) ] || \
-   echo #define CPU_CLOCK_RATE 1 $(obj)include/config.h
-   @[ -z $(findstring _133MHz,$@) ] || \
-   echo #define CPU_CLOCK_RATE 13300 $(obj)include/config.h
-   @[ -z $(findstring _150MHz,$@) ] || \
-   echo #define CPU_CLOCK_RATE 15000 $(obj)include/config.h
-   @$(MKCONFIG) -n $@ -a incaip mips mips incaip
-
-vct_premium_config \
-vct_premium_small_config   \
-vct_premium_onenand_config \
-vct_premium_onenand_small_config \
-vct_platinum_config\
-vct_platinum_small_config  \
-vct_platinum_onenand_config\
-vct_platinum_onenand_small_config \
-vct_platinumavc_config \
-vct_platinumavc_small_config   \
-vct_platinumavc_onenand_config \
-vct_platinumavc_onenand_small_config: unconfig
-   @mkdir -p $(obj)include
-   @[ -z $(findstring _premium,$@) ] || \
-   echo #define CONFIG_VCT_PREMIUM  $(obj)include/config.h
-   @[ -z $(findstring _platinum_,$@) ] || \
-   echo #define CONFIG_VCT_PLATINUM  $(obj)include/config.h
-   @[ -z $(findstring _platinumavc,$@) ] || \
-   echo #define CONFIG_VCT_PLATINUMAVC  $(obj)include/config.h
-   @[ -z $(findstring _onenand,$@) ] || \
-   echo #define CONFIG_VCT_ONENAND  $(obj)include/config.h
-   @[ -z $(findstring _small,$@) ] || \
-   echo #define CONFIG_VCT_SMALL_IMAGE  $(obj)include/config.h
-   @$(MKCONFIG)  -n $@ -a vct mips mips vct micronas
-
-#
-## MIPS32 AU1X00
-#
-
-dbau1000_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1000 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1100_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1100 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1500_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1500 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1550_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1550 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1550_el_config :   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1550 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-gth2_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_GTH2 1 $(obj)include/config.h
-   @$(MKCONFIG) -a $@ mips mips gth2
-
-pb1000_config  :   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_PB1000 1 $(obj)include/config.h
-   @$(MKCONFIG) -a pb1x00 mips mips pb1x00
-
-qemu_mips_config   : unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_QEMU_MIPS 1 $(obj)include/config.h

Re: [U-Boot] [PATCH 2/3] MIPS: Purple: Fix multiple definition error on final linking of u-boot binary

2011-02-05 Thread Shinya Kuribayashi
On 02/03/2011 08:59 PM, daniel.schwierz...@googlemail.com wrote:
 The linker of recent toolchains complains about multiple definitions
 on final linking of u-boot binary. This patch removes all redundant
 object files from u-boot.lds those are already added to .text section
 by the linker.

Confirmed.

 That patch could not be tested but the resulting u-boot.map still looks
 good. The start symbol is at 0xB000, the environment at 0xB0008000
 so u-boot should boot.

Agreed.

 --- a/board/purple/u-boot.lds
 +++ b/board/purple/u-boot.lds
 @@ -36,11 +36,6 @@ SECTIONS
   {
 arch/mips/cpu/start.o (.text)
 board/purple/lowlevel_init.o  (.text)
 -   arch/mips/cpu/cache.o (.text)
 -   common/main.o (.text)
 -   common/dlmalloc.o (.text)
 -   common/cmd_boot.o (.text)
 -   lib/zlib.o(.text)
 . = DEFINED(env_offset) ? env_offset : .;
 common/env_embedded.o (.ppcenv)

This is ok, though we have some room for further cealnups.  With having
.text statement in the lowlevel_init.S, we could remove all these lines.

Applied anyway, thanks for the patch.
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Re: [U-Boot] [PATCH v2 0/3] MIPS: Fix failed run of MAKEALL mips script

2011-02-05 Thread Shinya Kuribayashi
On 02/03/2011 10:17 PM, daniel.schwierz...@googlemail.com wrote:
 Currently MAKEALL mips covers 21 boards and 15 of them have compile
 errors with gcc-4.3.3. This patch series fixes these boards.
 
 Changes for v2:
 - make brace style consistent in vct.h
 - delete unused board/dbau1x00/flash.c

All three patches applied, thanks.
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[U-Boot] Move MIPS boards to boards.cfg

2011-02-05 Thread Shinya Kuribayashi
Along with applying Daniel's patches, I prepared these misc patches,
trying to move all MIPS boards left in the top Makefile to boards.cfg.

Compile tested using GCC4.4-based toolchain.
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[U-Boot] [PATCH 1/5] cmd_ide: Fix an unused CONFIG_AU1X00 symbol to work as intended

2011-02-05 Thread Shinya Kuribayashi
commit 8bde63eb3f79d68f693201528dafc8ae7aa087de ([MIPS] Rename Alchemy
processor configs into CONFIG_SOC_*) forgot to pick up this one.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 common/cmd_ide.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index df7bdf5..a1f7e57 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -811,7 +811,8 @@ set_pcmcia_timing (int pmode)
 
 /* We only need to swap data if we are running on a big endian cpu. */
 /* But Au1x00 cpu:s already swaps data in big endian mode! */
-#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00)  
!defined(CONFIG_GTH2) )
+#if defined(__LITTLE_ENDIAN) || \
+   (defined(CONFIG_SOC_AU1X00)  !defined(CONFIG_GTH2))
 #define input_swap_data(x,y,z) input_data(x,y,z)
 #else
 static void
-- 
1.7.3.4

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[U-Boot] [PATCH 2/5] MIPS: Move Alchemy Au1x00 based boards to boards.cfg

2011-02-05 Thread Shinya Kuribayashi
CONFIG_GTH2 is already provided by configs/gth2.h, so we don't
generate it using the options fields in boards.cfg.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 Makefile   |   39 ---
 boards.cfg |7 +++
 2 files changed, 7 insertions(+), 39 deletions(-)

diff --git a/Makefile b/Makefile
index 05b404d..e1f3b7f 100644
--- a/Makefile
+++ b/Makefile
@@ -1136,45 +1136,6 @@ vct_platinumavc_onenand_small_config: unconfig
echo #define CONFIG_VCT_SMALL_IMAGE  $(obj)include/config.h
@$(MKCONFIG)  -n $@ -a vct mips mips vct micronas
 
-#
-## MIPS32 AU1X00
-#
-
-dbau1000_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1000 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1100_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1100 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1500_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1500 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1550_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1550 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-dbau1550_el_config :   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_DBAU1550 1 $(obj)include/config.h
-   @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
-
-gth2_config:   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_GTH2 1 $(obj)include/config.h
-   @$(MKCONFIG) -a $@ mips mips gth2
-
-pb1000_config  :   unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_PB1000 1 $(obj)include/config.h
-   @$(MKCONFIG) -a pb1x00 mips mips pb1x00
-
 qemu_mips_config   : unconfig
@mkdir -p $(obj)include
@echo #define CONFIG_QEMU_MIPS 1 $(obj)include/config.h
diff --git a/boards.cfg b/boards.cfg
index c977528..f1f2506 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -213,6 +213,13 @@ M5282EVB m68kmcf52x2 
m5282evbfreesca
 M53017EVBm68kmcf52x2 m53017evb   
freescale
 EP2500   m68kmcf52x2 ep2500  
Mercury
 microblaze-generic   microblaze  microblaze  microblaze-generic  xilinx
+dbau1000 mipsmipsdbau1x00- 
 -   dbau1x00:DBAU1000
+dbau1100 mipsmipsdbau1x00- 
 -   dbau1x00:DBAU1100
+dbau1500 mipsmipsdbau1x00- 
 -   dbau1x00:DBAU1500
+dbau1550 mipsmipsdbau1x00- 
 -   dbau1x00:DBAU1550
+dbau1550_el  mipsmipsdbau1x00- 
 -   dbau1x00:DBAU1550
+gth2 mipsmips
+pb1000   mipsmipspb1x00  - 
 -   pb1x00:PB1000
 purple   mipsmips
 tb0229   mipsmips
 PCI5441  nios2   nios2   pci5441 psyent
-- 
1.7.3.4

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[U-Boot] [PATCH 3/5] MIPS: Move Qemu MIPS target to boards.cfg

2011-02-05 Thread Shinya Kuribayashi
CONFIG_QEMU_MIPS is already provided by configs/qemu-mips.h, so we
don't generate it using the options fields in boards.cfg.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 Makefile   |5 -
 boards.cfg |1 +
 2 files changed, 1 insertions(+), 5 deletions(-)

diff --git a/Makefile b/Makefile
index e1f3b7f..9e6cf25 100644
--- a/Makefile
+++ b/Makefile
@@ -1136,11 +1136,6 @@ vct_platinumavc_onenand_small_config: unconfig
echo #define CONFIG_VCT_SMALL_IMAGE  $(obj)include/config.h
@$(MKCONFIG)  -n $@ -a vct mips mips vct micronas
 
-qemu_mips_config   : unconfig
-   @mkdir -p $(obj)include
-   @echo #define CONFIG_QEMU_MIPS 1 $(obj)include/config.h
-   @$(MKCONFIG) -a qemu-mips mips mips qemu-mips
-
 #
 # Nios
 #
diff --git a/boards.cfg b/boards.cfg
index f1f2506..cb67d2a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -221,6 +221,7 @@ dbau1550_el  mipsmips
dbau1x00-
 gth2 mipsmips
 pb1000   mipsmipspb1x00  - 
 -   pb1x00:PB1000
 purple   mipsmips
+qemu_mipsmipsmipsqemu-mips   - 
 -   qemu-mips
 tb0229   mipsmips
 PCI5441  nios2   nios2   pci5441 psyent
 PK1C20   nios2   nios2   pk1c20  psyent
-- 
1.7.3.4

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[U-Boot] [PATCH 4/5] MIPS: Move Inca-IP targets to boards.cfg

2011-02-05 Thread Shinya Kuribayashi
At the same time, fix up CPU_CLOCK_RATE to have the CONFIG_ prefix to
work with boards.cfg.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 Makefile |   13 -
 board/incaip/lowlevel_init.S |2 +-
 boards.cfg   |4 
 include/configs/incaip.h |9 ++---
 4 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/Makefile b/Makefile
index 9e6cf25..3fe0596 100644
--- a/Makefile
+++ b/Makefile
@@ -1098,19 +1098,6 @@ smdk6400_config  :   unconfig
 ## MIPS32 4Kc
 #
 
-incaip_100MHz_config   \
-incaip_133MHz_config   \
-incaip_150MHz_config   \
-incaip_config: unconfig
-   @mkdir -p $(obj)include
-   @[ -z $(findstring _100MHz,$@) ] || \
-   echo #define CPU_CLOCK_RATE 1 $(obj)include/config.h
-   @[ -z $(findstring _133MHz,$@) ] || \
-   echo #define CPU_CLOCK_RATE 13300 $(obj)include/config.h
-   @[ -z $(findstring _150MHz,$@) ] || \
-   echo #define CPU_CLOCK_RATE 15000 $(obj)include/config.h
-   @$(MKCONFIG) -n $@ -a incaip mips mips incaip
-
 vct_premium_config \
 vct_premium_small_config   \
 vct_premium_onenand_config \
diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S
index fe525ec..b765795 100644
--- a/board/incaip/lowlevel_init.S
+++ b/board/incaip/lowlevel_init.S
@@ -283,7 +283,7 @@ lowlevel_init:
 
/* EBU, CGU and SDRAM Initialization.
 */
-   li  a0, CPU_CLOCK_RATE
+   li  a0, CONFIG_CPU_CLOCK_RATE
movet0, ra
 
/* We rely on the fact that neither ebu_init() nor cgu_init() nor 
sdram_init()
diff --git a/boards.cfg b/boards.cfg
index cb67d2a..d3edc9f 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -219,6 +219,10 @@ dbau1500 mipsmips
dbau1x00-
 dbau1550 mipsmipsdbau1x00- 
 -   dbau1x00:DBAU1550
 dbau1550_el  mipsmipsdbau1x00- 
 -   dbau1x00:DBAU1550
 gth2 mipsmips
+incaip   mipsmips
+incaip_100MHzmipsmipsincaip  - 
 -   incaip:CPU_CLOCK_RATE=1
+incaip_133MHzmipsmipsincaip  - 
 -   incaip:CPU_CLOCK_RATE=13300
+incaip_150MHzmipsmipsincaip  - 
 -   incaip:CPU_CLOCK_RATE=15000
 pb1000   mipsmipspb1x00  - 
 -   pb1x00:PB1000
 purple   mipsmips
 qemu_mipsmipsmipsqemu-mips   - 
 -   qemu-mips
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index b7ba6f4..f2950e8 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -31,9 +31,12 @@
 #define CONFIG_MIPS32  1   /* MIPS 4Kc CPU core*/
 #define CONFIG_INCA_IP 1   /* on a INCA-IP Board   */
 
-#ifndefCPU_CLOCK_RATE
-/* allowed values: 1, 13300, and 15000 */
-#define CPU_CLOCK_RATE 15000   /* default: 150 MHz clock for the MIPS 
core */
+/*
+ * Clock for the MIPS core (MHz)
+ * allowed values: 1, 13300, and 15000 (default)
+ */
+#ifndef CONFIG_CPU_CLOCK_RATE
+#define CONFIG_CPU_CLOCK_RATE  15000
 #endif
 
 #define INFINEON_EBU_BOOTCFG   0x40C4  /* CMULT = 8 */
-- 
1.7.3.4

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[U-Boot] [PATCH 5/5] MIPS: Move VCT boards to boards.cfg

2011-02-05 Thread Shinya Kuribayashi
Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 Makefile   |   32 
 boards.cfg |   12 
 2 files changed, 12 insertions(+), 32 deletions(-)

diff --git a/Makefile b/Makefile
index 3fe0596..6133160 100644
--- a/Makefile
+++ b/Makefile
@@ -1092,38 +1092,6 @@ smdk6400_config  :   unconfig
@echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
 
 #
-# MIPS
-#
-#
-## MIPS32 4Kc
-#
-
-vct_premium_config \
-vct_premium_small_config   \
-vct_premium_onenand_config \
-vct_premium_onenand_small_config \
-vct_platinum_config\
-vct_platinum_small_config  \
-vct_platinum_onenand_config\
-vct_platinum_onenand_small_config \
-vct_platinumavc_config \
-vct_platinumavc_small_config   \
-vct_platinumavc_onenand_config \
-vct_platinumavc_onenand_small_config: unconfig
-   @mkdir -p $(obj)include
-   @[ -z $(findstring _premium,$@) ] || \
-   echo #define CONFIG_VCT_PREMIUM  $(obj)include/config.h
-   @[ -z $(findstring _platinum_,$@) ] || \
-   echo #define CONFIG_VCT_PLATINUM  $(obj)include/config.h
-   @[ -z $(findstring _platinumavc,$@) ] || \
-   echo #define CONFIG_VCT_PLATINUMAVC  $(obj)include/config.h
-   @[ -z $(findstring _onenand,$@) ] || \
-   echo #define CONFIG_VCT_ONENAND  $(obj)include/config.h
-   @[ -z $(findstring _small,$@) ] || \
-   echo #define CONFIG_VCT_SMALL_IMAGE  $(obj)include/config.h
-   @$(MKCONFIG)  -n $@ -a vct mips mips vct micronas
-
-#
 # Nios
 #
 
diff --git a/boards.cfg b/boards.cfg
index d3edc9f..b8369e1 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -227,6 +227,18 @@ pb1000   mipsmips
pb1x00  -
 purple   mipsmips
 qemu_mipsmipsmipsqemu-mips   - 
 -   qemu-mips
 tb0229   mipsmips
+vct_premium  mipsmipsvct 
micronas   -   vct:VCT_PREMIUM
+vct_premium_smallmipsmipsvct 
micronas   -   vct:VCT_PREMIUM,VCT_SMALL_IMAGE
+vct_premium_onenand  mipsmipsvct 
micronas   -   vct:VCT_PREMIUM,VCT_ONENAND
+vct_premium_onenand_smallmipsmipsvct 
micronas   -   vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE
+vct_platinum mipsmipsvct 
micronas   -   vct:VCT_PLATINUM
+vct_platinum_small   mipsmipsvct 
micronas   -   vct:VCT_PLATINUM,VCT_SMALL_IMAGE
+vct_platinum_onenand mipsmipsvct 
micronas   -   vct:VCT_PLATINUM,VCT_ONENAND
+vct_platinum_onenand_small   mipsmipsvct 
micronas   -   vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE
+vct_platinumavc  mipsmipsvct 
micronas   -   vct:VCT_PLATINUMAVC
+vct_platinumavc_smallmipsmipsvct 
micronas   -   vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE
+vct_platinumavc_onenand  mipsmipsvct 
micronas   -   vct:VCT_PLATINUMAVC,VCT_ONENAND
+vct_platinumavc_onenand_small mips   mipsvct 
micronas   -   vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE
 PCI5441  nios2   nios2   pci5441 psyent
 PK1C20   nios2   nios2   pk1c20  psyent
 EVB64260 powerpc 74xx_7xxevb64260- 
 -   EVB64260
-- 
1.7.3.4

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Re: [U-Boot] [PATCH v5 0/8] those series patches for add ben nanonote board

2011-01-10 Thread Shinya Kuribayashi
Thanks for keeping on working on jz4740 patchset.

On 01/10/2011 01:18 AM, Xiangfu Liu wrote:
 Hi Wolfgang
   those patches are for add xburst jz4740 and Ben NanoNote(named qi_lb60) to 
 U-Boot
 
 some info about xburst jz4740:
   the xburst jz4740 is recently added to linux 2.6.36
   and it's support the device Ben NanoNote out of box,

  :
  :

Very useful comments, so such info should also be put into patch
description of the relevant changes; Jz4740 SoC overview and about USB
boot, respectively.

 
 FIXED in [PATCH v3]
   1. describe what Jz4740 SoC
   2. remove the ENDIANNESS in config.mk
   3. don't breaks the 80-charcter-wide rule
   4. get rid of #if 0
   5. use proper I/O accessors to access registers.
   6. remove C++ comments, cleanup code style.
 
 FIXED in [PATCH v4]
   1. add Entry to MAINTAINERS and boards.cfg
   2. add ben nanonote(qi_lb60) to Makefile
   3. tested with CROSS_COMPILE=mips_4KCle- ./MAKEALL mips_el
 
 FIXED in [PATCH v5]
   1. remove nand_spl/nand_boot_jz4740.c
   2. some cleanup

Having a quick glance, v5 still has issues (e.g. it gets split into
8 patches in an improper way).  I'll have a closer look later.

By the way, I've uploaded xl/jz4740-ben-nanonote-v5 branch (and older
v2/v3/v4 branches as well) to make reviews easier for involved people.
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Re: [U-Boot] [RFC 0/2] Add support for bootstrap stage and compressed U-Boot image

2010-12-03 Thread Shinya Kuribayashi
Hi,

On 11/30/2010 11:35 PM, Luigi 'Comio' Mantellini wrote:
 Look the following benchmark (qemu-mips board):
 
 U-Boot Vanilla
 179600 bytes u-boot.bin
 
 Bootstrap code w/o compresion (memcpy)
 189224 bytes u-boot-bootstrap.bin
 -- size 105%
 
 Bootstrap code using BZIP2 compression
 114388 bytes u-boot-bootstrap.bin
 --size 64%
 
 Bootstrap code using GZIP compression
 114204 bytes u-boot-bootstrap.bin
 --size 64%
 
 Bootstrap code using LZMA compression
 89456 bytes u-boot-bootstrap.bin
 --size 50% -- BEST
 
 Bootstrap code using LZO compression
 104388 bytes u-boot-bootstrap.bin
 --size 58%

Personally, I don't much care about the size of U-Boot bin itself
(179kB or 104kB), but it depends.  And I'd like to see how much boot
time of U-Boot improved on your environment.

  The following patches introduce the bootstrap support that enable to have a
 compressed U-Boot image. The bootstrap code supports the uncompressed as
 well as compressed payloads, using LZMA, GZIP, BZIP2 and LZO.

 Actually I developed just the mips version (using qemu-mips board)...

 Please see the Patch #1 for the required defines to enable the required
 features.

Not having a closer look at the patch yet, some general comments:

* Two patches posted, but contains multiple logical changes:
  - CONFIG_BOOTSTRAP* build infrastructure (main body)
  - common: Introduce console_bootstrap
  - MIPS: Separate _machine_restart() and do_reset() into reset.c
  - MIPS: config.mk: Append -g debug option to PLATFORM_CPPFLAGS,
which is already provided by $(TOPDIR)/config.mk.
  - MIPS: qemu_mips: bootstrap support enablement (experimental)

  Please break into logical changes, please.

* '_bootstrap' suffixed files are almost identical to the original
  ones:
  - arch/mips/cpu/reset{,_bootstrap}.c
  - arch/mips/cpu/start{,_bootstrap}.S
  - board/qemu-mips/u-boot{,_bootstrap}.lds

  Is there any way not to duplicate them?  Do we really need to have
  _bootstrap files separated?

Once this bootstrap feature approved as general U-Boot feature, I'd
like to take MIPS-related changes.

Thanks,

  Ralf
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Re: [U-Boot] [RFC 0/2] Add support for bootstrap stage and compressed U-Boot image

2010-12-03 Thread Shinya Kuribayashi
On 12/04/2010 11:32 AM, Shinya Kuribayashi wrote:
 Once this bootstrap feature approved as general U-Boot feature, I'd
 like to take MIPS-related changes.
 
 Thanks,
 
   Ralf

Not Ralf!  Needs two cups of coffee to wake up...

  Shinya
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Re: [U-Boot] [STATUS] Using Patchwork

2010-11-19 Thread Shinya Kuribayashi
On 11/18/10 9:54 PM, Wolfgang Denk wrote:
 the U-Boot Patchwork setup is now mostly complete (except that Shinya
 Kuribayashi has not registered yet).

Sorry I'm late, registered as skuribay.

By the way, maybe good opportunity to drop the leading [U-Boot] tag
from  Subject:  line?  Still slightly annoying, even though Patchwork
nicely concatenate consecutive multiple square brackets into single
one?
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Re: [U-Boot] [PATCH 1/5] those files are jz4740 base files

2010-11-14 Thread Shinya Kuribayashi
On 11/11/2010 12:37 PM, Xiangfu Liu wrote:
 From: Xiangfu Liu xian...@sharism.cc

If possible, please describe what Jz4740 SoC is, an overview of JzRISC
processor, where this patch is from or where to get the original work,
and so on.

It also would be nice we could have Signed-off-by: or Acked-by: from
Ingenic people, as some files contains Ingenic copyright statements.
Please consider.

 diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk
 new file mode 100644
 index 000..f43f53b
 --- /dev/null
 +++ b/arch/mips/cpu/xburst/config.mk
 @@ -0,0 +1,33 @@
 +#
 +# (C) Copyright 2003
 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de
 +#
 +# See file CREDITS for list of people who contributed to this
 +# project.
 +#
 +# This program is free software; you can redistribute it and/or
 +# modify it under the terms of the GNU General Public License as
 +# published by the Free Software Foundation; either version 2 of
 +# the License, or (at your option) any later version.
 +#
 +# This program is distributed in the hope that it will be useful,
 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +# GNU General Public License for more details.
 +#
 +# You should have received a copy of the GNU General Public License
 +# along with this program; if not, write to the Free Software
 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 +# MA 02111-1307 USA
 +#
 +v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | 
 cut -d. -f2)
 +MIPSFLAGS:=$(shell \
 +if [ $v -lt 14 ]; then \
 + echo -mcpu=4kc; \
 +else \
 + echo -march=4kc -mtune=4kc; \
 +fi)
 +
 +MIPSFLAGS += $(ENDIANNESS) -mabicalls -mips32

ENDIANNESS looks unused.  Jz47xx series are little endian SoCs, then
let's remove it.

 +PLATFORM_CPPFLAGS += $(MIPSFLAGS)
 diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
 new file mode 100644
 index 000..682debf
 --- /dev/null
 +++ b/arch/mips/cpu/xburst/cpu.c
 @@ -0,0 +1,158 @@
[snip]
 +void flush_icache_all(void)
 +{
 + u32 addr, t = 0;
 +
 + asm volatile (mtc0 $0, $28); /* Clear Taglo */
 + asm volatile (mtc0 $0, $29); /* Clear TagHi */
 +
 + for (addr = KSEG0; addr  KSEG0 + CONFIG_SYS_ICACHE_SIZE;
 +  addr += CONFIG_SYS_CACHELINE_SIZE) {
 + cache_op(Index_Store_Tag_I, addr);
 + }
 +
 + /* invalidate btb */
 + asm volatile (
 + .set mips32\n\t
 + mfc0 %0, $16, 7\n\t
 + nop\n\t
 + ori %0,2\n\t
 + mtc0 %0, $16, 7\n\t
 + .set mips2\n\t
 + :
 + : r (t));
 +}

As pointed out before, incorrect use of assembler control.  Why set
mips32 without pushing the current control info, and why set it back
to mips2?  'noreorder' is also missing here.

asm volatile (
.set push\n\t
.set noreorder\n\t
.set mips32\n\t
mfc0 %0, $16, 7\n\t
nop\n\t
ori %0, 2\n\t
mtc0 %0, $16, 7\n\t
.set pop\n\t
:
: r (t));
Hmm?

 +void flush_dcache_all(void)
 +{
 + u32 addr;
 +
 + for (addr = KSEG0; addr  KSEG0 + CONFIG_SYS_DCACHE_SIZE; 
 +  addr += CONFIG_SYS_CACHELINE_SIZE) {
 + cache_op(Index_Writeback_Inv_D, addr);
 + }
 +
 + asm volatile (sync);
 +}
 +
 +void flush_cache_all(void)
 +{
 + flush_dcache_all();
 + flush_icache_all();
 +}
 diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
 new file mode 100644
 index 000..b8e9a15
 --- /dev/null
 +++ b/arch/mips/cpu/xburst/jz4740.c

I couldn't mention about its validity of the following DRAM init code
from the technically POV.  As long as it works for you, I'm ok.  Most
of the code looks well-written conforming to the coding styles.  A few
trivial cleanups, please.

 @@ -0,0 +1,257 @@
 +/*
 + * Jz4740 common routines
 + *
 + *  Copyright (c) 2006
 + *  Ingenic Semiconductor, jl...@ingenic.cn
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 + * MA 02111-1307 USA
 + */
 +
 +#include config.h
 +#include common.h
 +
 +#include asm/jz4740.h
 +
 +/* PLL output clock = EXTAL * NF / (NR * NO)
 + *
 + * NF = 

Re: [U-Boot] MIPS relocation?

2010-10-04 Thread Shinya Kuribayashi
On 10/5/2010 2:02 AM, Wolfgang Denk wrote:
 Dear Xiangfu Liu,
 
 In message 4ca9ec8e.9080...@openmobilefree.net you wrote:

 by applied this patch. both works fine. 

Xiangfu, thank for your testing!  I don't have the latest U-Boot ready
for test/debug right now, nor couldn't follow the ongoing discussions
precisely.

 Any MIPS tool chain experts out there to try and follow-up for MIPS
 what Albert is doing for ARM right now?

I'll have a look at what's discussed, then think about what to do.
-- 
Shinya Kuribayashi
Renesas Electronics
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[U-Boot] [GIT PULL] MIPS patch

2010-09-03 Thread Shinya Kuribayashi
The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854:

  Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master (2010-08-18 
21:16:35 +0200)

are available in the git repository at:

  git://www.denx.de/git/u-boot-mips.git master

Xiangfu Liu (1):
  MIPS: update the MIPS u-boot.lds

 board/dbau1x00/u-boot.lds|2 +-
 board/gth2/u-boot.lds|2 +-
 board/incaip/u-boot.lds  |2 +-
 board/pb1x00/u-boot.lds  |2 +-
 board/purple/u-boot.lds  |2 +-
 board/qemu-mips/u-boot.lds   |2 +-
 examples/standalone/mips.lds |2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)
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Re: [U-Boot] [PATCH 0/2] fix little endian build

2010-08-31 Thread Shinya Kuribayashi
On 8/31/2010 10:36 AM, Shinya Kuribayashi wrote:
 As said in the previous mail the patch is tentative and won't
 work with ELDK, and as fas as I could see nothing has been
 changed since my version.
 
 So I'm overlooking something, will have to think about it.

Oh, I remember now.  The aim of the patch is to make it possible to
generate elf images in both Big- and Little-endian, using only either
mips_4KC- or mips_4KCle- toolchain:

#   CROSS_COMPILE   Target  Expected endianness
--
1   mips_4KC-   dbau1550_config Big-Endian
2   mips_4KCle- dbau1550_config Big-Endian
3   mips_4KC-   dbau1550_el_config  Little-Endian
4   mips_4KCle- dbau1550_el_config  Little-Endian

And option 2) and 3) may not work when using ELDK.
-- 
Shinya Kuribayashi
Renesas Electronics
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Re: [U-Boot] [PATCH 0/2] fix little endian build

2010-08-30 Thread Shinya Kuribayashi
On 8/30/10 6:53 PM, Xiangfu Liu wrote:
 can we apply those patch to MIPS-branch first??

 [PATCH 1/2] update the MIPS u-boot.lds

I'll push 1/2 to u-boot-mips and request pull later.

 [PATCH 2/2] change the way of build little endian board

but this 2/2 looks problematic.

As said in the previous mail the patch is tentative and won't
work with ELDK, and as fas as I could see nothing has been
changed since my version.  Let me make sure, have you confirmed
it builds with ELDK?
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Re: [U-Boot] [PATCH 0/2] fix little endian build

2010-08-30 Thread Shinya Kuribayashi
On 8/30/10 10:43 PM, Xiangfu Liu wrote:
 [PATCH 2/2] change the way of build little endian board

 but this 2/2 looks problematic.

 As said in the previous mail the patch is tentative and won't
 work with ELDK, and as fas as I could see nothing has been
 changed since my version.  Let me make sure, have you confirmed
 it builds with ELDK?
 Hi Shinya

 yes, I think it not break the ELDK build.

 I have test with
 BUILD_DIR=../u-boot-build \
 MAKEALL_LOGDIR=../u-boot-log \
 ./MAKEALL mips_el mips

 all boards compile fine.

What about the endianness of generated u-boot ELF image then?

$ CROSS_COMPILE=mips_4KCle- ./MAKEALL dbau1550_el_config
$ file u-boot

And could you also provide the version info, please?

$ mips_4KCle-gcc --version
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Re: [U-Boot] [PATCH 0/2] fix little endian build

2010-08-30 Thread Shinya Kuribayashi
On 8/31/2010 10:00 AM, Xiangfu Liu wrote:
 xian...@openmobilefree:~/u-boot/u-boot.git$ file u-boot
 u-boot: ELF 32-bit LSB executable, MIPS, MIPS32 version 1 (SYSV), statically 
 linked, not stripped

Ah, it's LSB, got it.

 As said in the previous mail the patch is tentative and won't
 work with ELDK, and as fas as I could see nothing has been
 changed since my version.

So I'm overlooking something, will have to think about it.
-- 
Shinya Kuribayashi
Renesas Electronics
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Re: [U-Boot] [PATCH 0/2] fix little endian build

2010-08-30 Thread Shinya Kuribayashi
On 8/31/2010 10:00 AM, Xiangfu Liu wrote:
 xian...@openmobilefree:~/u-boot/u-boot.git$ file u-boot
 u-boot: ELF 32-bit LSB executable, MIPS, MIPS32 version 1 (SYSV), statically 
 linked, not stripped

My bad sorry.  Could you provide output from readelf?

$ readelf u-boot
-- 
Shinya Kuribayashi
Renesas Electronics
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Re: [U-Boot] [PATCH 00/26] arm: add full relocation / cache support

2010-08-13 Thread Shinya Kuribayashi
On 8/13/10 5:17 AM, Wolfgang Denk wrote:
 http://elinux.org/CELF_Project_Proposal/Rework_ARM_architecture_support_in_U-Boot

 Yes, this is the one.
[snip[
 If you read the thread you can see that both Heikos tests and other
 testers who tried that code see dramatic speed improvements due to
 enabling the cache; in addition to that we win all the flexibility of
 RAM usage we are used to from other architectures.

Thanks, I'll think about it
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Re: [U-Boot] [PATCH 00/26] arm: add full relocation / cache support

2010-08-12 Thread Shinya Kuribayashi
On 08/12/2010 03:15 AM, Heiko Schocher wrote:
 This patch series add full relocation and cache support for arm
 based boards. I test this for arm1136, arm_cortexa8 and arm926ejs
 based boards.
 
 Relocation support:
 
 !! This change is not compatible to old code !!
 
 If you want to compile in old style, you can set
 
 CONFIG_SYS_ARM_WITHOUT_RELOC
 
 but this possibility will be removed soon, so please
 adapt your board(s)
 
 changed arch/arm/lib/board.c to get inline with arch/powerpc/lib/board.c
 maybe it is possible to snyc them to one arch/generic/lib/board.c?
 
 This approach is similiar to powerpc, so there is a need for
 an initial stack pointer addr defined through CONFIG_SYS_INIT_SP_ADDR.
 
 Please also read doc/README.arm-relocation There is more
 info what is done, and maybe should be done.
 
It would be gratefull if someone could expalain a bit about this big
change.  What's the primary motivation for full relocation?  I found
a Wiki page (below), is this the one?

http://elinux.org/CELF_Project_Proposal/Rework_ARM_architecture_support_in_U-Boot

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Re: [U-Boot] [PATCH 00/26] arm: add full relocation / cache support

2010-08-12 Thread Shinya Kuribayashi
On 08/12/2010 09:50 PM, Shinya Kuribayashi wrote:
 It would be gratefull if someone could expalain a bit about this big
 change.  What's the primary motivation for full relocation?

Forgot to mention; the reason why I'd like to know is, because I'm
an ARM newbie, and interested in such topics.
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Re: [U-Boot] [PATCH] update the MIPS u-boot.lds

2010-08-03 Thread Shinya Kuribayashi
Thanks for following-up,

On 08/03/2010 12:30 AM, Xiangfu Liu wrote:
 From: Xiangfu Liu xian...@sharism.cc
 
 Hi Wolfgang

No greetings in the longlog, please.  Such comments, supplements are
to go below the three-dashes (---):

From the document, if set all arguments in OUTPUT_FORMAT
 to tradbigmips, then even add -EL to gcc we still get 
 EB format.
 
 Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
 ---

(Here...)

  board/dbau1x00/u-boot.lds|2 +-
  board/gth2/u-boot.lds|2 +-
  board/incaip/u-boot.lds  |2 +-
  board/pb1x00/u-boot.lds  |2 +-
  board/purple/u-boot.lds  |2 +-
  board/qemu-mips/u-boot.lds   |2 +-
  examples/standalone/mips.lds |2 +-
  7 files changed, 7 insertions(+), 7 deletions(-)
[snip]
 diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds
 index 9a6cd1b..3c4fbe3 100644
 --- a/board/pb1x00/u-boot.lds
 +++ b/board/pb1x00/u-boot.lds
 @@ -24,7 +24,7 @@
  /*
  OUTPUT_FORMAT(elf32-bigmips, elf32-bigmips, elf32-bigmips)
  */
 -OUTPUT_FORMAT(elf32-tradbigmips, elf32-tradbigmips, elf32-tradbigmips)
 +OUTPUT_FORMAT(elf32-tradbigmips, elf32-tradbigmips, 
 elf32-tradlittlemips)
  OUTPUT_ARCH(mips)
  ENTRY(_start)
  SECTIONS

According to MAKEALL script, pb1000_config is only used in Little-
endian, so its default endian should be set to LE as well.  I too
missed this point in my previous patch.

With fixing above nits, feel free to add:

Acked-by: Shinya Kuribayashi skuri...@pobox.com

Wolfgang: Could you take care of this patch (hopefully revised one)
directly into your master. The fix is obvious.
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Re: [U-Boot] [PATCH] update the MIPS u-boot.lds

2010-08-03 Thread Shinya Kuribayashi
On 08/04/2010 12:29 AM, Xiangfu Liu wrote:
 On 08/03/2010 07:36 PM, Shinya Kuribayashi wrote:
 Aconfccording to MAKEALL script, pb1000_ig is only used in Little-
 endian, so its default endian should be set to LE as well.  I too
 missed this point in my previous patch.
 
 thanks.

You still forgot to fix this part:

| No greetings in the longlog, please.  Such comments, supplements are
| to go below the three-dashes (---):

In other words, please remove Hi Wolfgang line, and in this case
v1: and v2: at the same time.  The resulting longlog would be
like this:

longlog
From the document, if set all arguments in OUTPUT_FORMAT
to tradbigmips, then even add -EL to gcc we still get
EB format.

pb1x00 is only used in Little-endian, 
so its default endian should be set to LE as well
 
Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Shinya Kuribayashi skuri...@pobox.com
/longlog
---

 Hi Wolfgang, 

 v1: ...

 v2: ...

 board/dbau1x00/u-boot.lds|2 +-
 board/gth2/u-boot.lds|2 +-
 board/incaip/u-boot.lds  |2 +-
 board/pb1x00/u-boot.lds  |2 +-
 board/purple/u-boot.lds  |2 +-
 board/qemu-mips/u-boot.lds   |2 +-
 examples/standalone/mips.lds |2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

 :
 :

_

I recommend you to read the patch submission guide first.
http://www.denx.de/wiki/U-Boot/Patches

 With fixing above nits, feel free to add:

 Acked-by: Shinya Kuribayashiskuri...@pobox.com

 (by the way. I manually added this line to email.
 is the another way to add Acked-by like Signed-off-by is -s)

Git doesn't support such feature itself, so edit commitlog manually.
As an alternative, StackedGit can append those tags by stg refresh
--sign/--ack.  Just for your information.
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Re: [U-Boot] [PATCH] [mips] add $(ENDIANNESS) option when link hello_world example

2010-07-26 Thread Shinya Kuribayashi
On 7/27/10 12:06 AM, Xiangfu Liu wrote:
 what about split this patch to two:
 one is all *.lds files,
 the other one is for the argument,

Sounds good.

 I have one question here. if we decete the board cpu by
 CONFIG_CPU_LITTLE_ENDIAN.
 why we need check the toolchina again.

The answer is described right above:

+# We explicitly add the endianness specifier if needed, this allows
+# to compile kernels with a toolchain for the other endianness. We
+# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
+# when fed the toolchain default!
+#
+# Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of
+# 2006-10-10 don't properly change the predefined symbols if -EB / -EL
+# are used, so we kludge that here.  A bug has been filed at
+# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413.

This part is copied from Linux/MIPS kernel, and has been working
with the wide range of GCC versions for years.

 the original U-Boot is detect -EL/-EB by toolchain name. maybe the
 CONFIG_CPU_LITTLE_ENDIAN option is better.

True.  CONFIG_CPU_LITTLE_ENDIAN (and CONFIG_CPU_BIG_ENDIAN) configs
are also derived from Linux/MIPS kernel, and IMO they're right steps
toward cross-endian build support.  U-Boot, however, tends to think
it less important, so don't hold your breath about this  approach to
be accepted.  Cross-endian build is common practice for MIPS people,
but might be uncommon for other architectures.

Note that CONFIG_CPU_LITTLE_ENDIAN works not only for cross-endian
builds, but also toolchain default endian builds with non-ELDK tools.
If CONFIG_CPU_LITTLE_ENDIAN is not accepted, we have to think an
alternative way.
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Re: [U-Boot] [PATCH] [mips] add $(ENDIANNESS) option when link hello_world example

2010-07-21 Thread Shinya Kuribayashi
On 07/21/2010 07:27 PM, Xiangfu Liu wrote:
 form the document about OUTPUT_FORMAT(default, big, little)
 If neither -EB nor -EL are used, output format will be the first argument. 
 If -EB is used, the output format will be the second argument. 
 If -EL is used, the output format will be the third argument. 
 
 so change the mips.lds third argument to little and add
 $(ENDIANNESS) to linker args.
 
 this patch have tested with ./MAKEALL mips mips_el

Little endian build is one of the outstanding issues for MIPS ports[1].

There are several technical issues, 1) lack of powerful configration
infrastructure (it's drastically improved these days, so not a problem
any more), 2) *LDFLAGS things are not propageted throughout the build
system properly, especially through examples/standalone (it seems this
issue is also addressed via distributed STANDALONE_LOAD_ADDR).  Or in
some cases, 3) you might want to generate u-boot image with different
endiannness from toolchain's default (native build vs. non-native).
And finally 4) ELDK toolchains vs. non-ELDK tools issues.  As for #4,
you'll see troublesome -dumpspecs outputs from ELDK toolchain[2].

[1] 
http://search.gmane.org/?query=mips+little+endiangroup=gmane.comp.boot-loaders.u-boot
[2] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/31998

Anyway, to move discussion forward we need to sort out what's the most
priority, what's next, what's nice to have, and what's not.

 diff --git a/arch/mips/config.mk b/arch/mips/config.mk
 index aa06761..cc3719f 100644
 --- a/arch/mips/config.mk
 +++ b/arch/mips/config.mk
 @@ -23,7 +23,7 @@
  
  CROSS_COMPILE ?= mips_4KC-
  
 -STANDALONE_LOAD_ADDR = 0x8020 -T mips.lds
 +STANDALONE_LOAD_ADDR = 0x8020 -T mips.lds $(ENDIANNESS)
  
  PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
  
 diff --git a/examples/standalone/mips.lds b/examples/standalone/mips.lds
 index 717b201..63a1c92 100644
 --- a/examples/standalone/mips.lds
 +++ b/examples/standalone/mips.lds
 @@ -24,7 +24,7 @@
  /*
  OUTPUT_FORMAT(elf32-bigmips, elf32-bigmips, elf32-bigmips)
  */
 -OUTPUT_FORMAT(elf32-tradbigmips, elf32-tradbigmips, elf32-tradbigmips)
 +OUTPUT_FORMAT(elf32-tradbigmips, elf32-tradbigmips, 
 elf32-tradlittlemips)
  OUTPUT_ARCH(mips)
  SECTIONS
  {

Attached is one of my holding patches for little endian builds.  This
looks mostly good and works for me, but won't work for ELDK toolchain.

Having additional hooks for ELDK tools somewhere in config.mk files
would probably work, but I don't have enough spare time these days.
Someone please cook it up into appropriate shape, please?

  Shinya

---
 Makefile |1 +
 arch/mips/config.mk  |   27 +--
 arch/mips/cpu/config.mk  |8 
 board/dbau1x00/u-boot.lds|2 +-
 board/gth2/u-boot.lds|2 +-
 board/incaip/u-boot.lds  |2 +-
 board/pb1x00/u-boot.lds  |2 +-
 board/purple/u-boot.lds  |2 +-
 board/qemu-mips/u-boot.lds   |2 +-
 examples/standalone/mips.lds |2 +-
 include/configs/pb1x00.h |2 ++
 11 files changed, 35 insertions(+), 17 deletions(-)

diff --git a/Makefile b/Makefile
index 9cea069..5c9fb48 100644
--- a/Makefile
+++ b/Makefile
@@ -2306,6 +2306,7 @@ dbau1550_config   :   unconfig
 dbau1550_el_config :   unconfig
@mkdir -p $(obj)include
@echo #define CONFIG_DBAU1550 1 $(obj)include/config.h
+   @echo #define CONFIG_CPU_LITTLE_ENDIAN $(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
 
 gth2_config:   unconfig
diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index aa06761..f5d9ac5 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -23,8 +23,6 @@
 
 CROSS_COMPILE ?= mips_4KC-
 
-STANDALONE_LOAD_ADDR = 0x8020 -T mips.lds
-
 PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
 
 #
@@ -50,3 +48,28 @@ PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
 PLATFORM_CPPFLAGS  += -G 0 -mabicalls -fpic
 PLATFORM_CPPFLAGS  += -msoft-float
 PLATFORM_LDFLAGS   += -G 0 -static -n -nostdlib
+
+#
+# We explicitly add the endianness specifier if needed, this allows
+# to compile kernels with a toolchain for the other endianness. We
+# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
+# when fed the toolchain default!
+#
+# Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of
+# 2006-10-10 don't properly change the predefined symbols if -EB / -EL
+# are used, so we kludge that here.  A bug has been filed at
+# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413.
+#
+UNDEF_ALL += -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__
+UNDEF_ALL += -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__
+PREDEF_BE += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__
+PREDEF_LE += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
+ifdef CONFIG_CPU_LITTLE_ENDIAN
+PLATFORM_CPPFLAGS  += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || 
echo -EL $(UNDEF_ALL) $(PREDEF_LE))

[U-Boot] [GIT PULL] MIPS updates

2010-01-20 Thread Shinya Kuribayashi
Hi,

please pull the following unaligned.h patch required by zlib.c.

Thanks in advance,

  Shinya
---

The following changes since commit 50ef25ef24eccd8e69d2c1ccc97b3f7e30109f51:
  Michal Simek (1):
microblaze: zlib needs asm/unaligned.h

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Shinya Kuribayashi (1):
  MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernel

 include/asm-mips/unaligned.h |   26 ++
 1 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-mips/unaligned.h
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[U-Boot] [PATCH 1/2] MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernel

2010-01-10 Thread Shinya Kuribayashi
with a few adjustments for U-Boot.  This fixes the following build error:

make -C lib_generic/
zlib.c:31:27: error: asm/unaligned.h: No such file or directory
zlib.c: In function 'inflate_fast':
zlib.c:641: warning: implicit declaration of function 'get_unaligned'
make[1]: *** [zlib.o] Error 1
make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic'
make: *** [lib_generic/libgeneric.a] Error 2

Reported-by: Himanshu Chauhan himan...@symmetricore.com
Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 include/asm-mips/unaligned.h |   26 ++
 1 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-mips/unaligned.h

diff --git a/include/asm-mips/unaligned.h b/include/asm-mips/unaligned.h
new file mode 100644
index 000..da6a347
--- /dev/null
+++ b/include/asm-mips/unaligned.h
@@ -0,0 +1,26 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007 Ralf Baechle (r...@linux-mips.org)
+ */
+#ifndef _ASM_MIPS_UNALIGNED_H
+#define _ASM_MIPS_UNALIGNED_H
+
+#include compiler.h
+#if defined(__MIPSEB__)
+# define get_unaligned __get_unaligned_be
+# define put_unaligned __put_unaligned_be
+#elif defined(__MIPSEL__)
+# define get_unaligned __get_unaligned_le
+# define put_unaligned __put_unaligned_le
+#else
+#  error MIPS, but neither __MIPSEB__, nor __MIPSEL__???
+#endif
+
+# include linux/unaligned/le_byteshift.h
+# include linux/unaligned/be_byteshift.h
+# include linux/unaligned/generic.h
+
+#endif /* _ASM_MIPS_UNALIGNED_H */
-- 
1.6.6

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[U-Boot] [PATCH 2/2] MIPS: lib_mips/board.c: Fix undefined getenv_IPaddr build error

2010-01-10 Thread Shinya Kuribayashi
In the commit 6ac59c55 (net: pull CONFIG checks out of source and into
makefile), net/net.o is changed to be built-in only when CONFIG_CMD_NET
is enabled, while lib_mips/board.c has a reference to getenv_IPaddr()
left as-is.

And now Micronas VCT Platinum AVC board builds (vct_platinumavc*_config)
failed as follows, because they don't have ethernet support and disable
CONFIG_CMD_NET option:

lib_mips/libmips.a(board.o): In function `board_init_r':
board.c:(.text+0x2e4): undefined reference to `getenv_IPaddr'
make: *** [u-boot] Error 1

VCT Platinum AVC is the only MIPS target who doesn't have CONFIG_CMD_NET
and suffer from this issue at this moment.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---

 Note that arm/avr32/i386/m68k/nios/nios2/ppc/sparc have the same issue,
 while blackfin/microblaze/sh don't.

 lib_mips/board.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/lib_mips/board.c b/lib_mips/board.c
index b2d113e..5c35884 100644
--- a/lib_mips/board.c
+++ b/lib_mips/board.c
@@ -370,8 +370,10 @@ void board_init_r (gd_t *id, ulong dest_addr)
/* relocate environment function pointers etc. */
env_relocate();
 
+#ifdef CONFIG_CMD_NET
/* IP Address */
bd-bi_ip_addr = getenv_IPaddr(ipaddr);
+#endif
 
 #if defined(CONFIG_PCI)
/*
-- 
1.6.6

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[U-Boot] Flex-OneNAND related build breakage (was Re: MIPS: build status (2010.01))

2010-01-10 Thread Shinya Kuribayashi
Hi Rohit, Amul, and Kyungmin (Samsung people),

Shinya Kuribayashi wrote:
 Build warnings / errors could be categorized into five groups:
 
 3) env_onenand.c: CONFIG_ENV_{ADDR,SIZE}_FLEX undeclared build error

In the following commit, Flex-OneNAND support was introduced:

commit c758e947aa7d39a2be607ecdedd818ad300807b2
Author: Amul Kumar Saha amul.s...@samsung.com
Date:   Wed Nov 4 10:38:46 2009 +0530

ENV Variable support for Flex-OneNAND

Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX
for storing environment variables.

Signed-off-by: Rohit Hagargundgi h.ro...@samsung.com
Signed-off-by: Amul Kumar Saha amul.s...@samsung.com

However, it breaks the existing 'normal' OneNAND user's builds like this:

LOG/vct_platinum_onenand.ERR
-
env_onenand.c: In function 'env_relocate_spec':
env_onenand.c:70: error: 'CONFIG_ENV_ADDR_FLEX' undeclared (first use in this 
function)
env_onenand.c:70: error: (Each undeclared identifier is reported only once
env_onenand.c:70: error: for each function it appears in.)
env_onenand.c: In function 'saveenv':
env_onenand.c:106: error: 'CONFIG_ENV_ADDR_FLEX' undeclared (first use in this 
function)
env_onenand.c:107: error: 'CONFIG_ENV_SIZE_FLEX' undeclared (first use in this 
function)
make[1]: *** [env_onenand.o] Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [common/libcommon.a] Error 2

Affected (MIPS) targets:
- MIPS Micronas VCT Premium/Platinum/Platinum AVC (vct_*_onenand_config).
- I'm not sure about other OneNAND users in mainline.

Having a look at the code, and from CONFIG_ENV_{ADDR,SIZE}_FLEX names,
they're apparently Flex-OneNAND specific configurations, right?  If so
'normal' OneNAND users don't want to have, I'm afraid.

Any comments on how, and where supposed to be fixed?
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[U-Boot] MIPS: build status (2010.01)

2010-01-10 Thread Shinya Kuribayashi
Hi,

here's a build summary of the latest git with GCC 4.4.1:

$ ./MAKEALL mips mips_el

- SUMMARY 
Boards compiled: 23
Boards with warnings or errors: 11 ( qemu_mips vct_platinum_onenand
vct_platinum_onenand_small vct_platinumavc_onenand
vct_platinumavc_onenand_small vct_premium_onenand
vct_premium_onenand_small dbau1000 dbau1100 dbau1500 gth2 )
--

Build warnings / errors could be categorized into five groups:

1) zlib.c: missing asm/unaligned.h build error
2) lib_mips/board.c: undefined reference to `getenv_IPaddr' build error
3) env_onenand.c: CONFIG_ENV_{ADDR,SIZE}_FLEX undeclared build error
4) cmd_ide.c: dbuf strict-aliasing warning
5) dlmalloc.c: strict-aliasing warning

I'll post two patches to fix #1 and #2.  As for #3, I'll reply to this
mail with build logs to remind appropriate people of these issues.

Per #4, it would be better to upgrade the byteorder/swab headers first,
rather than fixing occasional strict-aliasing reports.  Since they are
only reported by GCC 4.4, I'd like to leave this issue as-is for now.

With regard to #5, I've checked the mail archives and found that this
is one of the known issues, I will ignore it.

$ mips-linux-gnu-gcc --version
mips-linux-gnu-gcc (Sourcery G++ Lite 4.4-57) 4.4.1
Copyright (C) 2009 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

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Re: [U-Boot] Flex-OneNAND related build breakage (was Re: MIPS: build status (2010.01))

2010-01-10 Thread Shinya Kuribayashi
On 1/11/10 1:09 PM, AMIT KUMARSHARMA wrote:
 HI Shinya,

 Please go thorugh below link , issue is already resolved,

Ah, thanks.  I missed that.

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Re: [U-Boot] [PATCH 2/2] MIPS: lib_mips/board.c: Fix undefined getenv_IPaddr build error

2010-01-10 Thread Shinya Kuribayashi
On 1/11/10 11:00 AM, Shinya Kuribayashi wrote:
 In the commit 6ac59c55 (net: pull CONFIG checks out of source and into
 makefile), net/net.o is changed to be built-in only when CONFIG_CMD_NET
 is enabled, while lib_mips/board.c has a reference to getenv_IPaddr()
 left as-is.

 And now Micronas VCT Platinum AVC board builds (vct_platinumavc*_config)
 failed as follows, because they don't have ethernet support and disable
 CONFIG_CMD_NET option:

 lib_mips/libmips.a(board.o): In function `board_init_r':
 board.c:(.text+0x2e4): undefined reference to `getenv_IPaddr'
 make: *** [u-boot] Error 1

And I missed that this one will be fixed soon in a different way.
Please ignore this patch, thanks.
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Re: [U-Boot] [PATCH][RESEND]: Fix for U-Boot build failure with CONFIG_SYS_NO_FLASH defined for qemu-mips.

2009-12-20 Thread Shinya Kuribayashi
Himanshu Chauhan wrote:
 May be I really want that CONFIG_SYS_NO_FLASH defined then build should at 
 least not break. Isn't it?

Correct, it should build even with CONFIG_SYS_NO_FLASH.

 diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
 index efd6aec..5bd3af0 100644
 --- a/common/cmd_bootm.c
 +++ b/common/cmd_bootm.c
 @@ -76,7 +76,7 @@ extern void bz_internal_error(int);
   static int image_info (unsigned long addr);
   #endif

 -#if defined(CONFIG_CMD_IMLS)
 +#if !defined(CONFIG_SYS_NO_FLASH)  defined(CONFIG_CMD_IMLS)
   #includeflash.h
   extern flash_info_t flash_info[]; /* info for FLASH chips */
   static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char
 *argv[]);
 @@ -1153,7 +1153,7 @@ U_BOOT_CMD(
   /***/
   /* imls - list all images found in flash */
   /***/
 -#if defined(CONFIG_CMD_IMLS)
 +#if !defined(CONFIG_SYS_NO_FLASH)  defined(CONFIG_CMD_IMLS)
   int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
   {
   flash_info_t *info;
 Disabling IMLS command in configs/qemu_mips.h?
 This should have been disabled anyways if this patch was applied:
 http://www.mail-archive.com/u-boot@lists.denx.de/msg07407.html

The patch is applied.

|diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
|index cbacdf9..49a1a1c 100644
|--- a/include/configs/qemu-mips.h
|+++ b/include/configs/qemu-mips.h
|:q
|@@ -142,6 +142,7 @@
| #define CONFIG_SYS_INIT_SP_OFFSET 0x40
|
| /* We boot from this flash, selected with dip switch */
|+#define CONFIG_SYS_NO_FLASH
| #define CONFIG_SYS_FLASH_BASE 0xbfc0
| #define CONFIG_SYS_MAX_FLASH_BANKS1
| #define CONFIG_SYS_MAX_FLASH_SECT 128

FWIW, how about putting CONFIG_SYS_NO_FLASH prior to config_cmd_
default.h?

 diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
 index 24eb33f..06c7271 100644
 --- a/drivers/mtd/cfi_flash.c
 +++ b/drivers/mtd/cfi_flash.c
 @@ -41,6 +41,7 @@
   #includeenvironment.h
   #includemtd/cfi_flash.h

 +#ifndef CONFIG_SYS_NO_FLASH
   /*
* This file implements a Common Flash Interface (CFI) driver for
* U-Boot.
 @@ -2020,3 +2021,5 @@ unsigned long flash_init (void)

   return (size);
   }
 +
 +#endif
 Removing CONFIG_CFI_DRIVER from configs/qemu_mips.h?
 If CONFIG_SYS_NO_FLASH is defined should it be compiled?

No.  In U-Boot, in general, drivers should be predefined through
configs/boardname.h.  If we don't use CFI driver, just disable
it in top-level board config file.  This is to avoid #ifdef mess,
and prevent the drivers from being clobbered.

-- 
Shinya Kuribayashi
NEC Electronics
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Re: [U-Boot] [PATCH][RESEND]: Fix for U-Boot build failure with CONFIG_SYS_NO_FLASH defined for qemu-mips.

2009-12-19 Thread Shinya Kuribayashi
Hi,

On 12/19/09 3:57 PM, Himanshu Chauhan wrote:
 U-Boot hangs with qemu-system-mips with ##unknown flash error.

Do you have any idea what's the root cause of that unknown flash
error?  Is this U-Boot CFI driver issue, or Qemu-side problem?

Using CONFIG_SYS_NO_FLASH is a quick, enough workaround for your
trial, but does not fix anything.  Could you sort out the issue?
I don't think I can help regarding debugging Qemu (sorry!), but
u-boot/doc/README.qemu_mips and U-Boot/Qemu community will help.

 Disabling flash using CONFIG_SYS_NO_FLASH breaks the build.
 This patch fixes the issue. Don't know if its okay.

 Signed-off-by: Himanshu Chauhanhiman...@symmetricore.com

Heh, let's use git-format-patch when preparing patches.

$ git format-patch HEAD^..
$ git format-patch --no-thread HEAD^^..
$ mkdir foo  git format-patch -o foo/ HEAD~3..
and so on.

 diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
 index efd6aec..5bd3af0 100644
 --- a/common/cmd_bootm.c
 +++ b/common/cmd_bootm.c
 @@ -76,7 +76,7 @@ extern void bz_internal_error(int);
   static int image_info (unsigned long addr);
   #endif

 -#if defined(CONFIG_CMD_IMLS)
 +#if !defined(CONFIG_SYS_NO_FLASH)  defined(CONFIG_CMD_IMLS)
   #includeflash.h
   extern flash_info_t flash_info[]; /* info for FLASH chips */
   static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
 @@ -1153,7 +1153,7 @@ U_BOOT_CMD(
   /***/
   /* imls - list all images found in flash */
   /***/
 -#if defined(CONFIG_CMD_IMLS)
 +#if !defined(CONFIG_SYS_NO_FLASH)  defined(CONFIG_CMD_IMLS)
   int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
   {
   flash_info_t *info;

Disabling IMLS command in configs/qemu_mips.h?

 diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
 index 24eb33f..06c7271 100644
 --- a/drivers/mtd/cfi_flash.c
 +++ b/drivers/mtd/cfi_flash.c
 @@ -41,6 +41,7 @@
   #includeenvironment.h
   #includemtd/cfi_flash.h

 +#ifndef CONFIG_SYS_NO_FLASH
   /*
* This file implements a Common Flash Interface (CFI) driver for
* U-Boot.
 @@ -2020,3 +2021,5 @@ unsigned long flash_init (void)

   return (size);
   }
 +
 +#endif

Removing CONFIG_CFI_DRIVER from configs/qemu_mips.h?

 diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
 index cbacdf9..49a1a1c 100644
 --- a/include/configs/qemu-mips.h
 +++ b/include/configs/qemu-mips.h
 :q
 @@ -142,6 +142,7 @@
   #define CONFIG_SYS_INIT_SP_OFFSET   0x40

   /* We boot from this flash, selected with dip switch */
 +#define CONFIG_SYS_NO_FLASH
   #define CONFIG_SYS_FLASH_BASE   0xbfc0
   #define CONFIG_SYS_MAX_FLASH_BANKS  1
   #define CONFIG_SYS_MAX_FLASH_SECT   128
 @@ -149,7 +150,8 @@
   #define CONFIG_FLASH_CFI_DRIVER 1
   #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE   1

 -#define CONFIG_ENV_IS_IN_FLASH   1
 +#define CONFIG_ENV_IS_IN_FLASH   0
 +#define CONFIG_ENV_IS_NOWHERE
   #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 
 CONFIG_SYS_MONITOR_LEN)

   /* Address and size of Primary Environment Sector */

[...]

 diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
 index 2aa6911..2229ddf 100644
 --- a/include/mtd/cfi_flash.h
 +++ b/include/mtd/cfi_flash.h
 @@ -151,7 +151,8 @@ struct cfi_pri_hdr {
   u8  minor_version;
   } __attribute__((packed));

 -void flash_write_cmd(flash_info_t * info, flash_sect_t sect,
 -  uint offset, u32 cmd);
 +#ifndef CONFIG_SYS_NO_FLASH
 +void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset, 
 u32 cmd);
 +#endif

   #endif /* __CFI_FLASH_H__ */

Removing CONFIG_CFI_DRIVER from configs/qemu_mips.h?

Anyway, I'd like to leave this issue as-is for now, and look
forward to the read bug fix.

   Shinya
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Re: [U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing asm/unaligned.h

2009-12-19 Thread Shinya Kuribayashi
On 12/18/09 10:06 PM, Stefan Roese wrote:
 Don't get me wrong. I'm not NACK'ing the patch. I'm just pointing out
 that it's different from the Linux version.

 I'm afraid 'LMO' needlessly makes you confused.  Or am I missing
 something?

 Yes, LMO was confusing me.

Sorry for that, and thanks for trying to check the diff.  I'll
respin the patch during the merge window, with proper words.
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[U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing asm/unaligned.h

2009-12-18 Thread Shinya Kuribayashi
make -C lib_generic/
zlib.c:31:27: error: asm/unaligned.h: No such file or directory
zlib.c: In function 'inflate_fast':
zlib.c:641: warning: implicit declaration of function 'get_unaligned'
make[1]: *** [zlib.o] Error 1
make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic'
make: *** [lib_generic/libgeneric.a] Error 2

Import relevant header file from LMO tree (slightly modified to U-Boot).

Reported-by: Himanshu Chauhan himan...@symmetricore.com
Signed-off-by: Shinya Kuribayashi shinya.kuribaya...@necel.com
---

Himanshu Chauhan wrote:
 I see that in include directory asm points to asm-mips. Inside asm-mips 
 there is another link arch-arch-mips which is a dead link. THere is no 
 directory named arch-mips there.

This is another topic, let's ignore here.

 Whats the problem here? Should I pull only the MIPS custodian tree?

I confirmed that this patch fixes the build error, but not sure
it works or not.  Just build tested.  And note that there there's
nothing interesting in the u-boot-mips tree, sorry.


 include/asm-mips/unaligned.h |   26 ++
 1 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 include/asm-mips/unaligned.h

diff --git a/include/asm-mips/unaligned.h b/include/asm-mips/unaligned.h
new file mode 100644
index 000..da6a347
--- /dev/null
+++ b/include/asm-mips/unaligned.h
@@ -0,0 +1,26 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007 Ralf Baechle (r...@linux-mips.org)
+ */
+#ifndef _ASM_MIPS_UNALIGNED_H
+#define _ASM_MIPS_UNALIGNED_H
+
+#include compiler.h
+#if defined(__MIPSEB__)
+# define get_unaligned __get_unaligned_be
+# define put_unaligned __put_unaligned_be
+#elif defined(__MIPSEL__)
+# define get_unaligned __get_unaligned_le
+# define put_unaligned __put_unaligned_le
+#else
+#  error MIPS, but neither __MIPSEB__, nor __MIPSEL__???
+#endif
+
+# include linux/unaligned/le_byteshift.h
+# include linux/unaligned/be_byteshift.h
+# include linux/unaligned/generic.h
+
+#endif /* _ASM_MIPS_UNALIGNED_H */
-- 
1.6.5.7
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Re: [U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing asm/unaligned.h

2009-12-18 Thread Shinya Kuribayashi
Stefan Roese wrote:
 On Friday 18 December 2009 13:04:59 Himanshu Chauhan wrote:
 Import relevant header file from LMO tree (slightly modified to U-Boot).
 Why don't you import this file from the Linux tree? This should work
 without modifications. And that's what we've done for PPC and ARM as
 well.
[...]
 I think thats what it is. Both are same.
 
 No, not exactly. They're nearly identical. But there are differences. Not 
 sure 
 if these differences are important though.

Hm, the original header is (lmo = linux-mips.org):
http://git.kernel.org/?p=linux/kernel/git/ralf/linux.git;a=blob;f=arch/mips/include/asm/unaligned.h;h=42f66c311473abb98fe7a845e360e365ccfed837;hb=master

Are you referring to another one?

 Don't get me wrong. I'm not NACK'ing the patch. I'm just pointing out that 
 it's different from the Linux version.

I'm afraid 'LMO' needlessly makes you confused.  Or am I missing
something?
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Re: [U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing asm/unaligned.h

2009-12-18 Thread Shinya Kuribayashi
Himanshu Chauhan wrote:
 Himanshu Chauhan wrote:
 I see that in include directory asm points to asm-mips. Inside
 asm-mips there is another link arch-arch-mips which is a dead link.
 THere is no directory named arch-mips there.
 This is another topic, let's ignore here.
 
 Is arch-mips scheduled to be added?

Not at the moment.  I'm not sure how it works, in the first place.

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[U-Boot] [PATCH] qemu_mips: Fix CONFIG_NET_MULTI build warning

2009-10-19 Thread Shinya Kuribayashi
eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please update to 
use CONFIG_NET_MULTI

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---

 I have a few concerns about this fix:

 First.  I'm not sure why CONFIG_NET_MULTI is undefed for qemu_mips,
 while CONFIG_DRIVER_NE2000 has been enabled for qemu_mips at an early
 stage.

 I don't follow recent changes around eth.c and CONFIG_NET_MULTI, but
 it's probably CONFIG_NET_MULTI used to be used strictly for multi
 ports, isn't it?

 Next.  As far as looking at drivers/net/ne2000*.[ch], NE2000 driver
 doesn't seem to require board_eth_init() or cpu_eth_init().  Right?
 Therefore I've not added a corresponding hook in board/qemu_mips/
 qemu_mips.c.  If my understanding is wrong, please let me know.

 include/configs/qemu-mips.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index cbacdf9..f419174 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -157,7 +157,7 @@
 
 #define CONFIG_ENV_OVERWRITE   1
 
-#undef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI
 
 #define MEM_SIZE   128
 
-- 
1.6.5.1

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Re: [U-Boot] [PATCH] qemu_mips: Fix CONFIG_NET_MULTI build warning

2009-10-19 Thread Shinya Kuribayashi
Hi Ben,

Ben Warren wrote:
 Shinya Kuribayashi wrote:
  First.  I'm not sure why CONFIG_NET_MULTI is undefed for qemu_mips,
  while CONFIG_DRIVER_NE2000 has been enabled for qemu_mips at an early
  stage.

  I don't follow recent changes around eth.c and CONFIG_NET_MULTI, but
  it's probably CONFIG_NET_MULTI used to be used strictly for multi
  ports, isn't it?
   
 Currently, there are two incompatible networking APIs.  One that uses 
 CONFIG_NET_MULTI, and one that doesn't.  I'm trying to move everything 
 towards the former (single-port applications are of course a degenerate 
 instance of multi-port ones).  Once all drivers have been ported to the 
 MULTI API, that config option will magically disappear.

Thanks, got it.

  Next.  As far as looking at drivers/net/ne2000*.[ch], NE2000 driver
  doesn't seem to require board_eth_init() or cpu_eth_init().  Right?
  Therefore I've not added a corresponding hook in board/qemu_mips/
  qemu_mips.c.  If my understanding is wrong, please let me know.
   
 The NE2000 driver hasn't been ported yet.  It's on my short term to-do 
 list, and will be in the next release (01.2010, I guess?)

So CONFIG_NE2000_DRIVER needs some work, and is not ready for
migration.  I missed that point, thanks for clarification.

 @@ -157,7 +157,7 @@
  
  #define CONFIG_ENV_OVERWRITE1
  
 -#undef CONFIG_NET_MULTI
 +#define CONFIG_NET_MULTI
  
   
 This won't do anything other than disabling networking.  Since QEMU is 
 an emulator, though, maybe it would make sense to use a device driver 
 that has CONFIG_NET_MULTI support?

Who knows?  It's hard, at least for me, to say.  But it'd be better to
port NE2000 driver into an appropriate shape whether it's used by QEMU
or not.

  #define MEM_SIZE128
  
   
 If the warning isn't more than a nuisance, please live with it for now.

No problem.  Please ignore the patch.

Thanks,

  Shinya
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[U-Boot] [PATCH v2] MIPS: VCT: Remove read_spareram reference

2009-09-12 Thread Shinya Kuribayashi
The commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove
unused read_spareram and add unlock_all as kernel does) forgot to remove
a local reference to read_spareram in board/micronas/vct/ebi_onenand.c,
which causes the following build failure when configured with OneNAND:

ebi_onenand.c: In function 'onenand_board_init':
ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 
'read_spareram'
make[1]: *** [ebi_onenand.o] Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [board/micronas/vct/libvct.a] Error 2

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
Acked-by: Stefan Roese s...@denx.de
Cc: Kyungmin Park kyungmin.p...@samsung.com
---

 v2:
 - Cc: lines are corrected!
 - Add Acked-by: from Stefan.

 board/micronas/vct/ebi_onenand.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/board/micronas/vct/ebi_onenand.c b/board/micronas/vct/ebi_onenand.c
index 522b88f..1e8afa6 100644
--- a/board/micronas/vct/ebi_onenand.c
+++ b/board/micronas/vct/ebi_onenand.c
@@ -193,6 +193,5 @@ void onenand_board_init(struct mtd_info *mtd)
chip-write_word = ebi_nand_write_word;
 
chip-read_bufferram = ebi_read_bufferram;
-   chip-read_spareram = ebi_read_bufferram;
chip-write_bufferram = ebi_write_bufferram;
 }
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[U-Boot] [PATCH] MIPS: VCT: Remove read_spareram reference

2009-09-11 Thread Shinya Kuribayashi
The commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove
unused read_spareram and add unlock_all as kernel does) forgot to fixup
a local reference to read_spareram in board/micronas/vct/ebi_onenand.c,
which causes the following build failure when configured with OneNAND:

ebi_onenand.c: In function 'onenand_board_init':
ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 
'read_spareram'
make[1]: *** [ebi_onenand.o] Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [board/micronas/vct/libvct.a] Error 2

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
Cc: Signed-off-by: Stefan Roese s...@denx.de
Cc: Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---

 Wolfgang, once approved by a board maintainer, please apply directly.
 Thanks in advance,

 board/micronas/vct/ebi_onenand.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/board/micronas/vct/ebi_onenand.c b/board/micronas/vct/ebi_onenand.c
index 522b88f..1e8afa6 100644
--- a/board/micronas/vct/ebi_onenand.c
+++ b/board/micronas/vct/ebi_onenand.c
@@ -193,6 +193,5 @@ void onenand_board_init(struct mtd_info *mtd)
chip-write_word = ebi_nand_write_word;
 
chip-read_bufferram = ebi_read_bufferram;
-   chip-read_spareram = ebi_read_bufferram;
chip-write_bufferram = ebi_write_bufferram;
 }
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Re: [U-Boot] PATCH mtd CFI flash: timeout calculation underflow if imprecise 1kHz timer: fix

2009-08-25 Thread Shinya Kuribayashi
Renato Andreola wrote:
  From 21d84ab72266f118794233176bd356d8b1cfdf35 Mon Sep 17 00:00:00 2001
 From: Renato Andreola renato.andre...@imagos.it
 Date: Fri, 21 Aug 2009 18:05:51 +0200
 Subject: [PATCH] drivers/mtd/cfi_flash: precision and underflow problem in 
 tout calculation
 
 With old configuration it could happen tout=0 if CONFIG_SYS_HZ1000.
 
 Signed-off-by: Alessandro Rubini rub...@gnudd.com Renato Andreola 
 renato.andre...@imagos.it
 ---
   drivers/mtd/cfi_flash.c |8 +---
   1 files changed, 5 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
 index 81ac5d3..0d8fc54 100644
 --- a/drivers/mtd/cfi_flash.c
 +++ b/drivers/mtd/cfi_flash.c
 @@ -660,9 +660,11 @@ static int flash_status_check (flash_info_t * info, 
 flash_sect_t sector,
   ulong start;
 
   #if CONFIG_SYS_HZ != 1000
 - tout *= CONFIG_SYS_HZ/1000;
 -#endif
 -
 + if ((ulong)CONFIG_SYS_HZ  10)
 + tout *= (ulong)CONFIG_SYS_HZ/1000;  /* for a big HZ, avoid 
 overflow */
 + else
 + tout = DIV_ROUND_UP(tout*(ulong)CONFIG_SYS_HZ, 1000);
 +#endif   
   /* Wait for command completion */
   start = get_timer (0);
   while (flash_is_busy (info, sector)) {

What should to be fixed first in this case, would be your CONFIG_SYS_HZ
setting, that is NIOS2? timer implementation, yeah really.  But I would
also point out that there is another case flash_status_check() doensn't
work as expected.

One of my colleagues found that with some flash device(s) (I don't
recall precisely, sorry), 'tout' would be probed to be zero.  In that
case, a workaround something like above still doesn't work.

We have not sorted out where the problem is; it might be in cfi_flash.c,
or in the flash device itself.  This is observed with v2009.03 release,
and we've been having a workaround for it for months.  I'd like to have
a look someday.

Anyway, checking to see if 'tout' is zero or not would be sometimes
worth a try, when you think cfi_flash.c doesn't work as expected.

Just for your information,

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Re: [U-Boot] [PATCH 1/7] qemu-mips: Fix Qemu website

2009-08-21 Thread Shinya Kuribayashi
mon...@monstr.eu wrote:
 From: Michal Simek mon...@monstr.eu
 
 Signed-off-by: Michal Simek mon...@monstr.eu
 Signed-off-by: Michal Simek michal.si...@petalogix.com
 ---
  board/qemu-mips/README |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)

Wolfgang,

please take this one directly into your mainline as obvious.
 
Thanks in advance,

  Shinya

 diff --git a/board/qemu-mips/README b/board/qemu-mips/README
 index 4c1f8ed..565241b 100644
 --- a/board/qemu-mips/README
 +++ b/board/qemu-mips/README
 @@ -2,7 +2,7 @@ By Vlad Lungu vlad.lu...@windriver.com 2007-Oct-01
  
  Qemu is a full system emulator. See
  
 -http://fabrice.bellard.free.fr/qemu
 +http://www.nongnu.org/qemu/
  
  Limitations  comments
  --

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Re: [U-Boot] [STATUS] v2009.08-rc2 is out

2009-08-11 Thread Shinya Kuribayashi
Hi,

Ben Warren wrote:
 I found qemu_mips_config is spotted by it:
 Configuring for qemu-mips board...
 eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please
 update to use CONFIG_NET_MULTI

 But I don't follow the recent changes including that CONFIG_NET_MULTI
 migration, nor I don't have enough spare time to look into it, so gave
 up this time, sorry.

   
 The DM9000 driver uses the old networking API, and needs to be updated. 
 I have it partly done and will be submitting to the ML soon.  Hopefully
 you'll be able to test my patch :)

Nice!  Once submitted, I'll check it builds on my side.
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Re: [U-Boot] [STATUS] v2009.08-rc2 is out

2009-08-10 Thread Shinya Kuribayashi
Wolfgang Denk wrote:
 Summary of current status:
 
 * Many boards now throw the (expected)
 
   #warning Ethernet driver is deprecated. Please update to use 
 CONFIG_NET_MULTI
 
   messages.

I found qemu_mips_config is spotted by it:
Configuring for qemu-mips board...
eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please update to 
use CONFIG_NET_MULTI

But I don't follow the recent changes including that CONFIG_NET_MULTI
migration, nor I don't have enough spare time to look into it, so gave
up this time, sorry.

 * ARM and PowerPC: mostly compile clean; there are a few issues,
   responsible s have been notified

For the rest, MIPS builds are pretty in good shape as follows.

skuri...@ubuntu:u-boot.git$ ./MAKEALL mips mips_el
Configuring for incaip board...
   textdata bss dec hex filename
 1470326476   20240  173748   2a6b4 ./u-boot
Configuring for qemu-mips board...
eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please update to 
use CONFIG_NET_MULTI
   textdata bss dec hex filename
 1717446340  221768  399852   619ec ./u-boot
... on Platinum board variant
Configuring for vct board...
   textdata bss dec hex filename
 199916   12568  284420  496904   79508 ./u-boot
... on Platinum board variant
... stripped down image variant
Configuring for vct board...
   textdata bss dec hex filename
  882964196   13716  106208   19ee0 ./u-boot
... on Platinum board variant
... on OneNAND board variant
Configuring for vct board...
   textdata bss dec hex filename
 296608   13728  289764  600100   92824 ./u-boot
... on Platinum board variant
... on OneNAND board variant
... stripped down image variant
Configuring for vct board...
   textdata bss dec hex filename
 1840165344   19080  208440   32e38 ./u-boot
... on PlatinumAVC board variant
Configuring for vct board...
   textdata bss dec hex filename
 1185085112   14944  138564   21d44 ./u-boot
... on PlatinumAVC board variant
... stripped down image variant
Configuring for vct board...
   textdata bss dec hex filename
  878164196   13716  105728   19d00 ./u-boot
... on PlatinumAVC board variant
... on OneNAND board variant
Configuring for vct board...
   textdata bss dec hex filename
 2152646268   20308  241840   3b0b0 ./u-boot
... on PlatinumAVC board variant
... on OneNAND board variant
... stripped down image variant
Configuring for vct board...
   textdata bss dec hex filename
 1835285344   19080  207952   32c50 ./u-boot
... on Premium board variant
Configuring for vct board...
   textdata bss dec hex filename
 199916   12568  284420  496904   79508 ./u-boot
... on Premium board variant
... stripped down image variant
Configuring for vct board...
   textdata bss dec hex filename
  882964196   13716  106208   19ee0 ./u-boot
... on Premium board variant
... on OneNAND board variant
Configuring for vct board...
   textdata bss dec hex filename
 296608   13728  289764  600100   92824 ./u-boot
... on Premium board variant
... on OneNAND board variant
... stripped down image variant
Configuring for vct board...
   textdata bss dec hex filename
 1840165344   19080  208440   32e38 ./u-boot
Configuring for purple board...
   textdata bss dec hex filename
 1476886168   18956  172812   2a30c ./u-boot
Configuring for dbau1x00 board...
   textdata bss dec hex filename
 1209285172   20680  146780   23d5c ./u-boot
Configuring for dbau1x00 board...
   textdata bss dec hex filename
 1209285172   20680  146780   23d5c ./u-boot
Configuring for dbau1x00 board...
   textdata bss dec hex filename
 1209285172   20680  146780   23d5c ./u-boot
Configuring for dbau1x00 board...
   textdata bss dec hex filename
 1169365256   23352  145544   23888 ./u-boot
Configuring for dbau1x00 board...
   textdata bss dec hex filename
 1169365256   23352  145544   23888 ./u-boot
Configuring for gth2 board...
   textdata bss dec hex filename
 1116565140   18376  135172   21004 ./u-boot
Configuring for dbau1x00 board...
   textdata bss dec hex filename
 1169365256   23352  145544   23888 ./u-boot
Configuring for pb1x00 board...
   textdata bss dec hex filename
 1064606004   20488  132952   20758 ./u-boot
skuri...@ubuntu:u-boot.git$
skuri...@ubuntu:u-boot.git$
skuri...@ubuntu:u-boot.git$ mips-linux-gnu-gcc --version
mips-linux-gnu-gcc (Sourcery G++ Lite 4.3-154) 4.3.3
Copyright (C) 2008 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

skuri...@ubuntu:u-boot.git$ mips-linux-gnu-as --version
GNU assembler 

Re: [U-Boot] [U-Boot-Users] MIPS: accessing flash 8MB

2009-07-26 Thread Shinya Kuribayashi
Chetan Nanda wrote:
 We have a MIPS-4KEC based SoC and running an older version of U-Boot 
 (1.1.3) on it. It is working perfectly fine.
 Board has 8MB AMD flash and starting address of that flash is 0xBFC0 
 (reset vector for MIPS).
 
 Problem is that we are not able to access full 8MB of flash. Only 
 0xBFC0 - 0xBFFF (4MB) is accessible, as it lies in un-mapped, 
 un-cached region of MIPS.
  From 0xC000 lies in mapped memory area of MIPS.
 
 Now my questions are, creating entry in TLBs is sufficient to access 
 rest of 4MB of flash?

It depends on its physical address.  If your flash device is mapped to
0x1FC0-0x203F, you'll need to access to the remaining half via
TLBs.

However, if it's mapped to 0x1F80-0x1FFF, no need to set up TLB
entries; you can access anywhere in the devices using KSEG1 virtual
addresses.


 Is their any interface provided in U-boot to update TLB?

There's write_one_tlb() prepared in cpu/mips/cpu.c (I don't know whether
it works or not, as I've never had a chance to use it so far).  Lastly,
AFAIK there's no command line interface to do it.
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Re: [U-Boot] [PATCH] OneNAND IPL: Move u-boot-onenand linker script to common use

2009-07-16 Thread Shinya Kuribayashi
Scott Wood wrote:
 On Mon, Jul 13, 2009 at 09:48:30AM +0900, Kyungmin Park wrote:
 Basically I agree your opinion, however do see the other arch OneNAND
 usage? I mean I can't see the other arch patches.
 
 There was nothing but powerpc in nand_spl at first, but I don't think ARM
 developers would have appreciated finding hardcoded powerpc assumptions
 when they tried to add their boards.

Heh, we're already using onenand_ipl on our MIPS machines ;-)

-- 
Shinya Kuribayashi
NEC Electronics
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Re: [U-Boot] [PATCH v2 0/6] Clean up top-level directory structure

2009-07-10 Thread Shinya Kuribayashi
Hi,

Peter Tyser wrote:
 This series moves api_examples to api/examples and moves all
 lib* directories into a common lib/ directory.  It also
 moves the ARCH_config.mk files into their corresponding
 lib directory.
 
 Seeing 12 lib_ARCH directories and 12 ARCH_config.mk
 files in U-Boot's top level always annoyed me,

Me, too.

Before verifying MIPS builds, I'd like to make sure that why you take
lib/$(ARCH)/ alternative, not $(ARCH)/lib/.  If there were any
discussion on #IRC, is there any chance we could share the summary or
decision to follow?

Please note that I agree with such cleanup, of course.  I just would
like to make sure that lib/$(ARCH)/ is an authorized policy or not.
If authorized one, I'm fine.

Thanks in advance,
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Re: [U-Boot] [PATCH v2 0/6] Clean up top-level directory structure

2009-07-10 Thread Shinya Kuribayashi
Peter Tyser wrote:
 Before verifying MIPS builds, I'd like to make sure that why you take
 lib/$(ARCH)/ alternative, not $(ARCH)/lib/.  If there were any
 discussion on #IRC, is there any chance we could share the summary or
 decision to follow?
 
 There was no discussion, /lib/$(ARCH) just made more sense to me and it
 was functionally a direct translation from lib_$(ARCH) to lib/$(ARCH).
 
 Using $(ARCH)/lib wouldn't clean up the top-level directory structure
 much and would open a can of worms that I'm not prepared to deal with at
 this time.  For example, if there was an architecture specific

Oops, I wanted to say arch/$(ARCH)/lib/, not $(ARCH)/lib/, sorry.

 directory, it would seem logical to put cpus of that $(ARCH) type in it
 too, eg
 ppc/
   lib/
   mpc8260
   mpc85xx/
   mpc86xx/
 
 sh/
   lib/
   sh2/
   sh3/
   sh4/
 
 ...
 
 My change was just meant to be an incremental improvement, but I could
 see advantages to using the $(ARCH)/... structure if we wanted to make
 larger changes.  Anyway, I'd be curious to hear other's opinions about
 other directory layouts. 
 
 While we're talking about it, I'd always thought it would be nice to
 split out all the cmd_* files from common/ into their own command/
 directory similar to u-boot-v2.

Ack.  The directory structure in u-boot-v2 looks nice, at least, to me,
anyway.

 Please note that I agree with such cleanup, of course.  I just would
 like to make sure that lib/$(ARCH)/ is an authorized policy or not.
 If authorized one, I'm fine.
 
 I was just scratching an itch, nothing official:)

Got it.

Thanks for the kind explanation,
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Re: [U-Boot] [PATCH] config.mk: Remove unused HPATH

2009-06-24 Thread Shinya Kuribayashi
Hi Detlev,

Detlev Zundel wrote:
 This variable is not unused anywhere.
 
 Makes my brain twist and after carefully applying boolean equivalence
 operations contradicts the title ;)

Oops, thanks for pointing out.  Will correct it later.
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Re: [U-Boot] [PATCH 1/3] fix: missing autoconfig.mk from general Makefile

2009-06-23 Thread Shinya Kuribayashi
Hi Jean, or someone who understands U-Boot's build system well,

Jean-Christophe PLAGNIOL-VILLARD wrote:
 at the first run of make we generate the autoconf.mk and autoconf.mk.dep
 if not already the case and we currently include only to .dep
 
 in order to use these autogenerated value we need to include it also evenif
 it's include in config.mk but it's done before there generation
 
 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
 ---
  Makefile |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)
 
 diff --git a/Makefile b/Makefile
 index 81a5cd0..7f3776e 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -475,6 +475,7 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
   mv $...@.tmp $@
  
  sinclude $(obj)include/autoconf.mk.dep
 +sinclude $(obj)include/autoconf.mk
  
  #
  else # !config.mk

I'm still thinking how to fix this issue.

The problem here is, deferred expansion on PLATFORM_LDFLAGS doesn't work
expectedly.  In this case,

| autoconf.mk
| ---
| CONFIG_CPU_LITTLE_ENDIAN=y
| 
| mips_config.mk
| --
| 
| ifneq (,$(CONFIG_CPU_LITTLE_ENDIAN))
| PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |...
| PLATFORM_LDFLAGS  += -EL
| else
| PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |...
| PLATFORM_LDFLAGS  += -EB
| endif

doesn't work, but simply doing ...

| ifneq (,$(CONFIG_CPU_LITTLE_ENDIAN))
| PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |...
| else
| PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |...
| endif
|
| PLATFORM_LDFLAGS  += -EL

does work.

Then, what needs to be fixed finally?  Can't we have PLATFORM_LDFLAGS
conditionally configured?  or is this a U-Boot's build system issue?

  Shinya

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Re: [U-Boot] [PATCH 1/3] fix: missing autoconfig.mk from general Makefile

2009-06-23 Thread Shinya Kuribayashi
Jean-Christophe PLAGNIOL-VILLARD wrote:
 | ifneq (,$(CONFIG_CPU_LITTLE_ENDIAN))
 | PLATFORM_CPPFLAGS  += $(shell $(CC) -dumpmachine |...
 | else
 | PLATFORM_CPPFLAGS  += $(shell $(CC) -dumpmachine |...
 | endif
 |
 | PLATFORM_LDFLAGS   += -EL

 does work.
 ???
 you compile it as big endian to link it as little ???

Ah, above was just a sample only intended for LE build.

 Then, what needs to be fixed finally?  Can't we have PLATFORM_LDFLAGS
 conditionally configured?  or is this a U-Boot's build system issue?
 it a u-boot build system issues
 we need to include the autoconf.mk after generate it to use it in the GENERAL
 Makefile which is the case here for final link

I know that, but $(obj)include/autoconf.mk will be included by
$(TOPDIR)/config.mk.  Then what a rationale for including it redundantly
by $(TOPDIR/Makefile?  I assume that Wolfgang is probably requesting the
explanation for that.

Autoconf.mk is expected to be generated *before* $(TOPDIR)/config.mk is
included, right?  If so, do you think your patch is a reasonable enough?
Or do we need to consider another approach?

  Shinya - not a GNU make expert :-(
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[U-Boot] [PATCH] config.mk: Remove $(PCI_CLOCK) reference

2009-06-20 Thread Shinya Kuribayashi
The following commit introduced $(PCI_CLOCK) reference so that
we could tweak `PCI_66M' definition via an environment variable.

 commit f046ccd15c8bc9613bfd72916b761a127d36e5c6
 Author: Eran Liberty libe...@freescale.com
 Date:   Thu Jul 28 10:08:46 2005 -0500

 * Patch by Eran Liberty
   Add support for the Freescale MPC8349ADS board.

But I suggest a removal of it for the following reasons:

* In 2006, MPC8349ADS was merged into MPC8349EMDS port,
  and it seems that MPC8349EMDS port is PCI_66M free.

* OTOH, PCI_66M is used by MPC832XEMDS an MPC8360EMDS ports,
  but they don't need $(PCI_CLOCK) environment variable at all.
  PCI_66M is automatically configured via $(BOARD)_config names
  with the help of $(findstring _66_,$@).

* Unfortunately $(PCI_CLOCK) has been undocumented anywhere,
  so only a few people know the existence of it these days.

* Keep config.mk independent from $(BOARD) as much as possible.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 config.mk |4 
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/config.mk b/config.mk
index 7fc0453..f2c2c6c 100644
--- a/config.mk
+++ b/config.mk
@@ -194,10 +194,6 @@ BFD_ROOT_DIR = /opt/powerpc
 endif
 endif
 
-ifeq ($(PCI_CLOCK),PCI_66M)
-CFLAGS := $(CFLAGS) -DPCI_66M
-endif
-
 #
 
 export HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \
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[U-Boot] [PATCH] config.mk: Remove unused HPATH

2009-06-20 Thread Shinya Kuribayashi
This variable is not unused anywhere.

Signed-off-by: Shinya Kuribayashi skuri...@pobox.com
---
 config.mk |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/config.mk b/config.mk
index f2c2c6c..a9973a4 100644
--- a/config.mk
+++ b/config.mk
@@ -196,7 +196,7 @@ endif
 
 #
 
-export HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \
+export HOSTCC HOSTCFLAGS CROSS_COMPILE \
AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP MAKE
 export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
 
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