On Tue, Feb 16, 2021 at 5:21 PM Mark Koenig <
mark.koe...@iubelttechnologies.com> wrote:
> The BWs are 20mhz, 40mhz and 80Mhz respectively. The host can range from
> a server with 48 cores(2.6Ghz), 256GB ram to a laptop with 8 cores(3.0Ghz),
> 64GB ram.
>
Have you tried using the blocks you
On Tue, Feb 16, 2021 at 4:14 PM Mark Koenig <
mark.koe...@iubelttechnologies.com> wrote:
> Hello,
>
>
>
> I am receiving data from a radio at 23Msps, and I would like to resample
> to a rate of 25Msps in which my software program can ingest it. I am aware
> of the Fractional Resampler and the
On Thu, Feb 4, 2021 at 1:15 PM Askar, Ramez via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Dear Sir or Madam,
>
>
>
> I would like to use one of the available FPGA blocks from Ettus – such as
> FIR filter -- to customize my FPGA image, and add the corresponding control
> driver for C++
On Sun, Aug 16, 2020 at 9:35 AM Daniel Ozer via USRP-users <
usrp-users@lists.ettus.com> wrote:
> first of all thanks for the great answers,
> still i have few questions:
>
> 1. Is the crossbar is capable to transfer data between 2 rfnoc blocks at
> maximum rate of the crossbar clock
On Tue, Aug 11, 2020 at 6:18 AM Daniel Ozer via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi everyone,
> Im just started developing on the usrp X310 platform and i have some
> questions :
>
> 1. Is the crossbar is capable to transfer data between 2 rfnoc blocks at
> maximum rate of the
On Thu, Aug 6, 2020 at 2:28 PM Jerrid Plymale
wrote:
> I am seeing a signal strength between -65 and -70 dBm, approximately, even
> when transmitting all 0’s.
>
If you really can't handle any LO leakage, can you switch off-frequency
between times you want to transmit?
Brian
>
On Thu, Aug 6, 2020 at 2:02 PM Jerrid Plymale via USRP-users <
usrp-users@lists.ettus.com> wrote:
> It does, and actually it has a strength closer to -70 dBm, I had my
> markers in the wrong place when I thought the signal was at -100 dBm.
>
If you transmit all 0's with the gain turned all the
On Mon, Jul 20, 2020 at 11:32 AM jean-michel.fri...@femto-st.fr <
jean-michel.fri...@femto-st.fr> wrote:
> Indeed second Nyquist zone before decimation.
> My thought was
> 143.05 MHz -> transpose by 100 MHz using the DDC (NCO at 100 MHz
> considering the
> 200 MHz sampling rate) to reach 43.05,
On Tue, Jul 14, 2020 at 3:30 PM Richard J. Muri via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
>
>
> I’m working on a project using x310s where different stakeholders desire
> different sampling rates, some of which are not natively support by the
> x310. One stakeholder wants to
On Thu, Jul 2, 2020 at 3:02 PM Lawrence L Elentukh via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
> I am experiencing issues where the uhd::recv() function returns a series
> of unrecoverable timeout errors, I have seen similar questions on the
> mailing list but none that have
On Tue, Jun 23, 2020 at 12:08 PM Marcus D Leech via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Phase offset as measured against what, and how would that matter for a
> not-phase-sensitive modulation?
>
Maybe the 9361 on the B205 could be attacking the AM as an adaptive DC
offset
On Tue, Jun 23, 2020 at 10:38 AM Manav Kohli wrote:
> Hello,
>
> This problem is visualized here:
> https://www.dropbox.com/s/w7kdmf9dewwdomx/20M_2974_20_15_nocal_packet_time_tx.png?dl=0
>
> This is an OFDM packet consisting of 6 symbols: the default sync word 1&2,
> SIG field and three data
On Thu, May 21, 2020 at 2:25 PM Carlos Alberto Ruiz Naranjo <
carlosruiznara...@gmail.com> wrote:
> Thank you for the response Brian :)
>
> The throughput is about 11MSamples.
> What about to use the AXI_FIFO_LOOPBACK?
>
No idea about that. Someone else will have to weigh in.
Good luck!
Brian
On Thu, May 21, 2020 at 1:55 PM Carlos Alberto Ruiz Naranjo via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
> Is it possible to instance multiple DMA_FIFO blocks? I suppose I have to
> do it manually in the x300_core.v. Is there any limitation?
>
You might need to make more ports
On Wed, May 20, 2020 at 8:35 PM Hodges, Jeff via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Can someone please tell me what version of uhd and rfnoc are compatible
> for building an image on Ubuntu 18.04?
>
>
>
> I cannot get any of the UHD releases to properly build a standard rfnoc
>
On Thu, May 14, 2020 at 4:56 PM Alex Humberstone <
alex.m.humberst...@gmail.com> wrote:
> Brian, yeah good questions. So, the computers in my lab are going to all
> be running Ubuntu 20.04 like next week, so we're forced to use that. Not
> that I mind. I like Ubuntu a lot. And I'm planning to use
On Thu, May 14, 2020 at 11:30 AM Alex Humberstone <
alex.m.humberst...@gmail.com> wrote:
> The new Ubuntu 20.04 does not include Python 2 anymore. But GNU Radio 3.7
> requires Python 2. So then can you run GNU Radio 3.7 on Ubuntu 20.04? I
> think there's still a package that you can instal to add
On Mon, May 11, 2020 at 6:20 AM Carlos Alberto Ruiz Naranjo via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
> I'm using the USRP X310 with CBX-120. I set the radio sample rate to
> 184.32 MHz but I have the following message:
>
> [WARNING] [X300 RADIO] Requesting invalid sampling
On Thu, May 7, 2020 at 2:58 PM Max via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi Michael,
>
> thank you for the feedback.
> Unfortunately the X300 offers just one SFP+, so combining two links
> should not be possible. I also don't think the network interface itself
> is the bottleneck,
On Thu, May 7, 2020 at 11:33 AM Jean Marie Brieussel via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
> Normally, the N300 has three programmable clock rate frequencies, 122.88
> MHz / 125 MHz / 153.6 MHz on my N300 I can't seem to have another clock
> rate than 125 MHz. See the
On Wed, May 6, 2020 at 7:48 PM Artur Nogueira wrote:
> Hello guys,
>
> I'm trying to generate a GMSK signal in accordance to the GSM
> specifications. To do so, I've been trying with both "GMSK Mod" and "GMSK
> Modulator" blocks, the last one with the following parameters:
>
> [image: image.png]
On Fri, May 1, 2020 at 1:49 PM Jerrid Plymale
wrote:
> Brian,
>
>
>
> I realized I forgot to mention, I am using the multi_usrp API and not the
> RFNoC API, so I am actually unable to use the DRAM FIFO. Do you have any
> suggestions, or should I work on transitioning the signal generator to an
On Fri, May 1, 2020 at 1:23 PM Jerrid Plymale via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello All,
>
>
>
> So I have been trying to set up a USRP X310 as a signal generator for
> about a week now, and I’m having some issues. Currently I am using
> gnuradio-companion to develop the
On Wed, Apr 22, 2020 at 6:17 PM Snehasish Kar
wrote:
> Hello Brian
>
> Thanks for your response, actually I tried using DDC 1 to n block as given
> here, but giving 1 to 8 channels have a timing issue, while generating the
> build. So I thought it as an alternative plan.
>
>
>
On Wed, Apr 22, 2020 at 6:00 PM Snehasish Kar via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello
>
> I need to have input 16 input and output port from the RFNoC so that I can
> custom sample rate for each channel. Is it possible to modify the RFNoC DDC
> block and split stream block to
On Mon, Apr 20, 2020 at 2:24 PM Harris, Dan via USRP-users <
usrp-users@lists.ettus.com> wrote:
>
>
> Is the windows Cygwin build of the E310_SG3 target being maintained?
>
>
>
> I have been following the build instructions and have Vivado 2019.1
> installed. It is failing in multiple points in
On Wed, Apr 8, 2020 at 5:49 PM Tillson, Bob (US) via USRP-users <
usrp-users@lists.ettus.com> wrote:
> so with the UBX-160 on an X310, there is the following caveat:
>
>
>
> * The UBX 160 transmitter path has 160 MHz of bandwidth throughout the
> full frequency range of the device; the receiver
On Mon, Mar 23, 2020 at 1:57 PM Christophe Seguinot <
christophe.segui...@orange.fr> wrote:
> Great I was searching for this feature.
>
> Nevertheless, they are some things I don't understand in the interpolation
> bloc!!
>
Mathematically, zero stuffing is the correct interpolation mode when
On Mon, Mar 23, 2020 at 1:26 PM Christophe Seguinot <
christophe.segui...@orange.fr> wrote:
> First answer to myself :
>
>- I should have used an empty value for parameter taps. This only
>works for Rational resampler, not for interpolation.
>
> Question:
>
>- How can I interpolate
On Sun, Mar 8, 2020 at 2:15 PM Marek Dopiera wrote:
> On 08/03/2020 00:49, Brian Padalino wrote:
> > On Sat, Mar 7, 2020 at 6:02 PM Marek Dopiera via USRP-users
> > mailto:usrp-users@lists.ettus.com>> wrote:
> > I had to do this recently with an X310 application. O
On Sat, Mar 7, 2020 at 6:02 PM Marek Dopiera via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
> I would like to know when the buffer submitted via
> uhd::tx_streamer::send() is actually sent. The reason I need this is to
> keep some data outstanding not to starve the device, but make
On Wed, Feb 26, 2020 at 4:23 PM Heikki Laamanen
wrote:
> > So you want to produce something like a stable 10MHz reference and a
> 1PPS which is synchronous to UTC using broadcast/terrestrial signals such
> as DVB-T, ATSC, LTE, etc? And your edges can be within +/-50ns of actual
> UTC?
>
>
>
>
On Tue, Feb 25, 2020 at 2:00 PM Heikki Laamanen
wrote:
> Thanks Brian. You are right, there exists three VCOs and PLLs in the
> AD9361 which can be controlled independently.
>
>
>
> AD9361 Reference Manual UG-570 shows a more detailed diagram in Figure 7.
> on page 20. The baseband PLL comprises
On Mon, Feb 24, 2020 at 10:39 AM Heikki Laamanen
wrote:
> Hi experts in SDR RF transceivers,
>
>
>
> I am working on a timing and synchronization system which generates a
> high-precision timing signal from a terrestrial broadcast signal. I am
> looking for a suitable SDR HW-board providing
On Tue, Feb 11, 2020 at 11:15 AM "Till Hülder" wrote:
>
> Hello,
>
> i want to implement a FMCW-Radar in a frequency-chirp. First i tested the
> frequency-chirp . I send the chirp from TX to RX of my USRP.
> I get this warning :
>
> UHD Warning:
> For this connection, UHD recommends a
On Sun, Feb 2, 2020 at 10:40 AM Madhan TJ
wrote:
> CAN WE IMPLEMENT FBMC (filter bank multi carrier ) IN GNU RADIO ,
> IF YES,
> ANYONE PLEASE HELP ME
>
I believe the MarmotE team from the DARPA SC2 used FBMC in their modem that
they open sourced:
https://marmote.io/
On Sun, Jan 26, 2020 at 6:42 PM Mike wrote:
> The device in question is to replace an existing RF-to-baseband
> component of a geographically distributed signal collection system.
> Each receiving station samples the 6 MHz passband, detects a signal and
> estimates a time-of-arrival, then sends
On Sun, Jan 26, 2020 at 1:20 PM Mike wrote:
> Hello,
>
> I am hoping someone on the list could suggest a device that receives in
> lower L-band (1.0 to 1.6 GHz) and can cover 6 MHz (+/- 3 MHz around
> center) at (and here's the trick) 500 MS/second with at least 8 bits of
> resolution. I'm
On Mon, Jan 13, 2020 at 5:23 AM voonna santosh via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi Sam,
>I have managed to reproduce this issue and when it happens, here is the
> info you have asked for:
>
>
> 1: lo: mtu 65536 qdisc noqueue state UNKNOWN group
> default qlen 1000
>
On Thu, Jan 9, 2020 at 6:45 PM Richard Bell wrote:
> No I don't need to know phase information. I'm cross correlating the pairs
> of receivers and the location of the peak gives me the TDOA. If the
> hardware chains across different radios introduce different delays, that
> would invalidate the
On Thu, Jan 9, 2020 at 12:14 PM Richard Bell via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
> I'm working on a TDOA based localization platform using 3 USRP X300's as
> receivers. I have them synchronized with a 10 MHz ref and PPS signal
> generated by an OctoClock. However, I'm
On Wed, Jan 8, 2020 at 8:00 AM Felix Greiwe via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi EJ,
>
> thank you for your answer! To make my error more traceable, I created a
> new OOT Module and added the default gain block from rfnoc getting
> started.
>
> I also took your advice and
On Fri, Jan 3, 2020 at 1:41 PM Cherif Diouf wrote:
> I have this version UHD 3.15.0.git-84-g164d76dc
>
> but the lines are there whenever you use the ./uhd_image_builder.py
> scripts.
>
Ah, I see it now:
On Fri, Jan 3, 2020 at 1:14 PM Cherif Diouf via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi Jerrid,
>
>
>
> Some hints, for info, I am working with the X310 device, but you can
> take the big picture.
>
>
> I previously met such issues, those were related to signal re-definitions.
>
>
On Thu, Jan 2, 2020 at 11:48 AM Jerrid Plymale
wrote:
> I am trying to generate a custom RFNoC FPGA Image using this version of
> UHD.
>
OK. So you've checked out fde2a94eb7231af859653db8caaf777ae2b66199 and
you're trying to build a regular image with Vivado 2018.3. Correct?
Brian
>
On Thu, Jan 2, 2020 at 11:42 AM Jerrid Plymale
wrote:
> Hello Brian,
>
>
>
> I have installed UHD 3.15.0.0-124-geb448043
>
And this is what you're trying to build?
Brian
>
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On Thu, Jan 2, 2020 at 11:24 AM Jerrid Plymale via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello Marcus,
>
> So I tried cleaning the uhd-fpga folder as you suggested, however I ended
> up getting the same errors and the image still failed to build. I have
> attached the build log again
On Tue, Dec 3, 2019 at 1:53 PM Jeff S wrote:
> I'm fairly new to GNURadio, so I may have (most likely) missed it, but I
> had the same problem that was fixed by multiplying the complex number going
> into my sink by 0.25 to get my QPSK modulation to work on my X310. Since
> doing that, I have
On Thu, Nov 21, 2019 at 2:49 PM Lindstedt, Ralf via USRP-users <
usrp-users@lists.ettus.com> wrote:
> We are transmitting samples in bursts of 15360 samples(1ms @
> 15.36Msamples/s). When the magnitudes of the transmitted samples are mostly
> larger than 1.0, the received signal, especially the
Hey Jon,
On Wed, Nov 13, 2019 at 11:17 AM Jonathan Lockhart
wrote:
> Greetings Brian,
>
> I had noticed that the script was set to use the X300 after I sent the
> email. I switched in the CMakeList.txt file to use the e300 repo, which is
> using the Zynq-7020, which is included in the webpack
On Wed, Nov 13, 2019 at 10:54 AM Jonathan Lockhart via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Greetings USRP Users,
>
> I am having another issue with the UHD-3.14 build I can't seem to shake
> down. I have been going through this guide on the KB to learn how to use
> the rfnocmodtool
On Thu, Sep 19, 2019 at 11:18 AM Felix Greiwe
wrote:
> Hi Brian,
>
> thank you for your help.
>
> I have on question left. You say the crossbar is non blocking. Does that
> mean it can supply multiply RFNoC Blocks with input data at once at its
> full bus_clk speed? Or does it switch between the
On Thu, Sep 19, 2019 at 9:39 AM Felix Greiwe via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello together,
>
> I have some questions concerning clock speeds and the corresponding data
> rates on a USRP x310 (FPGA). As far as I know, there are two different
> clock speeds on the FPGA, the
On Wed, Jul 24, 2019 at 8:11 AM Rodolphe Bertolini via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I apologize if this is a duplicated email.
>
> Hello community,
>
> uhd_usrp_probe (and all the others commands) doesn't log the USB version
> to which the USRP is operating.
>
> Instead it
On Mon, Jul 22, 2019 at 5:18 PM Brian Padalino wrote:
> On Mon, Jul 22, 2019 at 5:12 PM Brian Padalino
> wrote:
>
>> You just need to write_reg() and use an address of SR_AXI_CONFIG for
>> everything other than the last value, and use SR_AXI_CONFIG_TLAST for the
>>
On Mon, Jul 22, 2019 at 5:12 PM Brian Padalino wrote:
> You just need to write_reg() and use an address of SR_AXI_CONFIG for
> everything other than the last value, and use SR_AXI_CONFIG_TLAST for the
> last one.
>
> That should push the valid high on the config line for ea
You just need to write_reg() and use an address of SR_AXI_CONFIG for
everything other than the last value, and use SR_AXI_CONFIG_TLAST for the
last one.
That should push the valid high on the config line for each write you do,
and then on the last write both valid and tlast will be held.
Brian
On Sun, May 12, 2019 at 6:34 AM Daniel Ozer via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
> Im trying to write and read data from the ddr3 ram in the usrp x310 using
> the fpga.
> I wasn't able to find if there is any other blocks that use the ram (in
> the defualt image ) .
>
On Thu, May 9, 2019 at 1:03 PM Michael Deacon wrote:
> I hope this is what you are looking for. Would clipping here be an
> indication of saturation?
>
Not quite. You may be able to look at the CCDF of the output and see if it
hits a brick wall versus the "good" picture.
I'd much prefer to
gt;
> Mike
>
>
>
> *From:* Brian Padalino
> *Sent:* Wednesday, May 8, 2019 4:37 PM
> *To:* Michael Deacon
> *Cc:* usrp-users@lists.ettus.com
> *Subject:* Re: [USRP-users] Relationship between IQ values, gain and
> noise on B205mini transmitter
>
>
>
> On
On Wed, May 8, 2019 at 7:28 PM Michael Deacon via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
>
>
> I have a simple transmitter consisting of a file source connected to a
> USRP sink (attached image radio.png). The file contains interleaved
> floating point IQ representing a few
On Wed, May 8, 2019 at 5:43 AM Marwa Boukhari via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
> I want to send and receive a Signal at the frequency 900MHz with the
> Channel 0 , and want to receive another Signal from the generator at the
> frequency 5,68GHz with the other channel.
>
Since it's AM, try shifting your center frequency by a little bit.
Extract the envelope the same way, though.
My thought is the DC cancellation circuitry in the 9361 is killing your AM
waveform, so use a low-IF approach instead.
Brian
On Sun, May 5, 2019 at 1:05 PM franz kurniawan via
2017.4 is the latest version that is supported I believe.
Brian
On Sun, May 5, 2019 at 6:36 AM Sam mite via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I want to know what are the current supported vivado versions for X300 and
> X310 and also for E310 and E320 for generating RFNoC images?
On Fri, Apr 26, 2019 at 6:09 AM Chintan Patel via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
>
> On the B210 devices which use the AD9361, what is the granularity on the
> sample rate supported? I know the max sample rate is 61.44MHz, and that the
> BBPLL that drives the ADC sample
On Tue, Apr 23, 2019 at 2:06 PM Fabian Schwartau via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi everyone,
>
> I just found another strange thing. Can get_time_now() be in any case
> blocking? Like long blocking? It takes more than 1 second to return!
> I am heavily using timed commands,
On Tue, Apr 9, 2019 at 12:13 PM Tillson, Bob (US) via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I see this a lot with short waveforms as it is much more impactful.
>
> When you submit samples, there are previous samples within the buffer
> (there always are) and the "entire" waveform
On Tue, Apr 9, 2019 at 11:46 AM Michael R. Freedman
wrote:
> I'm generating samples at 2MHz.
>
What Ettus radio are you using?
Brian
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On Tue, Apr 9, 2019 at 11:35 AM Michael R. Freedman via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
>
>
> I am doing timed streaming. It appears to me that there are several
> "zero" samples getting to the DAC prior to my waveform and as a result,
> my waveform is being truncated.
On Tue, Mar 19, 2019 at 1:52 PM Rob Kossler via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
> Are there restrictions regarding which DDC ports must be connected to
> which Radio ports. I am using an X310/UBX with a custom C++ rfnoc
> application and would like to do the following:
>
On Mon, Mar 11, 2019 at 11:35 AM Chesir, Aaron M. wrote:
> Folks,
>
>
>
> I am going through a series of on-boarding projects using GNUradio, and
> one of the projects requires access to a copy of Python source code for an
> example of a Costas loop. Specifically, the project refers to a file “
You've got a dual-install issue here.
On Sat, Mar 9, 2019 at 2:35 PM Thomas Lavarenne via USRP-users <
usrp-users@lists.ettus.com> wrote:
> uhd_probe seems good, but same error in GNU Radio.. (RuntimeError:
> RuntimeError: Expected FPGA compatibility number 14, but got 16:)
>
> $ uhd_usrp_probe
On Sat, Mar 9, 2019 at 1:45 PM Thomas Lavarenne via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hello,
> I'm new here and pretty new with usrp. I'm trying to use usrp-2900 with
> GNU Radio and Ubuntu 18.04, but i have this problem (latest driver uhd from
> source):
>
> '''
> linux; GNU C++
On Wed, Mar 6, 2019 at 3:12 PM Marcus Müller
wrote:
> I've had rather longish discussions on how to solve this; essentially:
> for something that actually *solves* the issue (instead of postponing
> it), as Ian said, you'd need to have clock domain crossing ability.
>
Could message passing from
On Wed, Mar 6, 2019 at 3:12 PM Marcus Müller
wrote:
> I've had rather longish discussions on how to solve this; essentially:
> for something that actually *solves* the issue (instead of postponing
> it), as Ian said, you'd need to have clock domain crossing ability.
>
Could message passing from
On Fri, Feb 22, 2019 at 6:19 PM Martin Braun wrote:
> This pokes a register in the STC3. It'll pull the FPGA into reset. You
> then need to wait a bit before the FPGA is back up.
>
So it's a forced reload of the FPGA from the onboard image. To use this in
software, I'd issue the command, then
On Wed, Feb 20, 2019 at 7:45 PM Jonathon Pendlum
wrote:
> Hi Armin,
>
> You can reset X3x0 series devices via a register write with the following
> command (this is in to your UHD src directory):
> firmware/usrp3/x300/x300_debug.py --addr 192.168.40.2 --poke=0x00100058
> --data=1.
>
Can you
On Tue, Feb 19, 2019 at 12:07 PM Armin Schmidt wrote:
> Thanks for your replay! Hm, yes I've thought also about to use
> STREAM_MODE_STOP_CONTINUOUS, but I would like to be able to restart my app
> also after a crash. Ok, it should never happen, but one can never guarantee
> that case. Do you
On Tue, Feb 19, 2019 at 5:42 AM Armin Schmidt via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hallo,
> We're about to migrate from multi-usrp-application with UHD 3.9 and
> custome FPGA to UHD 3.14 with RFNoC. We are using the USRP x310 with
> daughterboards ubx-160. Everything seems to
Check U530 on page 11, A1:
https://files.ettus.com/schematics/x300/x3xx.pdf
It's a FIN1002 LVDS receiver. Datasheet says 16mA max:
http://www.mouser.com/ds/2/149/FIN1002-108110.pdf
Brian
On Tue, Feb 12, 2019 at 11:16 AM Jason Roehm via USRP-users <
usrp-users@lists.ettus.com> wrote:
>
On Mon, Jan 28, 2019 at 3:42 PM Jason Matusiak via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Is it possible to have two different DMAFifo RFNoC blocks on an X310? I
> am not worried about the resources so much as how to implement it (I know
> that I cannot add it to the uhd_image_builder
On Fri, Dec 21, 2018 at 11:49 AM David Bengtson
wrote:
> So I dug into this (On a 10k piece of equipment?) and came up with the
> following bands
>
> 1: 3000 to 6000
> 2: 2200 to 2800
> 3: 1650 to 2200
> 4: 1400 to 1575
> 5: 700 to 1000
> 6: 500 to 530
> plus 1 unfiltered path.
>
Also looks
On Fri, Dec 21, 2018 at 7:51 AM David Bengtson via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi-
>
> The N310 receiver has a set of switchable bandpass filters on the
> receiver inputs. I've looked through the N310 knowledge base, and
> haven't come across any documentation on these
On Wed, Dec 19, 2018 at 6:22 PM J M wrote:
> Some of that makes sense to me. Do you know of an open source example
> where something similar to this is done?
>
No, but it shouldn't be too bad to try and simulate. Make a top block with
2 sets of AXI streaming associated with bus_clk, then
On Wed, Dec 19, 2018 at 4:24 PM J M wrote:
> Potentially, yes the full 200 MHz
>
Ah, yes. Then you'd need 2 connections to the crossbar.
If you didn't need all 200MHz, then you could get away with 2 ports off the
same crossbar connection as well.
I think you would just have each connection
On Wed, Dec 19, 2018 at 4:06 PM J M wrote:
> The block is performing some signal processing on incoming samples
> streaming from a radio block, but the signal processing is based on the
> data stored in the ram. It would be ideal to be able to swap out the RAM
> while the block is streaming,
On Wed, Dec 19, 2018 at 12:53 PM J M via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
>
> I'm trying to load a RAM inside an RFNoC block, and doing this via
> register writes takes about a minute and half.
>
> So, looking for a quicker way to load up the data from the RAM, thought
>
On Wed, Dec 5, 2018 at 4:13 PM Max Thomas via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
>
> When attempting to stream different waveforms using both channels of the
> replay block simultaneously to two radios on the same USRP (X310) there are
> under-runs. Any ideas why this is
Hey Carlos,
On Tue, Dec 4, 2018 at 1:16 PM Carlos Alberto Ruiz Naranjo <
carlosruiznara...@gmail.com> wrote:
> Hi Brian,
>
> I have finished the DDC block 1:8 and it works perfectly!! :) :)
>
Congratulations!
>
> Now I am in my final step, a 2:16 DDC block:
> - Channels 0:7 connected to input
On Tue, Dec 4, 2018 at 10:35 AM Jason Matusiak via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I have a X310 with a pair of CBX-130s installed and am running RFNoC. The
> flowraph looks like this:
>
>
> Radio (running at 200MHz) -> DDC (200MHz down to 50MHz) -> splitter ->
> off to some
Hey Jason,
On Mon, Dec 3, 2018 at 11:50 AM Jason Matusiak <
ja...@gardettoengineering.com> wrote:
> Brian,
>
> I am not sure what the issue is here. I don't think it is the chained DDC
> anymore as I can see the issue with the single DDC using multiple different
> bitfiles.
>
> I wasn't
On Mon, Dec 3, 2018 at 11:32 AM Jason Matusiak via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Actually, upon further review, I can get this to happen with the stock XG
> image and as simple flowgraph as possible.
>
> If I run the stock image as non-RFNoC seems to be fine, so it has
>
On Fri, Nov 30, 2018 at 11:29 AM Marcus Müller via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi J. Jeffson,
>
> to answer quickly: see below.
> On Fri, 2018-11-30 at 11:36 +0800, 蒋逸凡 via USRP-users wrote:
> > Hi all
> > I'm trying to use USRP X Series (2943/2954) in my project. I
t; Thank you!! :)
>
>
>
>
> El mié., 28 nov. 2018 a las 16:17, Carlos Alberto Ruiz Naranjo (<
> carlosruiznara...@gmail.com>) escribió:
>
>> Ok! Thank you :)
>>
>> El mié., 28 nov. 2018 a las 16:13, Brian Padalino ()
>> escribió:
>>
&
On Wed, Nov 28, 2018 at 9:43 AM Carlos Alberto Ruiz Naranjo <
carlosruiznara...@gmail.com> wrote:
> Thank you! I already have enough work to continue :)
>
> One last thing. In the split_stream module, did you concat tuser with
> m_axis_data_tuser with m_axis_data_tdata?
>
No tuser at that point.
Hey Carlos,
On Tue, Nov 27, 2018 at 6:18 PM Carlos Alberto Ruiz Naranjo <
carlosruiznara...@gmail.com> wrote:
> Hello Brian,
>
> Thank you very much for answering, I am spending a lot of time on this and
> I do not see the way out.
>
> I am following your advice, I have removed the 3 inputs of
On Mon, Nov 26, 2018 at 12:14 PM Carlos Alberto Ruiz Naranjo via USRP-users
wrote:
> Hello,
>
> I have customized the rfnoc DDC. I have:
>
> - 4 inputs (0,1,2,3).
> - 4 outputs (0,1,2,3).
> - 4 independently tunable DDCs.
> - Input 0 connected to outputs 0,1,2,3.
> - Input 1,2,3 disconnected.
>
On Mon, Nov 19, 2018 at 2:47 PM Rob Kossler via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Hi,
> Can anyone offer advice regarding the RFNoC FFT scaling argument? It is
> not clear to me if this argument should always be left alone or if it
> should be adjusted as needed by the user for
On Tue, Oct 30, 2018 at 11:25 AM Marcus D. Leech via USRP-users <
usrp-users@lists.ettus.com> wrote:
> On 10/30/2018 10:42 AM, Daniel May via USRP-users wrote:
>
> Is there a way to query the amount of data in the FIFO so that I can wait
> until it clears?
>
> I don't believe so.
>
There's a
e X300 TX ramp up time?
> Best,
> Ryan
>
> On Tue, Oct 16, 2018 at 6:28 PM, Brian Padalino
> wrote:
>
>> Maybe ramp up time for the transmitter?
>>
>> If you send 2.5us worth of 0's before your 1000 samples, do you see the
>> appropriate number of pulse bu
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