On 7/28/2011 3:06 PM, Ido Yariv wrote:
> Hi Troy,
>
> On Thu, Jul 28, 2011 at 02:15:41PM -0700, Troy Kisky wrote:
>>> + if (power_on) {
>>> + /* Power up sequence required for wl127x devices */
>>> + gpio_set_value(DA850_WLAN_EN, 1);
>&
On 7/28/2011 1:52 PM, Ido Yariv wrote:
> The wl1271 daughter card for AM18x EVMs is a combo wireless connectivity
> add-on card, based on the LS Research TiWi module with Texas
> Instruments' wl1271 solution.
> It is a 4-wire, 1.8V, embedded SDIO WLAN device with an external IRQ
> line and is power
On 9/23/2010 7:27 AM, Kevin Hilman wrote:
> Troy Kisky writes:
>
>> On 9/21/2010 4:24 AM, Sudhakar Rajashekhara wrote:
>>> Hi,
>>>
>>> On Tue, Sep 21, 2010 at 09:43:28, Jon Povey wrote:
>>>> When setting up to transmit, a race exists between the
ed to Techwell TW2836 and Wolfson WM8985
>>
>> Signed-off-by: Jon Povey
>> CC: Sudhakar Rajashekhara
>> CC: Troy Kisky
>> ---
>> Reworked after comments by Troy and Sudhakar.
>>
>> Looking at the datasheet it seemed like setting STP without STT early
>> On 9/17/2010 6:09 AM, Sudhakar Rajashekhara wrote:
>>> I remember I had some issues on OMAP-L138 with this fix, that's when
>>> I reverted to configuring ICMDR before writing to DXR (Please see
>>> here: https://patchwork.kernel.org/patch/75262/). I checked the BIOS
>>> I2C driver code for OMAP-
On 9/17/2010 6:09 AM, Sudhakar Rajashekhara wrote:
> Hi,
>
> On Fri, Sep 17, 2010 at 08:32:11, Jon Povey wrote:
>> When setting up to transmit, a race exists between the ISR and
>> i2c_davinci_xfer_msg() trying to load the first byte and adjust counters.
>> This is mostly visible for transmits > 1
On 9/16/2010 10:37 AM, Kevin Hilman wrote:
> Jon Povey writes:
>
>> When setting up to transmit, a race exists between the ISR and
>> i2c_davinci_xfer_msg() trying to load the first byte and adjust counters.
>> This is mostly visible for transmits > 1 byte long.
>>
>> The ISR may run at any time
Nori, Sekhar wrote:
> On Wed, Jul 14, 2010 at 00:31:00, troy.ki...@boundarydevices.com wrote:
>> On Tue 13/07/10 6:00 AM , "Nori, Sekhar" nsek...@ti.com sent:
>>
>
>> The reason is so that the IRAM data can be fetched and used
>> while
>>
>> EVENTQ_1 fetches the next buffer of data from
BODY { font-family:Arial, Helvetica, sans-serif;font-size:12px; }
On Tue 13/07/10 6:00 AM , "Nori, Sekhar" nsek...@ti.com sent:
Hi Troy,
On Tue, Nov 17, 2009 at 05:22:34, Troy Kisky wrote:
> Fix underruns by using dma to copy 1st to sram
> in a ping/pong buffe
raffaele.recalc...@bticino.it wrote:
> -----Troy Kisky ha scritto: -
>
>> Per: Raffaele Recalcati
>> Da: Troy Kisky
>> Data: 02/07/2010 22.57
>> Cc: davinci-linux-open-source@linux.davincidsp.com, Mark Brown
>> , Raffaele Recalcati
>>
>&
Raffaele Recalcati wrote:
> @@ -447,6 +448,24 @@ static int davinci_i2s_hw_params(struct
> snd_pcm_substream *substream,
> 8 - 1);
> + if (dev->i2s_accurate_clock) {
> + clk_div = 256;
> + do {
> +
Raffaele Recalcati wrote:
> + if (dev->i2s_fast_clock) {
> + clk_div = 256;
can you have
f = (freq / params->rate_num) * params->rate_den;
> + do {
> + framesize = (freq / (--clk_div)) /
> +
Kevin Hilman wrote:
> Sudhakar Rajashekhara writes:
>
>> This patch set corrects some issues with the existing EDMA
>> driver and also adds support for EDMA resource (channel/slots)
>> sharing between two processors (say ARM and DSP).
>>
>> The patch set has been tested on DM646x, OMAP-L137 and O
Sriramakrishnan wrote:
> When programming the DMA engine, the next pointers must be
> programmed with physical address as seen from the DMA master
> address space. This address may be different from physical
> address of the buffer RAM area. This patch abstracts the
> buffer address translation log
Sriramakrishnan wrote:
> On certain SOCs, the EMAC controller is interfaced with a wrapper logic
> for handling interrupts. This patch implements a platform
> specific hook to cater to platforms that require custom interrupt
> handling logic
>
> Signed-off-by: Sriramakrishnan
> Acked-by: Chaithr
Fix underruns by using dma to copy 1st to sram
in a ping/pong buffer style and then copying from
the sram to the ASP. This also has the advantage
of tolerating very long interrupt latency on dma
completion.
Signed-off-by: Troy Kisky
---
arch/arm/mach-davinci/include/mach/asp.h |2 +
sound
Allow the left and right 16 bit samples to be shifted out as 1
32 bit sample.
Signed-off-by: Troy Kisky
---
arch/arm/mach-davinci/include/mach/asp.h |6 ++
sound/soc/davinci/davinci-i2s.c | 74 ++
2 files changed, 61 insertions(+), 19 deletions
Remove requirement that dma_params is 1st in the structures
davinci_audio_dev and davinci_mcbsp_dev.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c |6 +-
sound/soc/davinci/davinci-mcasp.c |1 +
sound/soc/davinci/davinci-mcasp.h |5 -
sound/soc/davinci
Rename variable master_lch to asp_channel
Rename variable slave_lch to asp_link[0]
Rename local variables:
lch to link
count to asp_count
src to asp_src
dst to asp_dst
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-pcm.c | 64
Chaithrika U S wrote:
> The DMA params for McASP with FIFO has been updated so that it works for
> various FIFO levels. A member- 'fifo_level' has been added to the DMA
> params data structure. The fifo_level can be adjusted by the tx[rx]_numevt
> platform data. This is relevant only for DA8xx/OMAP
Steve Chen wrote:
> On Tue, 2009-09-29 at 15:09 -0700, Troy Kisky wrote:
>>> Troy, do you have any theory yet on why your patch should permanently swap
>>> channels?
>>>
>> Memory in 16 bit samples
>> L1,R1,L2,R2
>>
>> Shifting out in 16 bit sa
>
> Troy, do you have any theory yet on why your patch should permanently swap
> channels?
>
Memory in 16 bit samples
L1,R1,L2,R2
Shifting out in 16 bit samples
L1,R1,L2,R2
Memory in 32 bit samples
R1L1,R2L2,R3L3
Shifting out in 32 bit samples
R1L1,R2L2
Codec sees 16 bit samples
R1,L1,R2,L2
Mark Brown wrote:
> On Wed, Sep 09, 2009 at 06:57:10PM -0700, Troy Kisky wrote:
>
>> This applies on top of my last patchset to Kevin's temp/asoc branch
>
> Could you please respin against what's in for-2.6.32 - this ought to get
> fixed there but the other chang
This is a proposed fix for the data_type divide
by 0 error.
Signed-off-by: Troy Kisky
---
This applies on top of my last patchset to Kevin's temp/asoc branch
sound/soc/davinci/davinci-i2s.c | 18 +++---
sound/soc/davinci/davinci-mcasp.h |7 ++-
sound/soc/davinci/da
Mani, Arun wrote:
> It indeed gets initialized in the hw_params. But the runtime dma parameters
> are not populated with the substream private data information that is gets in
> hw_params for the first time. I am not sure why. Any ideas?
>
>
>
> Thanks,
> Arun.
>
The real bug is in the routi
a...@ti.com wrote:
> From: Arun Mani
>
> Signed-off-by: Arun Mani
> ---
> sound/soc/davinci/davinci-i2s.c |2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
> index b1ea52f..61b1763 100644
> --- a/sou
a...@ti.com wrote:
> From: Arun Mani
>
> Signed-off-by: Arun Mani
> ---
> sound/soc/davinci/davinci-i2s.c |2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
> index b1ea52f..61b1763 100644
> --- a/sou
Rename variable master_lch to asp_channel
Rename variable slave_lch to asp_link[0]
Rename local variables:
lch to link
count to asp_count
src to asp_src
dst to asp_dst
Signed-off-by: Troy Kisky
---
This goes on top of Kevin temp/asoc branch plus
[PATCH 1/3] ASoC
Fix underruns by using dma to copy 1st to sram
in a ping/pong buffer style and then copying from
the sram to the ASP. This also has the advantage
of tolerating very long interrupt latency on dma
completion.
Signed-off-by: Troy Kisky
---
arch/arm/mach-davinci/include/mach/asp.h |2 +
sound
David Brownell wrote:
> On Thursday 03 September 2009, Troy Kisky wrote:
>> David Brownell wrote:
>>> On Monday 31 August 2009, Troy Kisky wrote:
>>>> - int master_lch; /* Master DMA channel */
>>>> - int slave_lch;
David Brownell wrote:
> On Monday 31 August 2009, Troy Kisky wrote:
>> - int master_lch; /* Master DMA channel */
>> - int slave_lch; /* linked parameter RAM reload slot */
>> + int asp_master_lch; /* Master DMA channel */
>>
Nori, Sekhar wrote:
> On Thu, Sep 03, 2009 at 05:45:08, Troy Kisky wrote:
>> Mark Brown wrote:
>>> On Mon, Aug 31, 2009 at 04:31:44PM -0700, Troy Kisky wrote:
> [...]
>>> I'll probably also apply the first patch since nobody else seems to care
>>> one
Mark Brown wrote:
> On Mon, Aug 31, 2009 at 04:31:44PM -0700, Troy Kisky wrote:
>> Rename variable master_lch to asp_master_lch
>> Rename variable slave_lch to asp_link_lch[0]
>> Rename local variables:
>> count to asp_count
>> src to asp_src
>>
Mark Brown wrote:
> On Tue, Sep 01, 2009 at 01:42:02PM -0700, Troy Kisky wrote:
>> Mark Brown wrote:
>
>>>> is using the same TC. But sram isn't on by default either. And probably
>>>> shouldn't
>>>> be since the newer chips don't h
Mark Brown wrote:
> On Tue, Sep 01, 2009 at 12:19:26PM -0700, Troy Kisky wrote:
>> Mark Brown wrote:
>
>>> Of course, the other way of looking at it is that with the channel
>>> swapping you've got guaranteed breakage - it sounds less good if you say
>>&g
Mark Brown wrote:
> On Tue, Sep 01, 2009 at 11:23:27AM -0700, Troy Kisky wrote:
>> Mark Brown wrote:
>
>>> Last time you submitted this I suggested changing this to make the
>>> default the other way round so that there's no breakage on existing
>>> b
Mark Brown wrote:
> On Mon, Aug 31, 2009 at 04:31:43PM -0700, Troy Kisky wrote:
>
>> +/*
>> + * Allowing this is more efficient and eliminates left and right swaps
>> + * caused by underruns, but will swap the left and right channels
>> + * when
Fix underruns by using dma to copy 1st to sram
in a ping/pong buffer style and then copying from
the sram to the ASP. This also has the advantage
of tolerating very long interrupt latency on dma
completion.
Signed-off-by: Troy Kisky
---
arch/arm/mach-davinci/include/mach/asp.h |2 +
sound
Allow the left and right 16 bit samples to be shifted out as 1
32 bit sample.
Signed-off-by: Troy Kisky
--
This applies to Kevin's temp/asoc branch
---
arch/arm/mach-davinci/include/mach/asp.h |6 ++
sound/soc/davinci/davinci-i2s.c | 74 ++
2
Rename variable master_lch to asp_master_lch
Rename variable slave_lch to asp_link_lch[0]
Rename local variables:
count to asp_count
src to asp_src
dst to asp_dst
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-pcm.c | 48
Mark Brown wrote:
> On Thu, Aug 06, 2009 at 07:05:54PM -0700, Troy Kisky wrote:
>
>> This is allocated too late for the "ensure that buffer size is a multiple of
>> period size"
>> constraint.
>
>> I have a patch after fixing other feedback.
>
&
Chaithrika U S wrote:
> ---
> sound/soc/davinci/davinci-mcasp.c | 113 ++--
> sound/soc/davinci/davinci-mcasp.h |5 ++
> sound/soc/davinci/davinci-pcm.c |4 +-
> sound/soc/davinci/davinci-pcm.h |1 +
> 4 files changed, 115 insertions(+), 8 deletions
Troy Kisky wrote:
> Fix underruns by using dma to copy 1st to sram
> in a ping/pong buffer style and then copying from
> the sram to the ASP. This also has the advantage
> of tolerating very long interrupt latency on dma
> completion.
>
> Signed-off-by: Troy
Fix underruns by using dma to copy 1st to sram
in a ping/pong buffer style and then copying from
the sram to the ASP. This also has the advantage
of tolerating very long interrupt latency on dma
completion.
Signed-off-by: Troy Kisky
---
arch/arm/mach-davinci/include/mach/asp.h |2 +
sound
Rename variable master_lch to asp_master_lch
Rename variable slave_lch to asp_link_lch[0]
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-pcm.c | 38 +++---
1 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/sound/soc/davinci/davinci-pcm.c
Allow the left and right 16 bit samples to be shifted out as 1
32 bit sample.
Signed-off-by: Troy Kisky
---
arch/arm/mach-davinci/include/mach/asp.h |6 +++
sound/soc/davinci/davinci-i2s.c | 73 ++---
2 files changed, 61 insertions(+), 18 deletions
dai is a parameter to the functions, so use it instead of
looking it up.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 14 +-
1 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index
The dma setup code assumes that the buffer size is a multiple
of the period size.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-pcm.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index
Karicheri, Muralidharan wrote:
> Troy,
>
>
>> I personally like the idea behind this patch. But I have
>> heard others argue against it. But it is not related to the
>> ^C issue others have mentioned.That should not happen in
>> the GIT kernel.
>>
> I do get this ^c timeout issue in DM6446 and DM
nsnehapra...@ti.com wrote:
> +/* An ECC layout for using 4-bit ECC with large-page (2048bytes) flash,
> + * storing ten ECC bytes plus the manufacturer's bad block marker byte,
> + * and not overlapping the default BBT markers.
> + */
> +static struct nand_ecclayout hwecc4_2048 __initconst = {
> +
Philby John wrote:
>>From dbe7e824d576636bb15b82a20fd2557fddc9a8f7 Mon Sep 17 00:00:00 2001
> From: Philby John
> Date: Tue, 14 Jul 2009 21:46:47 +0530
> Subject: [PATCH] Reset i2c bus to come out of time out conditions
>
> Get out of i2c time out condition by resetting
> the i2c bus. The kernel
Kevin Hilman wrote:
> The point is that we should not be passing around platform-dependent
> physical clock name strings to platform-indepenent code.
>
> Kevin
>
I don't see the light, but that's ok. I'm not afraid of the dark.
Troy
___
Davinci-linu
Kevin Hilman wrote:
> Well, it's not actually this patch that started the problem, it was
> the platform_data updates where clock names were added as part of the
> new platform_data struct shared between platform code and ASoC.
>
> My original proposal was to pass a clock pointer, not a clock name
Russell King - ARM Linux wrote:
> On Fri, Jul 10, 2009 at 12:47:50PM -0700, Troy Kisky wrote:
>> Mani, Arun wrote:
>>> Hi,
>>> I am trying the latest 2.6.31 rc2 branch. I am trying to make the Audio
>>> work.
>>> I found that the I2S clock i
Mani, Arun wrote:
> Hi,
> I am trying the latest 2.6.31 rc2 branch. I am trying to make the Audio work.
> I found that the I2S clock is set to NULL. Because of this I am getting a
> NODEV error.
> If I commented the check, I was able to map the I2S to the AIC33X. but I am
> not getting any sound
Mark Brown wrote:
> On Mon, Jul 06, 2009 at 02:50:44PM -0700, Kevin Hilman wrote:
>> Mark Brown writes:
>
>>> I guess it's safe for me to go ahead and merge the ASoC changes that
>>> were waiting for this now, then?
>
>> Yes, go ahead.
>
>>> IIRC it's runtime dependencies only so there should
Update the dma link with correct data as soon as
the master channel has copied it. Otherwise, the
1st period will play twice.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-pcm.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/sound/soc/davinci/davinci-pcm.c b
Mark Brown wrote:
> On Mon, Jul 06, 2009 at 02:50:44PM -0700, Kevin Hilman wrote:
>> Mark Brown writes:
>
>>> I guess it's safe for me to go ahead and merge the ASoC changes that
>>> were waiting for this now, then?
>
>> Yes, go ahead.
>
>>> IIRC it's runtime dependencies only so there should
Troy Kisky wrote:
> Troy Kisky wrote:
>> Mark Brown wrote:
>>
>> Even when using SDRAM, there is still another advantage to double buffering.
>> That is tolerating very long interrupt latency on dma completion. The current
>> code sets up the next periods dma trans
Troy Kisky wrote:
> Mark Brown wrote:
>
> Even when using SDRAM, there is still another advantage to double buffering.
> That is tolerating very long interrupt latency on dma completion. The current
> code sets up the next periods dma transfer on dma completion. This could
>
Mark Brown wrote:
>>> battery life by setting up very big DMAs. On a similar vein is it worth
>>> considering making this feature entirely optional and/or falling back to
>>> non-SRAM if SRAM allocation fails?
>
>> Yes Chris Ring also asked for that, and it is fairly easy to allocate another
>> S
Mark Brown wrote:
> On Sat, Jul 04, 2009 at 07:30:01PM -0700, Troy Kisky wrote:
> If you mean that it should start and
> stop the clocks
Yes.
> that causes issues in situations like TDM since there
> can be transfers going on independantly of the CPU which may need the
> cl
Mark Brown wrote:
> On Mon, Jul 06, 2009 at 03:01:54PM -0700, Troy Kisky wrote:
>
>> But even if the cpu is the clock/frame master, the sample rate generator has
>> an 8 bit
>> divider field, which seems to be always 0 in the current code. And I don't
>> see
Mark Brown wrote:
> On Sat, Jul 04, 2009 at 07:30:00PM -0700, Troy Kisky wrote:
>> If the codec is master, we support anything
>> that the codec supports.
>
> Hrm, tricky - the rate configuration doesn't depend on what is master so
> this could cause co
Mark Brown wrote:
> On Sat, Jul 04, 2009 at 07:29:50PM -0700, Troy Kisky wrote:
>> This patch set is against git://git.alsa-project.org/alsa-kernel.git
>
> Best to use
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
>
> or
> git:
Fix underruns by using dma to copy 1st to sram
in a ping/pong buffer style and then copying from
the sram to the ASP. This also has the advantage
of tolerating very long interrupt latency on dma
completion.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-pcm.c | 520
This patch will reduce the number of underruns by
shifting out 32 bit values instead of 16 bit. It also
adds mono support.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 124 +++
sound/soc/davinci/davinci-pcm.c | 31 +++---
sound/soc
Code previously just "ors" in this field without clearing
first. Fix, by never reading this register.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 50 ++
1 files changed, 29 insertions(+), 21 deletions(-)
diff --git a/sound/s
If the codec is master then prepare should call
mcbsp_start, not trigger.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 28 +++-
1 files changed, 27 insertions(+), 1 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci
This patch set is against git://git.alsa-project.org/alsa-kernel.git
but the last patch in series won't compile until the sram allocator patch
is available.
___
Davinci-linux-open-source mailing list
Davinci-linux-open-source@linux.davincidsp.com
http:/
Add davinci_mcbsp_dev as argument to davinci_mcbsp_start
and davinci_mcbsp_stop.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 16
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci
No functional changes. Rename variable w to something
more meaningful. Remove code obfuscating macro MOD_REG_BIT.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 96 ++-
1 files changed, 44 insertions(+), 52 deletions(-)
diff --git a/sound
Add toggle_clock function to complete i2s reset earlier.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 31 +--
1 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index
Save a few lines of code.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c |8 ++--
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index 4260965..5b31b56 100644
--- a/sound/soc/davinci/davinci
Only start sample generator if needed, and more
cleanup on davinci_mcbsp_start.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c | 32 ++--
1 files changed, 14 insertions(+), 18 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc
If the codec is master, we support anything
that the codec supports.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index f3e7bf8..f4b25ce
Move variable declaration closer to use.
Signed-off-by: Troy Kisky
---
sound/soc/davinci/davinci-i2s.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index f7d7e4c..73a0fd8 100644
--- a/sound/soc
Yusuf Caglar AKYUZ wrote:
> Troy Kisky wrote:
>> Use the sram(iram) to avoid underrun on audio.
>> I will clean this up after someone says it
>> works for them.
>>
>
> Hi,
>
> First of all, thanks for looking into this. This patch
> makes audi
Paulraj, Sandeep wrote:
>
>> -Original Message-
>> From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
>> Sent: Thursday, June 18, 2009 5:16 PM
>> To: Paulraj, Sandeep
>> Cc: davinci-linux-open-source@linux.davincidsp.com; linux-
>> m...@list
s-paul...@ti.com wrote:
> From: Sandeep Paulraj
>
> The patch applies to linux-mtd GIT tree
>
> This patch adds 4-bit ECC support for large page NAND chips using the new ECC
> mode NAND_ECC_HW_OOB_FIRST. The platform data from board-dm355-evm has been
> adjusted to use this mode.
>
> The patche
Chaithrika U S wrote:
> Introduce the platform driver model to get platform data for dm355 and dm644x.
> Register platform driver and acquire the resources in the probe function Since
> the platform specific code had been moved from machine driver to dm.c
>
> Signed-off-by: Naresh Medisetty
> Sig
Troy Kisky wrote:
> Have nand_base calculate a good ecc layout
> default. A benefit of this is allowing
> a software ecc other than 3 bytes long. For example,
> 4 bit software ecc correction.
>
> Boards that don't specify a layout and don't
> use all ecc byte
Use the sram(iram) to avoid underrun on audio.
I will clean this up after someone says it
works for them.
Signed-off-by: Troy Kisky
---
I fixed 2 bugs in this version.
1. I ensure that buffer size is a multiple of period size.
2. Disable asp rx on shutdown. If it is not disabled on shutdown
Koen Kooi wrote:
> On 23-05-09 01:15, Ring, Chris wrote:
>> New thread, as requested...
>>
>> I like Rob/David's suggestion of adding calls to
>> request_mem_region()/release_mem_region() in each allocator (SRAM and CMEM)
>
> What's the plan for getting CMEM upstream? I've been asking that
> que
Troy Kisky wrote:
> Rajashekhara, Sudhakar wrote:
>> Troy,
>>
>>> I tried this patch on DM644x EVM and following are my observations:
>>>
>>> 1. Playback works fine.
>>> 2. Record has some issues. Recorded stream has Loud volume on
>>>
Ring, Chris wrote:
> New thread, as requested...
>
> I like Rob/David's suggestion of adding calls to
> request_mem_region()/release_mem_region() in each allocator (SRAM and CMEM)
> when they're given this SRAM memory to manage to help catch collisions. CMEM
> added this recently too, so at le
Rajashekhara, Sudhakar wrote:
> Troy,
>
>> I tried this patch on DM644x EVM and following are my observations:
>>
>> 1. Playback works fine.
>> 2. Record has some issues. Recorded stream has Loud volume on
>> the right side, and on the left, volume is very low.
>
> This was because of my faulty L
Rajashekhara, Sudhakar wrote:
>> Rajashekhara, Sudhakar wrote:
>>> Troy,
>>>
>>> I tried this patch on DM644x EVM and following are my observations:
>>>
>>> 1. Playback works fine.
>>> 2. Record has some issues. Recorded stream has Loud volume on
>>> the right side, and on the left, volume is very
chaithrika wrote:
> Troy,
>
> I tried this patch on DM355 EVM. It works fine.
>
> Thanks,
> Chaithrika
>
Thanks. Are you seeing the same issues as Sudhakar?
Message repeated below.
_
Troy,
I tried this patch on DM644x EVM and following are my observations:
1. Playback
Rajashekhara, Sudhakar wrote:
> Troy,
>
> I tried this patch on DM644x EVM and following are my observations:
>
> 1. Playback works fine.
> 2. Record has some issues. Recorded stream has Loud volume on
> the right side, and on the left, volume is very low.
> 3. Loopback (arecord -f cd | aplay -f
>
> I explored nand_bbt, jffs2 using the OOB area.
>
> This is what I found -
> 2 bytes at offset 0: BB markers
> 4 bytes at offset 8: BBT magic number/data
> 1 byte at offset 12: BBT version
> 8 bytes at offset 16: JFFS2 clear markers
>
> So, it is better to start with offset 24 (there are few
Narnakaje, Snehaprabha wrote:
>
>> -Original Message-
>> From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
>> Sent: Wednesday, May 20, 2009 3:07 PM
>> To: Narnakaje, Snehaprabha
>> Cc: linux-...@lists.infradead.org; davinci-linux-open-
&
Narnakaje, Snehaprabha wrote:
> Troy,
>
>> -Original Message-----
>> From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
>> Sent: Monday, May 18, 2009 8:17 PM
>> To: Narnakaje, Snehaprabha
>> Cc: dw...@infradead.org; davinci-linux-open-s
Even though my server cfg file has
DMAN3.paRamBaseIndex = 78;
The mpeg4 decoder from TI will use parameter entry 76 if I play a video from an
SD Card.
The same codec will correctly start with 78 if playing a video over NFS.
How this can make a difference, I don't know. Btw, I'm using the git
Use the sram(iram) to avoid underrun on audio.
I will clean this up after someone says it
works for them.
Signed-off-by: Troy Kisky
---
include/sound/soc-dai.h |2 +
sound/soc/davinci/davinci-i2s.c | 336 -
sound/soc/davinci/davinci-pcm.c | 516
This patch only replaces the layout pointer with
the actual structure. It is needed to allow the
oob_free entries to be calculated.
Signed-off-by: Troy Kisky
---
drivers/mtd/nand/atmel_nand.c| 19 +---
drivers/mtd/nand/bf5xx_nand.c|5 +-
drivers/mtd/nand/cafe_nand.c | 10
atmel should no longer need to override default
Signed-off-by: Troy Kisky
---
drivers/mtd/nand/atmel_nand.c | 34 --
1 files changed, 0 insertions(+), 34 deletions(-)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 52aff99
sages. i.e.
mxc_nand which specifies ecc.bytes = 3, but
eccbytes = 5 (not a multiple of 3).
I may have missed other boards being affected
so it needs thorough testing.
Signed-off-by: Troy Kisky
---
drivers/mtd/nand/nand_base.c | 206 ++
1 files changed, 130
Troy Kisky wrote:
> nsnehapra...@ti.com wrote:
>> From: Sneha Narnakaje
>>
>> This patch adds 4-bit ECC support for large page NAND chips using the new ECC
>> mode NAND_ECC_HW_OOB_FIRST. The platform data from board-dm355-evm has been
>> adjusted to use this
nsnehapra...@ti.com wrote:
> From: Sneha Narnakaje
>
> This patch adds 4-bit ECC support for large page NAND chips using the new ECC
> mode NAND_ECC_HW_OOB_FIRST. The platform data from board-dm355-evm has been
> adjusted to use this mode.
>
> The patches have been verified on DM355 device with
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