On 2002.04.24 23:53 José Fonseca wrote:
> Since my last reply that Yahoo hasn't delivering emails to me and I'm
> not sure if you'll receive this one or not either. To make things even
> worse I'll be away for the next couple days and I don't expect to be
> able to check my mail.
It's working
Since my last reply that Yahoo hasn't delivering emails to me and I'm not
sure if you'll receive this one or not either. To make things even worse
I'll be away for the next couple days and I don't expect to be able to
check my mail.
I just read some of the replies in the list archive and it se
On Wed, Apr 24, 2002 at 03:24:17PM -0400, Leif Delgass wrote:
> I was looking at the code in glint_dri.c to add the page table thinking
> that we could set the DRM_RESTRICTED flag for the descriptor table as is
> done there. However, in looking at drmAddBufs and the ioctl, the last arg
> is the a
On Wednesday 24 April 2002 11:31 am, Leif Delgass wrote:
> I know you need to flag the final descriptor at the end of the pass by
> setting END_OF_LIST_STATUS in BM_COMMAND (third dword of the descriptor).
> In Utah-glx, there's also a series of register writes added to end of the
> buffer to "go
On Wednesday 24 April 2002 11:32 am, you wrote:
> Regardless of security concerns, the idea was to use this primary buffer
> for storing the state update emitted from the DRM. The first entry of
> the descriptor table would point to this primary buffer, and the
> followings to the client submitte
On 24 Apr 2002, Jose Fonseca wrote:
> On Wed, 2002-04-24 at 14:13, Jens Owen wrote:
> > ...
> >
> > Jose,
> >
> > I don't have a complete answer for you, but here is *some* background
> > information that might help.
> >
> > The drmAddBufs style was created with the origianal DRI infrastructur
On 2002.04.24 19:09 Jens Owen wrote:
> ...
>
> Jose,
>
> I recall hearing that having an AGP vs. PCI bus connection is
> independent of whether you can use the GART functionality or not.
> Something along the lines of it's possible to plug a Rage128 into a PCI
> slot and still have the page mapp
It would seem that Ian Romanick ([EMAIL PROTECTED]) said:
> Doing a quick check on eBay found PCI G200 (and older!) cards, but no G400+
> cards. It also turned up a couple Savage4 PCI cards, a Trident Blade3D
> card, and an SiS 6326 card. The other question, that may be more difficult
> to answe
Jose Fonseca wrote:
>
> On Wed, 2002-04-24 at 14:13, Jens Owen wrote:
> > I believe the r128 driver's PCI support still utilizes GART
> > functionality to allow non-contiguous memory to be utilized. Your
> > driver may be the first to need true PCI support, and *possibly* the
> > last to need i
On Wed, Apr 24, 2002 at 06:42:21PM +0100, Jose Fonseca wrote:
> On Wed, 2002-04-24 at 14:13, Jens Owen wrote:
> > I believe the r128 driver's PCI support still utilizes GART
> > functionality to allow non-contiguous memory to be utilized. Your
> > driver may be the first to need true PCI support,
On Wed, 2002-04-24 at 14:13, Jens Owen wrote:
> ...
>
> Jose,
>
> I don't have a complete answer for you, but here is *some* background
> information that might help.
>
> The drmAddBufs style was created with the origianal DRI infrastructure
> that supported a partial implementation of the Gamm
On Wed, 2002-04-24 at 16:49, Frank C.Earl wrote:
> On Wednesday 24 April 2002 06:15 am, you wrote:
>
> Hi, there!
>
> > For enabling DMA on Mach64 I'll need to allocate two extra DMA buffers: a
> > primary DMA buffer and a decription table buffer.
>
> All you need for now is a descriptor table.
On Wed, 24 Apr 2002, Frank C. Earl wrote:
> On Wednesday 24 April 2002 06:15 am, you wrote:
>
> Hi, there!
>
> > For enabling DMA on Mach64 I'll need to allocate two extra DMA buffers: a
> > primary DMA buffer and a decription table buffer.
>
> All you need for now is a descriptor table. The
On Wednesday 24 April 2002 06:15 am, you wrote:
Hi, there!
> For enabling DMA on Mach64 I'll need to allocate two extra DMA buffers: a
> primary DMA buffer and a decription table buffer.
All you need for now is a descriptor table. The buffers that you have
already allocated via the DRM's fram
"José Fonseca" wrote:
>
> For enabling DMA on Mach64 I'll need to allocate two extra DMA buffers: a
> primary DMA buffer and a decription table buffer.
>
> The way most cards (R128,MGA) do this is to map (on the DDX) pieces of AGP
> memory for these extra buffers, but this isn't possible with PC
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