>-Original Message-
>From: Rich Nute [mailto:ri...@sdd.hp.com]
>Sent: Friday, January 31, 2003 4:17 PM
>To: j...@jmwa.demon.co.uk
>Cc: emc-p...@majordomo.ieee.org
>Subject: Re: single fault conditions
>
>
>
>
>
>
>Hi John:
>
>
>> >F
Hi John:
> >For example, at a previous employer, I observed several instances of FETs
> >(in a 3kVA instrument) exploding and sending molten metal (mostly from the
> >leads and the lead's solder pads) through chassis vents, that subsequently
> >caused the surrounding cheesecloth to ig
I read in !emc-pstc that boconn...@t-yuden.com wrote (in ) about 'single fault
conditions' on Fri, 31 Jan 2003:
>For example, at a previous employer, I observed several instances of FETs
>(in a 3kVA instrument) exploding and sending molten metal (mostly from the
>leads and the
I read in !emc-pstc that Rich Nute wrote (in
<200301311743.jaa24...@epgc264.sdd.hp.com>) about 'single fault
conditions' on Fri, 31 Jan 2003:
>So, the failure of switching FETs could give rise
>to both fire and shock, but should not do so if the
>equipment constru
Hi John:
> >The Bad: some FETs fail very violently, and can actually be a fire hazard
> >and/or shock hazard in open-frame switchers;
>
> Really? There doesn't seem to be enough combustible material to cause a
> fire hazard, and an open-frame switcher always has to be in some sort
>The Bad: some FETs fail very violently, and can actually be a fire hazard
>and/or shock hazard in open-frame switchers;
>>Really? There doesn't seem to be enough combustible material to cause a
>>fire hazard, and an open-frame switcher always has to be in some sort of
>>outer enclosure, does
I read in !emc-pstc that boconn...@t-yuden.com wrote (in ) about 'single fault
conditions' on Wed, 29 Jan 2003:
>Yes sir, this is another thing I've wondered about; i.e., simulating the
big
>bus cap (short) SFC by applying a mechanical short accross the terminals.
I read in !emc-pstc that boconn...@t-yuden.com wrote (in ) about 'single fault
conditions' on Wed, 29 Jan 2003:
>The environment being considered is a switching power supply. The technique
>that safety agencies use to simulate a SFC on a power FET does not seem,
>IMHO, to
I read in !emc-pstc that boconn...@t-yuden.com wrote (in ) about 'single fault
conditions' on Thu, 30 Jan 2003:
>I am also concerned that there are products on the market, tested in good
>faith, that would be unsafe for a more probable SFC, that would not be
>
> While s-c and o-c at device terminals do not simulate true
> fault conditions within components, testing must be
> practical. If we are to begin considering simulation of
> true fault conditions within components, there may be no end
> to the number of tests.
We can easily put bou
Original Message-
From: Peter L. Tarver [ mailto:peter.tar...@sanmina-sci.com]
Sent: Thursday, January 30, 2003 9:13 AM
To: emc-p...@majordomo.ieee.org
Subject: RE: single fault conditions
While s-c and o-c at device terminals do not simulate true
fault conditions within componen
While s-c and o-c at device terminals do not simulate true
fault conditions within components, testing must be
practical. If we are to begin considering simulation of
true fault conditions within components, there may be no end
to the number of tests.
Simulation of internal component faults woul
Hi Brian:
> The environment being considered is a switching power supply. The technique
> that safety agencies use to simulate a SFC on a power FET does not seem,
> IMHO, to simulate the actual failure mode of the device. To wit: when the
> mosfet fails short, it blows itself open; so
fault conditions
Good People of PSTC
The environment being considered is a switching power supply. The technique
that safety agencies use to simulate a SFC on a power FET does not seem, IMHO,
to simulate the actual failure mode of the device. To wit: when the mosfet
fails short, it blows itself
some of the testing that I perform that the
agencies think is really great stuff...
R/S,
Brian
From: Lou Aiken [mailto:ai...@gulftel.com]
Sent: Wednesday, January 29, 2003 2:19 PM
To: boconn...@t-yuden.com; emc-p...@majordomo.ieee.org
Subject: Re: single fault conditions
Wow, I would have to
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Cell ++ 1 251 979 4648
- Original Message -
From: boconn...@t-yuden.com
To: emc-p...@majordomo.ieee.org
Sent: Wednesday, January 29, 2003 3:40 PM
Subject: single fault conditions
Good People of PSTC
The environment being
Good People of PSTC
The environment being considered is a switching power supply. The technique
that safety agencies use to simulate a SFC on a power FET does not seem, IMHO,
to simulate the actual failure mode of the device. To wit: when the mosfet
fails short, it blows itself open; so the amoun
Hi Doug:
> Does this section mean to say that the voltage on "internal SELV" may in
> fact go higher than the 71V Peak and 120 V DC for a short time? Naturally,
The standard says:
"In a single circuit... other parts of the same circuit
do not comply with all of the requirement
Hello group,
My company manufactures high energy power conversion equipment and we often
deal with insulation between mains voltages and SELV as well as high voltage
outputs and SELV. During part of our type testing we simulate single fault
conditions such as a breakdown of basic or
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