On Jul 8, 2011, at 12:26 PM, Mike Jarabek wrote:
> No autorouter is needed... Just place the generated symbols on a grid, so
> they don't touch, and add wire stubs to each pin. Each wire should have a
> netname attribute attached.
No need even for that. No graphics at all are required when yo
On Jul 8, 2011, at 2:47 PM,
wrote:
> I have been looking at the gschem file format, seems very
> straight forward and I created the symbols for the standard cells in the
> verilog netlists. A rats nest is fine, will never edit the schematic of
> any file created from the verilog file.
I set a
iling list
Subject: Re: gEDA-user: verilog -> gschem
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On Jul 7, 2011, at 4:31 PM,
wrote:
> I've looked at the mailing list archives and seen people ask but
> haven't seen if anyone has code to take a verilog netlist and create a
> gschem file from it. I don't care about what the schematic looks like,
> can be ugly. I just need to get it i
> Original Message
> Subject: Re: gEDA-user: verilog -> gschem
> From: Steven Michalske
> Date: Fri, July 08, 2011 1:46 pm
> To: gEDA user mailing list
> Will the gentlest backend for verilog accept symbols with the source
> attribute set, like hierarc
> Original Message
> Subject: Re: gEDA-user: verilog -> gschem
> From: Ouabache Designworks
> Date: Fri, July 08, 2011 9:43 am
> To: geda-user@moria.seul.org
>
>
> The only difference between that and and PCB layout program is that you
> don
Will the gentlest backend for verilog accept symbols with the source attribute
set, like hierarchy symbols, but making them point to Verilog source not a
sch source?
Steve
On Jul 8, 2011, at 1:29 PM, wrote:
>> Original Message
>> Subject: Re: gEDA-user: veril
> Original Message
> Subject: Re: gEDA-user: verilog -> gschem
> From: John Griessen
> Date: Fri, July 08, 2011 9:27 am
> To: gEDA user mailing list
>
> On 07/07/11 17:31, fr...@frankthomson.net wrote:
>> I just need to get it into gschem format t
Message: 1
Date: Thu, 07 Jul 2011 15:31:44 -0700
From: <[1]fr...@frankthomson.net>
Subject: gEDA-user: verilog -> gschem
To: [2]geda-user@moria.seul.org
Message-ID:
<[3]20110707153144.97bc9b90117a8175dad249389209a753.5acdf95b97.wbe@e
mail04.secu
On 07/07/11 17:31, fr...@frankthomson.net wrote:
I just need to get it into gschem format to run through
gnetlist to a different netlist format.
There is a gnetlist backend for verilog-ams.
You don't need to make schematics, just learn
enough scheme/guile to fix up the exiting
gnetlist ba
I've looked at the mailing list archives and seen people ask but
haven't seen if anyone has code to take a verilog netlist and create a
gschem file from it. I don't care about what the schematic looks like,
can be ugly. I just need to get it into gschem format to run through
gnetlist
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