On Mon, 27 Aug 2018 16:01:41 +0900
Masahiro Yamada wrote:
> Commit 49aa76b16676 ("mtd: rawnand: do not execute nand_scan_ident()
> if maxchips is zero") gave a new meaning for calling nand_scan_ident()
> with maxchips=0.
>
> It is a special usage for some drivers such as docg4, but actually
> th
On Mon, 27 Aug 2018 20:52:34 -0500
Rob Herring wrote:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Boris Brezillon
> Cc: Miquel Raynal
> Cc: Richard Weinberger
> Cc: David W
On Tue, 28 Aug 2018 21:21:16 +0800
Liu Xiang wrote:
> If the size of spi-nor flash is larger than 16MB, the read_opcode
> is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will
> return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can
> cause read operation fail.
>
> ---
> v2:
>
On Tue, 28 Aug 2018 21:21:48 +0800
Liang Yang wrote:
> Hi Boris,
>
> On 8/24/2018 8:48 PM, Boris Brezillon wrote:
> > On Wed, 22 Aug 2018 22:08:42 +0800
> > Liang Yang wrote:
> >
> >>> You have to wait tWB, that's for sure.
> >>>
On Tue, 28 Aug 2018 22:16:08 +0800 (CST)
"Liu Xiang" wrote:
> Thanks for your suggestion. Should I send another patch?
Yes please.
On Tue, 21 Aug 2018 16:31:46 +0200
Ricardo Ribalda Delgado wrote:
> We should only iomap the area of the chip that is memory mapped.
> Otherwise we could be mapping devices beyond the memory space or that
> belong to other devices.
>
Can you add
Fixes: ebd71e3a4861 ("mtd: maps: gpio-addr-flash
On Tue, 28 Aug 2018 22:32:57 +0800
Liu Xiang wrote:
> If the size of spi-nor flash is larger than 16MB, the read_opcode
> is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will
> return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can
> cause read operation fail.
>
> Fixes: e46ecd
On Wed, 29 Aug 2018 18:29:05 +0800
Liang Yang wrote:
> On 8/29/2018 6:08 PM, Liang Yang wrote:
> >
> > On 8/28/2018 9:26 PM, Boris Brezillon wrote:
> >> On Tue, 28 Aug 2018 21:21:48 +0800
> >> Liang Yang wrote:
> >>
> >>> Hi Boris,
&
ng it again. And when you do so and nothing changed in the patch
please use the [PATCH RESEND vX] prefix and explain why you resend it.
Thanks,
Boris
>
> Fixes: c36ff266dc82 ("spi: Extend the core to ease integration of SPI memory
> controllers")
> Cc:
> Signed-off-by
On Thu, 30 Aug 2018 09:13:03 +
Chuanhua Han wrote:
> > -Original Message-
> > From: Boris Brezillon
> > Sent: 2018年8月30日 16:47
> > To: Chuanhua Han
> > Cc: broo...@kernel.org; linux-...@vger.kernel.org;
> > linux-kernel@vger.kernel.org; st
Hi Randy,
On Fri, 10 Aug 2018 08:37:01 -0700
Randy Dunlap wrote:
> On 08/09/2018 08:11 PM, a...@linux-foundation.org wrote:
> > The mm-of-the-moment snapshot 2018-08-09-20-10 has been uploaded to
> >
> >http://www.ozlabs.org/~akpm/mmotm/
> >
> > mmotm-readme.txt says
> >
> > README for mm
On Tue, 21 Aug 2018 05:47:18 +
Naga Sureshkumar Relli wrote:
> > > +Required properties:
> > > +- compatible:Should be "xlnx,zynqmp-nand" or
> > > "arasan,nfc-v3p10"
> >
> > In your example it's not an "or" since both are defined.
> In our previous discussion (https://lore.k
On Tue, 21 Aug 2018 10:44:54 +
Naga Sureshkumar Relli wrote:
> Hi Miquel,
>
> > -Original Message-
> > From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> > Sent: Tuesday, August 21, 2018 3:23 PM
> > To: Naga Sureshkumar Relli
> > Cc: Boris
On Tue, 21 Aug 2018 09:22:07 +
Naga Sureshkumar Relli wrote:
> Hi Boris,
>
> > -Original Message-
> > From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> > Sent: Tuesday, August 21, 2018 11:30 AM
> > To: Naga Sureshkumar Relli
> >
ruct_size() helper:
>
> instance = devm_kzalloc(dev, struct_size(instance, entry, count), GFP_KERNEL);
Oh, I didn't know about that one. That's nice!
>
> Signed-off-by: Gustavo A. R. Silva
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/jz4780_nand.c | 2 +
On Wed, 22 Aug 2018 22:08:42 +0800
Liang Yang wrote:
> > You have to wait tWB, that's for sure.
> >
> we have a maximum 32 commands fifo. when command is written into
> NFC_REG_CMD, it doesn't mean that command is executing right now, maybe
> it is buffering on the queue.Assume one ERASE ope
Hi Masahiro,
On Tue, 21 Aug 2018 17:23:19 +0900
Masahiro Yamada wrote:
> Commit 49aa76b16676 ("mtd: rawnand: do not execute nand_scan_ident()
> if maxchips is zero") gave a new meaning for calling nand_scan_ident()
> with maxchips=0.
>
> It is a special usage for some drivers such as docg4, but
d.
>
> This optimisation will become particularly important as soon as
> planned conversion of the driver to GPIO API for data I/O will be
> implemented.
>
> Signed-off-by: Janusz Krzysztofik
Reviewed-by: Boris Brezillon
> ---
> d
On Sat, 25 Aug 2018 00:04:43 +0900
Masahiro Yamada wrote:
> Hi Boris,
>
> 2018-08-24 21:55 GMT+09:00 Boris Brezillon :
> > Hi Masahiro,
> >
> > On Tue, 21 Aug 2018 17:23:19 +0900
> > Masahiro Yamada wrote:
> >
> >> Commit 49aa76b16676 ("m
On Thu, 26 Jul 2018 14:06:41 +0800
xiaolei li wrote:
> On Sat, 2018-07-21 at 19:10 +0200, Boris Brezillon wrote:
> > On Fri, 20 Jul 2018 17:15:06 +0200
> > Miquel Raynal wrote:
> >
> > > Two helpers have been added to the core to make ECC-related
> > &
On Sun, 22 Jul 2018 08:44:32 +0200
Boris Brezillon wrote:
> On Fri, 20 Jul 2018 17:15:19 +0200
> Miquel Raynal wrote:
>
> > Two helpers have been added to the core to make ECC-related
> > configuration between the detection phase and the final NAND scan. Use
> >
;} [-Wformat=]
> ../drivers/mtd/maps/solutionengine.c:62:72: note: format string is defined
> here
> printk(KERN_NOTICE "Solution Engine: Flash at 0x%08lx, EPROM at 0x%08lx\n",
> ^
> %08x
On Wed, 25 Jul 2018 06:31:37 +
Nicholas Mc Guire wrote:
> On Tue, Jul 24, 2018 at 10:46:26PM +0200, Boris Brezillon wrote:
> > On Sat, 21 Jul 2018 18:08:13 +0200
> > Nicholas Mc Guire wrote:
> >
> > > wait_for_completion_timeout returns an unsigned long not
On Fri, 27 Jul 2018 05:21:49 +
Nicholas Mc Guire wrote:
> On Thu, Jul 26, 2018 at 10:09:28PM +0200, Boris Brezillon wrote:
> > On Wed, 25 Jul 2018 06:31:37 +
> > Nicholas Mc Guire wrote:
> >
> > > On Tue, Jul 24, 2018 at 10:46:26PM +0200, Boris Brezill
On Sun, 29 Jul 2018 22:36:49 +0200
Linus Walleij wrote:
> On Thu, Jul 19, 2018 at 8:44 AM Boris Brezillon
> wrote:
>
> > I guess you'd prefer to have the pin values in a bitmap instead of an
> > array of integers. That's probably something you can discuss with
&g
On Sat, 7 Jul 2018 05:37:22 +0200
Jann Horn wrote:
> The first checks in mtdchar_read() and mtdchar_write() attempt to limit
> `count` such that `*ppos + count <= mtd->size`. However, they ignore the
> possibility of `*ppos > mtd->size`, allowing the calculation of `count` to
> wrap around. `mtd
Hi Yixun,
On Wed, 18 Jul 2018 17:38:56 +0800
Yixun Lan wrote:
> >> +
> >> +#define NFC_REG_CMD 0x00
> >> +#define NFC_REG_CFG 0x04
> >> +#define NFC_REG_DADR 0x08
> >> +#define NFC_REG_IADR 0x0c
> >> +#define NFC_REG_BUF 0x10
>
On Wed, 18 Jul 2018 23:15:26 +0200
Miquel Raynal wrote:
> Hi Abhishek,
>
> Abhishek Sahu wrote on Fri, 6 Jul 2018
> 13:21:58 +0530:
>
> > Remove the NAND_SKIP_BBTSCAN to use RAM based BBT.
>
> Unless I am understanding it the wrong way, NAND_SKIP_BBTSCAN will skip
> the scan of the on-chip
On Wed, 18 Jul 2018 23:23:50 +0200
Miquel Raynal wrote:
> Boris,
>
> Can you please check the change in qcom_nandc_write_oob() is
> valid? I think it is but as this is a bit of a hack I prefer double checking.
Indeed, it's hack-ish.
>
> Thanks,
> Miquèl
>
>
> Abhishek Sahu wrote on Fri, 6
On Fri, 6 Jul 2018 13:21:59 +0530
Abhishek Sahu wrote:
> Driver does not send the commands to NAND device for page
> read/write operations in ->cmdfunc(). It just does some
> minor variable initialization and rest of the things
> are being done in actual ->read/write_oob[_raw].
>
> The generic
Hi Janusz,
On Thu, 19 Jul 2018 01:57:02 +0200
Janusz Krzysztofik wrote:
> Implement the idea suggested by Artem Bityutskiy and Tony Lindgren
> described in commit b027274d2e3a ("mtd: ams-delta: fix
> request_mem_region() failure").
Thanks for doing that. I'll review the patches, but I already h
On Thu, 19 Jul 2018 01:57:03 +0200
Janusz Krzysztofik wrote:
> Introduce a driver private structure and allocate it on device probe.
> Use it for storing nand_chip structure, GPIO descriptors prevoiusly
> stored in static variables as well as io_base pointer previously passed
> as nand controller
On Thu, 19 Jul 2018 01:57:04 +0200
Janusz Krzysztofik wrote:
> Initialize NWP GPIO pin low to protect the device from hazard during
> probe. Release write protection as soon as the device is under
> control.
>
> Signed-off-by: Janusz Krzysztofik
> ---
> drivers/mtd/nand/raw/ams-delta.c | 10 +
On Thu, 19 Jul 2018 01:57:05 +0200
Janusz Krzysztofik wrote:
> In its current shape, the driver sets data port direction before each
> byte read/write operation, even during multi-byte transfers. Optimize
> that by setting the port direction only on first byte of each transfer.
Sounds like prem
On Thu, 19 Jul 2018 01:57:06 +0200
Janusz Krzysztofik wrote:
> Further optimize processing speed of read/write callback functions by
> resolving private structure pointer only once per callback and passing
> it to all subfunctions instead of mtd_info.
Not sure this has a real impact on perfs, bu
On Thu, 19 Jul 2018 01:57:07 +0200
Janusz Krzysztofik wrote:
> Data port used by the driver is actually an OMAP MPUIO device, already
> under control of gpio-omap driver. For that reason we used to not
> request the memory region of the port as that would fail because the
> region is already bus
On Thu, 19 Jul 2018 01:57:09 +0200
Janusz Krzysztofik wrote:
> The plan is to replace data port readw()/writew() operations with GPIO
> callbacks provided by gpio-omap driver. For acceptable performance the
> GPIO chip must support get/set_multiple() GPIO callbacks.
>
> In order to avoid data c
On Thu, 19 Jul 2018 01:57:10 +0200
Janusz Krzysztofik wrote:
> Don't readw()/writew() data directly from/to GPIO port which is under
> control of gpio-omap driver, use GPIO chip callbacks instead.
>
> Thanks to utilization of get/set_multiple() callbacks, performance
> degrade is minor for typic
On Thu, 19 Jul 2018 16:53:33 +0900
KOBAYASHI Yoshitake wrote:
> From: yoshitake.kobaya...@toshiba.co.jp
>
> This patch is a patch to support TOSHIBA MEMORY CORPORATION BENAND
> memory devices. Check the status of the built-in ECC with the Read
> Status command without using the vendor specific
On Thu, 19 Jul 2018 16:53:47 +0900
KOBAYASHI Yoshitake wrote:
> This patch is a patch to support TOSHIBA MEMORY CORPORATION BENAND
> memory devices. This use vendor specific command
> (TOSHIBA_NAND_CMD_ECC_STATUS) to know the exact bitflips. However, I
> could not test this patch because I do n
Hi Yixun,
On Thu, 19 Jul 2018 16:13:47 +0800
Yixun Lan wrote:
> >>> You're doing DMA on those buffers, and devm_kzalloc() is not
> >>> DMA-friendly (returned buffers are not aligned on a cache line). Also,
> >>> you don't have to allocate your own buffers because the core already
> >>> allocate
On Thu, 19 Jul 2018 17:46:11 +0800
Yixun Lan wrote:
> From: Liang Yang
>
> Add Amlogic NAND controller dt-bindings for Meson SoC,
> Current this driver support GXBB/GXL/AXG platform.
>
> Signed-off-by: Liang Yang
> Signed-off-by: Yixun Lan
> ---
> .../bindings/mtd/amlogic,meson-nand.txt
On Fri, 20 Jul 2018 00:59:54 +0200
Miquel Raynal wrote:
> +
> +static struct nand_controller_ops brcmnand_controller_ops = {
static const ...
The same comment applies to all patches of this series.
> + .attach_chip = brcmnand_attach_chip,
> +};
On Fri, 20 Jul 2018 01:00:21 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
On Fri, 20 Jul 2018 01:00:26 +0200
Miquel Raynal wrote:
> Now that it is possible to do dynamic allocations during the
> identification phase, convert the onfi_params structure (which is only
> needed with ONFI compliant chips) into a pointer that will be allocated
> only if needed.
>
> Signed-o
On Fri, 20 Jul 2018 01:00:25 +0200
Miquel Raynal wrote:
> Both nand_scan_ident() and nand_scan_tail() helpers used to be called
> directly from controller drivers that needed to tweak some ECC-related
> parameters before nand_scan_tail(). This separation prevented dynamic
> allocations during the
On Fri, 20 Jul 2018 09:17:45 +0200
Miquel Raynal wrote:
> Hi Boris,
>
> Boris Brezillon wrote on Fri, 20 Jul 2018
> 01:27:32 +0200:
>
> > On Fri, 20 Jul 2018 01:00:21 +0200
> > Miquel Raynal wrote:
> >
> > > Two helpers have been added to the co
On Fri, 20 Jul 2018 17:46:38 +0530
Abhishek Sahu wrote:
> Hi Boris,
>
> On 2018-07-19 03:13, Boris Brezillon wrote:
> > On Wed, 18 Jul 2018 23:23:50 +0200
> > Miquel Raynal wrote:
> >
> >> Boris,
> >>
> >> Can you please check the chan
On Fri, 20 Jul 2018 19:55:42 +0200
Janusz Krzysztofik wrote:
> Hi Boris,
>
> On Thursday, July 19, 2018 8:15:08 AM CEST Boris Brezillon wrote:
> > Hi Janusz,
> >
> > On Thu, 19 Jul 2018 01:57:02 +0200
> > Janusz Krzysztofik wrote:
> >
> > >
On Fri, 20 Jul 2018 20:12:05 +0200
Janusz Krzysztofik wrote:
> On Thursday, July 19, 2018 8:23:18 AM CEST Boris Brezillon wrote:
> > On Thu, 19 Jul 2018 01:57:05 +0200
> > Janusz Krzysztofik wrote:
> >
> > > In its current shape, the driver sets data port di
On Fri, 20 Jul 2018 20:14:55 +0200
Janusz Krzysztofik wrote:
> On Thursday, July 19, 2018 8:25:38 AM CEST Boris Brezillon wrote:
> > On Thu, 19 Jul 2018 01:57:06 +0200
> > Janusz Krzysztofik wrote:
> >
> > > Further optimize processing speed of re
Janusz,
On Fri, 20 Jul 2018 20:38:15 +0200
Janusz Krzysztofik wrote:
> On Thursday, July 19, 2018 8:47:49 AM CEST Boris Brezillon wrote:
> > On Thu, 19 Jul 2018 01:57:10 +0200
> > Janusz Krzysztofik wrote:
> >
> > > Don't readw()/writew() data direct
On Fri, 20 Jul 2018 17:14:53 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
On Fri, 20 Jul 2018 17:14:54 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
can use to get
a platform_device object from a device one, so this change was not
really needed. Actually, you should not even need a ->dev field here
because it can be retrieved from mtd->dev.parent. Anyway, if you
patched all places using davinci->dev to now use &davinci->pdev->dev
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/denali.c | 138
> +++---
> 1 file changed, 77 insertions(+), 61 deletions(-)
>
> diff --git a/drivers/mtd/nand
_mtd *priv = nand_get_controller_data(chip);
> struct fsl_lbc_ctrl *ctrl = priv->ctrl;
> struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
> @@ -706,6 +706,10 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
Looks like fsl_elbc_chip_init_tail() was retur
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/fsl_ifc_nand.c | 19 ---
> 1 file changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c
> b
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/fsmc_nand.c | 148
> +--
> 1 file changed, 78 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/mtd/nand/r
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 56
> ++
> 1 file changed, 33 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/mtd/nand/ra
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/hisi504_nand.c | 78
> +
> 1 file changed, 44 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
> Acked-by: Harvey Hunt
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/jz4780_nand.c | 34 --
> 1 file changed, 16 insertions(+), 18 deletions(-)
>
> diff --git a/dri
On Fri, 20 Jul 2018 17:15:03 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/lpc32xx_slc.c | 77
> +-
> 1 file changed, 42 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw
th that fixed, you can add
Reviewed-by: Boris Brezillon
> + ret = nand_scan(mtd, marvell_nand->nsels);
> if (ret) {
> - dev_err(dev, "nand_scan_tail failed: %d\n", ret);
> + dev_err(dev, "could not scan the nand chip\n");
> return ret;
> }
>
2 tmp;
> int ret;
> int i;
> @@ -1287,6 +1328,7 @@ static int mtk_nfc_nand_chip_init(struct device *dev,
> struct mtk_nfc *nfc,
>
> nand = &chip->nand;
> nand->controller = &nfc->controller;
> + nand->controller->ops =
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/mxc_nand.c | 136
> +---
> 1 file changed, 71 insertions(+), 65 deletions(-)
>
> diff --git a/drivers/mtd/nand/r
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/nandsim.c | 82
> +++---
> 1 file changed, 45 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/mtd/nand/
On Fri, 20 Jul 2018 17:15:09 +0200
Miquel Raynal wrote:
> static int omap_nand_probe(struct platform_device *pdev)
> {
> struct omap_nand_info *info;
> struct mtd_info *mtd;
> struct nand_chip*nand_chip;
> int
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/s3c2410.c | 30 +-
> 1 file changed, 13 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/s3c2410.c b/drive
On Fri, 20 Jul 2018 17:15:11 +0200
Miquel Raynal wrote:
> @@ -1007,6 +1007,16 @@ static int flctl_chip_init_tail(struct mtd_info *mtd)
> struct sh_flctl *flctl = mtd_to_flctl(mtd);
> struct nand_chip *chip = &flctl->chip;
>
> + if (chip->options & NAND_BUSWIDTH_16) {
> +
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/sh_flctl.c | 19 ---
> 1 file changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/sh_flctl.c b/driver
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/sunxi_nand.c | 43
> +--
> 1 file changed, 19 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/mtd/nand/ra
582,14 @@ static int chip_init(struct device *dev, struct
> device_node *np)
> NAND_NO_SUBPAGE_WRITE |
> NAND_WAIT_TCCS;
> chip->controller = &nfc->hw;
> + chip->controller->ops = &tango_control
On Fri, 20 Jul 2018 17:15:15 +0200
Miquel Raynal wrote:
> As already done in the core, calling a struct nand_controller
> 'hw_control' is misleading. Use the same name as in nand_base.c:
> 'controller'.
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Br
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/txx9ndfmc.c | 29 +++--
> 1 file changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/txx9ndfmc.c
>
On Fri, 20 Jul 2018 17:15:16 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/vf610_nfc.c | 127
> ---
> 1 file changed, 66 insertions(+), 61 deletions(-)
>
> diff --git a/drivers/mtd/nand/r
+Arnd, Rob and the DT ML.
On Sat, 21 Jul 2018 14:53:47 -0700
Randy Dunlap wrote:
> On 07/21/2018 01:00 PM, Anders Roxell wrote:
> > JZ4780_NEMC doesn't depend on OF, and if OF isn't enabled we get this
> > error:
> > drivers/memory/jz4780-nemc.c: In function ‘jz4780_nemc_num_banks’:
> > drivers/
On Fri, 20 Jul 2018 17:15:18 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
d_scan() for passing a flash IDs table) instead of
> both nand_scan_ident() and nand_scan_tail().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/sm_common.c | 39 +--
> 1 file changed, 25 insertions
On Fri, 20 Jul 2018 17:15:20 +0200
Miquel Raynal wrote:
> Some driver (eg. docg4) will need to handle themselves the
> identification phase. As part of the migration to use nand_scan()
> everywhere (which will unconditionnaly call nand_scan_ident()), we add
> a condition at the start of nand_scan
On Fri, 20 Jul 2018 17:15:21 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
com_nandc_ops;
This assignment should be moved here [1].
Once fixed you can add
Reviewed-by: Boris Brezillon
[1]https://elixir.bootlin.com/linux/v4.18-rc5/source/drivers/mtd/nand/raw/qcom_nandc.c#L2574
On Fri, 20 Jul 2018 17:15:23 +0200
Miquel Raynal wrote:
> Two helpers have been added to the core to make ECC-related
> configuration between the detection phase and the final NAND scan. Use
> these hooks and convert the driver to just use nand_scan() instead of
> both nand_scan_ident() and nand_
On Fri, 20 Jul 2018 17:15:24 +0200
Miquel Raynal wrote:
> + chip = &nand->chip;
> + chip->controller = &ctrl->controller;
> + chip->controller->ops = &tegra_nand_controller_ops;
Should be moved next to the controller initialization.
On Fri, 20 Jul 2018 17:15:25 +0200
Miquel Raynal wrote:
> Both nand_scan_ident() and nand_scan_tail() helpers used to be called
> directly from controller drivers that needed to tweak some ECC-related
> parameters before nand_scan_tail(). This separation prevented dynamic
> allocations during the
ed in nand_detect().
>
> Signed-off-by: Miquel Raynal
Reviewed-by: Boris Brezillon
> ---
> drivers/mtd/nand/raw/nand_base.c | 52
> +++-
> include/linux/mtd/rawnand.h | 2 +-
> 2 files changed, 42 insertions(+), 12 deletions(-)
and/raw/nand_micron.c
> @@ -88,9 +88,9 @@ static int micron_nand_setup_read_retry(struct mtd_info
> *mtd, int retry_mode)
> static int micron_nand_onfi_init(struct nand_chip *chip)
> {
> struct nand_parameters *p = &chip->parameters;
> - struct nand_onfi_vend
On Mon, 23 Jul 2018 11:34:43 +0200
Arnd Bergmann wrote:
> On Sun, Jul 22, 2018 at 8:29 AM, Boris Brezillon
> wrote:
> > +Arnd, Rob and the DT ML.
> >
> > On Sat, 21 Jul 2018 14:53:47 -0700
> > Randy Dunlap wrote:
> >
> >> On 07/21/2018 01:00
Hi Jheng-Jhong,
On Wed, 1 Aug 2018 11:24:19 +0800
Jheng-Jhong Wu wrote:
> For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
> are necessary to address the correct page. The driver sets the address for
> more than 16 bits, but it uses 16-bit arguments and variables (thes
Hi Mark,
On Wed, 1 Aug 2018 18:27:47 +0100
Mark Brown wrote:
> On Wed, Jun 27, 2018 at 03:16:08PM +0200, Piotr Bugalski wrote:
> > Kernel contains QSPI driver strongly tied to MTD and nor-flash memory.
> > New spi-mem interface allows usage also other memory types, especially
> > much larger NAN
Hi Yixun,
On Thu, 19 Jul 2018 17:46:12 +0800
Yixun Lan wrote:
I haven't finished reviewing the driver yet (I'll try to do that later
this week), but I already pointed a few things to fix/improve.
> +
> +static int meson_nfc_exec_op(struct nand_chip *chip,
> + const stru
On Thu, 2 Aug 2018 12:46:36 +0200
Frieder Schrempf wrote:
> Hi Mark,
>
> On 02.08.2018 12:17, Mark Brown wrote:
> > On Wed, Aug 01, 2018 at 09:57:33PM +0200, Boris Brezillon wrote:
> >> Mark Brown wrote:
> >
> >> 2/ Getting this patch [1] merged
On Thu, 2 Aug 2018 14:53:52 +0200
Frieder Schrempf wrote:
We usually try to avoid empty commit message, even if this one is
pretty obvious, I'd suggest adding something here.
"
Fix a typo in the @drvpriv description.
"
?
> Signed-off-by: Frieder Schrempf
Acked-b
new driver without spi_mem_get_name: spi4.0
>
> Suggested-by: Boris Brezillon
> Signed-off-by: Frieder Schrempf
Reviewed-by: Boris Brezillon
> ---
> drivers/spi/spi-mem.c | 28
> include/linux/spi/spi-mem.h | 12
> 2 files ch
D to the SPI layer.
>
> Suggested-by: Boris Brezillon
> Signed-off-by: Frieder Schrempf
Acked-by: Boris Brezillon
> ---
> drivers/mtd/devices/m25p80.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p8
On Mon, 23 Jul 2018 17:40:29 +0200
Arnd Bergmann wrote:
> On Mon, Jul 23, 2018 at 11:41 AM, Boris Brezillon
> wrote:
> > On Mon, 23 Jul 2018 11:34:43 +0200
> > Arnd Bergmann wrote:
> >
> >> On Sun, Jul 22, 2018 at 8:29 AM, Boris Brezillon
> >>
On Mon, 23 Jul 2018 18:04:52 +0200
Arnd Bergmann wrote:
> On Mon, Jul 23, 2018 at 5:40 PM, Arnd Bergmann wrote:
> > On Mon, Jul 23, 2018 at 11:41 AM, Boris Brezillon
> > wrote:
> >> On Mon, 23 Jul 2018 11:34:43 +0200
> >> Arnd Bergmann wrote:
> >&g
Hi Brian,
On Mon, 23 Jul 2018 11:13:50 -0700
Brian Norris wrote:
> Hello,
>
> I noticed this got merged, but I wanted to put my 2 cents in here:
I wish you had replied to this thread when it was posted (more than
6 months ago). Reverting the patch now implies making some people
unhappy because
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