0x00e8>;
> + label = "unused";
> + };
> + partition@idprom {
> + reg = <0x00fc 0x0004>;
> + label = "idprom";
> + };
> + };
> + };
> +};
> +
> +_controller {
> + status = "okay";
> +
> + nand@0 {
> + reg = <0>;
> + label = "pxa3xx_nand-0";
> + nand-rb = <0>;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> +
> + marvell,nand-enable-arbiter;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + partition@user {
> + reg = <0x 0x0f00>;
> + label = "user";
> + };
> + partition@errlog {
> + /* Maximum mtdoops size is 8MB, so set to that.
> */
> + reg = <0x0f00 0x0080>;
> + label = "errlog";
> + };
> + partition@nand-bbt {
> + reg = <0x0f80 0x0080>;
> + label = "nand-bbt";
> + };
> + };
> + };
> +};
> +
> --
> 2.29.2
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
ation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml
> delete mode 100644 Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt
> create mode 100644 drivers/phy/marvell/phy-mvebu-cp110-utmi.c
>
> --
> 2.17.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
x19) 0 0xf110 0x1
> - MBUS_ID(0x09, 0x15) 0 0xf111 0x1>;
> + MBUS_ID(0x09, 0x15) 0 0xf111 0x1
> + MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
>
> internal-regs {
>
&
e7927b2 ("arm64: dts: marvell: armada-37xx: add nodes...")
> Cc: sta...@vger.kernel.org
> Cc: Gregory CLEMENT
> Cc: Miquel Raynal
Applied on mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 ++-
> 1 file changed, 2 insertions(+),
ak
> Tested-by: Anders Trier Olesen
> Tested-by: Philip Soares
> Fixes: 2089dc33ea0e ("clk: mvebu: armada-37xx-periph: add DVFS support for
> cpu clocks")
> Cc: sta...@vger.kernel.org # 61c40f35f5cd ("clk: mvebu: armada-37xx-periph:
> Fix switching CPU rate from 300M
Tested-by: Anders Trier Olesen
> Tested-by: Philip Soares
> Fixes: 1c3528232f4b ("cpufreq: armada-37xx: Add AVS support")
> Cc: sta...@vger.kernel.org
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> drivers/cpufreq/armada-37xx-cpufreq.c | 37 +
Pali Rohár writes:
> Variable cur_frequency in armada37xx_cpufreq_driver_init() is unused.
>
> Signed-off-by: Pali Rohár
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> drivers/cpufreq/armada-37xx-cpufreq.c | 10 +-
> 1 file changed, 1 insertion(+), 9 deletions
nders Trier Olesen
> Tested-by: Philip Soares
> Fixes: 92ce45fb875d ("cpufreq: Add DVFS support for Armada 37xx")
> Cc: sta...@vger.kernel.org # 8db82563451f ("cpufreq: armada-37xx: fix
> frequency calculation for opp")
Acked-by: Gregory CLEMENT
Thanks,
Gregory
>
uot;cpufreq: armada-37xx: fix frequency calculation for
> opp")
> Cc: sta...@vger.kernel.org
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> drivers/cpufreq/armada-37xx-cpufreq.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cpu
: Marek Behún
> Signed-off-by: Pali Rohár
> Acked-by: Stephen Boyd
> Tested-by: Tomasz Maciej Nowak
> Tested-by: Anders Trier Olesen
> Tested-by: Philip Soares
> Fixes: 61c40f35f5cd ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate
> from 300Mhz to 1.2GHz"
vebu: armada-37xx-periph: add DVFS support for
> cpu clocks")
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> drivers/clk/mvebu/armada-37xx-periph.c | 28 --
> 1 file changed, 28 deletions(-)
>
> diff --git a/drivers/clk/mvebu/armada-37
ridge Peripheral Clock registers directly in this
> driver.
>
> [1] https://github.com/wtarreau/mhz
>
> Signed-off-by: Marek Behún
> Tested-by: Pali Rohár
> Tested-by: Tomasz Maciej Nowak
> Tested-by: Anders Trier Olesen
> Tested-by: Philip Soares
> Fixes: 92ce
x driver cleanup when registration failed
>> cpufreq: armada-37xx: Fix determining base CPU frequency
>> cpufreq: armada-37xx: Remove cur_frequency variable
>> cpufreq: armada-37xx: Fix module unloading
>>
>> arch/arm64/boot/dts/marvell/armada-37xx.dtsi |
Hi,
> On Fri, 29 Jan 2021 17:01:35 +0100
> Gregory CLEMENT wrote:
>
>> Could you sent me the patch I don't have it in my emails boxes.
>
> https://lore.kernel.org/lkml/20201112032149.21906-1-chris.pack...@alliedtelesis.co.nz/raw
Applied on mvebu/arm
Thanks,
Gregory
>
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 550c1424acf0123ba0c17e22dfcac92d152b2f0e
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/550c1424acf0123ba0c17e22dfcac92d152b2f0e
Author:Gregory CLEMENT
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: b307ee828f61bc65d918e820a93b5c547a73dda3
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/b307ee828f61bc65d918e820a93b5c547a73dda3
Author:Gregory CLEMENT
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: ffce73d4415391b2d6da4878bf04d6610edf56db
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/ffce73d4415391b2d6da4878bf04d6610edf56db
Author:Gregory CLEMENT
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 47d5e0b0e1c151c06885a78a108001ead96adc75
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/47d5e0b0e1c151c06885a78a108001ead96adc75
Author:Gregory CLEMENT
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 5f0c75e7a1333f5ebb5303af55d8c863ea292c23
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/5f0c75e7a1333f5ebb5303af55d8c863ea292c23
Author:Gregory CLEMENT
The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: 7efdfbd15a21788de8c0743590e777f151a3031b
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/7efdfbd15a21788de8c0743590e777f151a3031b
Author:Gregory CLEMENT
da-8040.dtsi
> @@ -15,10 +15,6 @@ / {
> "marvell,armada-ap806";
> };
>
> - {
> - status = "okay";
> -};
> -
> _pcie0 {
> iommu-map =
> <0x00x480 0x20>,
> --
> 2.25.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
gger = "heartbeat";
> + };
> + };
> };
>
> _eth0 {
> @@ -27,3 +42,10 @@ _eth0 {
> managed = "in-band-status";
> sfp = <_eth1>;
> };
> +
> +_pinctrl {
> + cp0_led18_pins: led18-pins {
> + marvell,pins = "mpp33";
> + marvell,function = "gpio";
> + };
> +};
> --
> 2.29.2
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
ompatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + partition@0 {
> + reg = <0x 0x0050>;
> + label = "u-boot";
> + };
> + partition@50{
> + reg = <0x0050 0x0040>;
> + label = "u-boot env";
> + };
> + partition@90{
> + reg = <0x0090 0x3F70>;
> + label = "user";
> + };
> + };
> + };
> +};
> +
> + {
> + clock-frequency = <2>;
> +};
> --
> 2.29.2
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
gt; + CP11X_LABEL(usb3_1): usb@51 {
> compatible = "marvell,armada-8k-xhci",
> "generic-xhci";
> reg = <0x51 0x4000>;
> --
> 2.28.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
disabled";
> };
>
> - usb2: usb3@58000 {
> + usb2: usb@58000 {
> compatible = "marvell,armada-375-xhci";
> reg = <0x58000 0x2>,<0x5b880 0x80>;
>
> @@ -8,7 +8,7 @@
> *
> */
> /*
> - * Schematic available at
> http://wiki.espressobin.net/tiki-download_file.php?fileId=200
> + * Schematic available at
> http://espressobin.net/wp-content/uploads/2020/05/ESPRESSObin_V7-0_Schematic.pdf
> */
>
> /dts-v1/;
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
+};
> +
> + {
> + reg = <3>;
> +
> + ports {
> + switch0port1: port@1 {
> + reg = <1>;
> + label = "lan0";
> + phy-handle = <>;
> + };
> +
> +
status = "disabled";
> +
> + compatible = "gpio-leds";
> +
> + led2 {
> + label = "led2";
> + gpios = < 2 GPIO_ACTIVE_LOW>;
> + default-state = "off";
> + };
> + };
> };
>
> /* J9 */
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
e 00 00 00 ff 00];
> + sfp = <_cp0_eth0>;
> + managed = "in-band-status";
> +};
> +
> +_eth1 {
> + status = "okay";
> + phy = <_phy2>;
> + phy-mode = "sgmii";
> + local-mac-address = [ae 00 00 00 ff 01];
> + phys = <_comphy3 1>;
> +};
> +
> +_eth2 {
> + status = "okay";
> + phy-mode = "sgmii";
> + phys = <_comphy1 2>;
> + local-mac-address = [ae 00 00 00 ff 02];
> + phy = <_phy3>;
> +};
> +
> +_sata0 {
> + status = "okay";
> +
> + sata-port@0 {
> + phys = <_comphy2 0>;
> + phy-names = "cp0-sata0-0-phy";
> + };
> +
> + sata-port@1 {
> + phys = <_comphy5 1>;
> + phy-names = "cp0-sata0-1-phy";
> + };
> +};
> +
> +_sdhci0 {
> + broken-cd;
> + bus-width = <4>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_sdhci_pins>;
> + status = "okay";
> + vqmmc-supply = <_3_3>;
> +};
> +
> +_usb3_0 {
> + status = "okay";
> +};
> +
> +_usb3_1 {
> + status = "okay";
> +};
> +
> +_i2c0 {
> + clock-frequency = <10>;
> + status = "disabled";
> +};
> +
> +_i2c1 {
> + clock-frequency = <10>;
> + status = "disabled";
> +};
> +
> +_rtc {
> + status = "disabled";
> +};
> +
> +_ethernet {
> + status = "okay";
> +};
> +
> +_eth0 {
> + status = "okay";
> + phy-mode = "10gbase-r";
> + phys = <_comphy4 0>;
> + local-mac-address = [ae 00 00 00 ff 03];
> + sfp = <_cp1_eth0>;
> + managed = "in-band-status";
> +};
> +
> +_eth1 {
> + status = "okay";
> + phy = <_phy4>;
> + phy-mode = "sgmii";
> + local-mac-address = [ae 00 00 00 ff 04];
> + phys = <_comphy3 1>;
> +};
> +
> +_eth2 {
> + status = "okay";
> + phy-mode = "sgmii";
> + local-mac-address = [ae 00 00 00 ff 05];
> + phys = <_comphy5 2>;
> + phy = <_phy5>;
> +};
> +
> +_pinctrl {
> + cp1_sfpplus_led_pins: sfpplus-led-pins {
> + marvell,pins = "mpp6", "mpp7", "mpp8", "mpp10", "mpp14",
> "mpp31";
> + marvell,function = "gpio";
> + };
> +};
> +
> +_uart0 {
> + status = "disabled";
> +};
> +
> +_comphy2 {
> + cp1_usbh0_con: connector {
> + compatible = "usb-a-connector";
> + phy-supply = <_5v0_usb3_hst_vbus>;
> + };
> +};
> +
> +_usb3_0 {
> + phys = <_comphy2 0>;
> + phy-names = "cp1-usb3h0-comphy";
> + status = "okay";
> +};
> +
> +_mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + status = "okay";
> +
> + ge_phy4: ethernet-phy@1 {
> + reg = <1>;
> + };
> + ge_phy5: ethernet-phy@0 {
> + reg = <0>;
> + };
> +};
> +
> +_pcie0 {
> + num-lanes = <2>;
> + phys = <_comphy0 0>, <_comphy1 0>;
> + phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
> + status = "okay";
> +};
> --
> 2.26.2
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
g
> him.
>
> Cc: Andrew Lunn
> Cc: Sebastian Hesselbarth
> Cc: Gregory Clement
> Cc: Thomas Gleixner
> Cc: Thomas Petazzoni
> Signed-off-by: Marc Zyngier
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> CREDITS | 5 +
> MAINTAINERS | 4
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Serval.
Based on a larger patch from Lars Povlsen
Acked-by: Alexandre Belloni
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 19 +++
1 file changed, 19
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Jaguar2.
Based on a larger patch from Lars Povlsen
Acked-by: Alexandre Belloni
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 19 +++
1 file changed, 19
Add the Device Tree binding documentation for the Microsemi Jaguar2,
Luton and Serval interrupt controller that is part of the ICPU. It is
connected directly to the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
This patch extends irqchip driver for oceleot to be used with other
vcoreiii base platforms.
Acked-by: Alexandre Belloni
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 76 ++-
1 file changed, 54 insertions(+), 22 deletions(-)
diff --git
Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt
Controller to YAML format
Signed-off-by: Gregory CLEMENT
---
.../mscc,ocelot-icpu-intr.txt | 21 ---
.../mscc,ocelot-icpu-intr.yaml| 60 +++
2 files changed, 60 insertions
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 38 +++
1 file changed, 34 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-mscc-ocelot.c
b/drivers/irqchip/irq-mscc-ocelot.c
index 6d4029a2ded0..496f955b8fc4 100644
--- a/drivers
1 -> v2:
- Convert the binding to yaml
- Squashed the patches adding new binding in a single one
Gregory CLEMENT (6):
dt-bindings: interrupt-controller: convert icpu intr bindings to
json-schema
dt-bindings: interrupt-controller: Add binding for few Microsemi
interrupt controllers
Allow Luton and Jaguar2 SoCs to use reset feature by adding the reset
node.
Signed-off-by: Gregory CLEMENT
---
arch/mips/boot/dts/mscc/jaguar2.dtsi | 5 +
arch/mips/boot/dts/mscc/luton.dtsi | 5 +
2 files changed, 10 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/jaguar2.dtsi
b
-core
property support waiting for finding a butter solution for it.
Changelog:
v1 -> v2:
- Add binding documentation for the 2 new SoC
- Fix compatible string in name device tree node
- Add Acked-by from Alexande
Gregory
Gregory CLEMENT (3):
dt-bindings: reset: ocelot: Add Luton and Jagu
This adds the support for 2 others MIPS based VCore III SoCs: Luton
and Jaguar2.
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/power/reset/ocelot-reset.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/power/reset
This adds reset support for Luton and Jaguar2 in the ocelot-reset
driver. They are both MIPS based belonging to the Vcore III family.
Acked-by: Alexandre Belloni
Signed-off-by: Gregory CLEMENT
---
drivers/power/reset/ocelot-reset.c | 30 +++---
1 file changed, 27
orm and seemed in the end useless.
- Add acked-by from Alexandre on the last 2 patches.
v2 -> v3
- Fix new-line-at-end-of-file error in the yaml file
v1 -> v2:
- Convert the binding to yaml
- Squashed the patches adding new binding in a single one
Gregory CLEMENT (6):
dt-bindings:
This patch extends irqchip driver for oceleot to be used with an other
vcoreiii base platform: Luton.
For this platform there is a few differences:
- the interrupt must be enabled for the parent controller
- there is no trigger register needed to be managed
Signed-off-by: Gregory CLEMENT
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Jaguar2.
Based on a larger patch from Lars Povlsen
Acked-by: Alexandre Belloni
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 19 +++
1 file changed, 19
Add the Device Tree binding documentation for the Microsemi Jaguar2,
Luton and Serval interrupt controller that is part of the ICPU. It is
connected directly to the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Serval.
Based on a larger patch from Lars Povlsen
Acked-by: Alexandre Belloni
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 19 +++
1 file changed, 19
This patch extends irqchip driver for oceleot to be used with other
vcoreiii base platforms.
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 76 ++-
1 file changed, 54 insertions(+), 22 deletions(-)
diff --git a/drivers/irqchip/irq-mscc
Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt
Controller to YAML format
Signed-off-by: Gregory CLEMENT
---
.../mscc,ocelot-icpu-intr.txt | 21 ---
.../mscc,ocelot-icpu-intr.yaml| 60 +++
2 files changed, 60 insertions
This adds reset support for Luton and Jaguar2 in the ocelot-reset
driver. They are both MIPS based belonging to the VvoreIII family.
Signed-off-by: Gregory CLEMENT
---
drivers/power/reset/ocelot-reset.c | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff
From: Lars Povlsen
This patch add support for resetting the networking switch core at
reset driver load time. It is useful in order to bring the switch core
in a known state after a reboot or after a bootloader may have been
using the switch for network access.
Signed-off-by: Lars Povlsen
---
This property allows resetting the networking switch core at reset
driver load time.
Signed-off-by: Gregory CLEMENT
---
arch/mips/boot/dts/mscc/ocelot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi
b/arch/mips/boot/dts/mscc/ocelot.dtsi
index
Allow Luton and Jaguar2 SoC to use reset feature by adding the reset
node.
Signed-off-by: Gregory CLEMENT
---
arch/mips/boot/dts/mscc/jaguar2.dtsi | 6 ++
arch/mips/boot/dts/mscc/luton.dtsi | 5 +
2 files changed, 11 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/jaguar2.dtsi
b
subsystem.
Gregory
Gregory CLEMENT (3):
MIPS: dts: mscc: add reset switch property
power: reset: ocelot: Add support 2 othe MIPS based SoCs
MIPS: dts: mscc: add reset support for Luton and Jaguar2
Lars Povlsen (2):
dt-bindings: reset: ocelot: Add documentation for
'microchip,reset-switch
From: Lars Povlsen
This documents the 'microchip,reset-switch-core' property in the
ocelot-reset driver.
Signed-off-by: Lars Povlsen
---
.../devicetree/bindings/power/reset/ocelot-reset.txt| 6 ++
1 file changed, 6 insertions(+)
diff --git
Add the Device Tree binding documentation for the Microsemi Jaguar2,
Luton and Serval interrupt controller that is part of the ICPU. It is
connected directly to the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Jaguar2.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 20
1 file changed, 20 insertions(+)
diff --git
Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt
Controller to YAML format
Signed-off-by: Gregory CLEMENT
---
.../mscc,ocelot-icpu-intr.txt | 21 ---
.../mscc,ocelot-icpu-intr.yaml| 59 +++
2 files changed, 59 insertions
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Serval.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers
This patch extends irqchip driver for oceleot to be used with an other
vcoreiii base platform: Luton.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 145 +-
1 file changed, 123 insertions(+), 22
compatible strings.
Gregory
Changelog:
v2 -> v3
- Fix new-line-at-end-of-file error in the yaml file
v1 -> v2:
- Convert the binding to yaml
- Squashed the patches adding new binding in a single one
Gregory CLEMENT (5):
dt-bindings: interrupt-controller: convert icpu intr bindings to
Hello Rob,
> On Thu, 12 Nov 2020 17:04:20 +0100, Gregory CLEMENT wrote:
>> Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt
>> Controller to YAML format
>>
>> Signed-off-by: Gregory CLEMENT
>> ---
>> .../mscc,ocelot-icpu-intr.txt
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Serval.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Jaguar2.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 20
1 file changed, 20 insertions(+)
diff --git
This patch extends irqchip driver for oceleot to be used with an other
vcoreiii base platform: Luton.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 145 +-
1 file changed, 123 insertions(+), 22
compatible strings.
Gregory
Changelog:
v1 -> v2:
- Convert the binding to yaml
- Squashed the patches adding new binding in a single one
Gregory CLEMENT (5):
dt-bindings: interrupt-controller: convert icpu intr bindings to
json-schema
dt-bindings: interrupt-controller: Add binding for
Add the Device Tree binding documentation for the Microsemi Jaguar2,
Luton and Serval interrupt controller that is part of the ICPU. It is
connected directly to the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt
Controller to YAML format
Signed-off-by: Gregory CLEMENT
---
.../mscc,ocelot-icpu-intr.txt | 21 ---
.../mscc,ocelot-icpu-intr.yaml| 59 +++
2 files changed, 59 insertions
Add the documentation for the Microsemi Luton pinmuxing and gpio
controller.
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt| 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/mscc
-by: Gregory CLEMENT
---
drivers/pinctrl/pinctrl-ocelot.c | 92
1 file changed, 92 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index a4a1b00f7f0d..ab74c79d7cca 100644
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers
-by: Gregory CLEMENT
---
drivers/pinctrl/pinctrl-ocelot.c | 92
1 file changed, 92 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index ab74c79d7cca..18336950fd95 100644
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers
strings.
Gregory
Gregory CLEMENT (2):
dt-bindings: pinctrl: ocelot: Add Luton SoC support
dt-bindings: pinctrl: ocelot: Add Serval SoC support
Lars Povlsen (2):
pinctrl: ocelot: Add support for Luton platforms
pinctrl: ocelot: Add support for Serval platforms
.../bindings/pinctrl/mscc
Add the documentation for the Microsemi Serval pinmuxing and gpio
controller.
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/mscc
This patch extends irqchip driver for oceleot to be used with an other
vcoreiii base platform: Luton.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 145 +-
1 file changed, 123 insertions(+), 22
Add the Device Tree binding documentation for the Microsemi Luton
interrupt controller that is part of the ICPU. It is connected directly to
the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt | 4 +++-
1 file
compatible strings.
Gregory
Gregory CLEMENT (6):
dt-bindings: interrupt-controller: Add binding for the Microsemi Luton
interrupt controller
dt-bindings: interrupt-controller: Add binding for the Microsemi
Serval interrupt controller
dt-bindings: interrupt-controller: Add binding
Add the Device Tree binding documentation for the Microsemi Jaguar2
interrupt controller that is part of the ICPU. It is connected directly to
the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT
---
.../interrupt-controller/mscc,ocelot-icpu-intr.txt | 7 ---
1 file
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Serval.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers
This patch extends irqchip driver for ocelot to be used with an other
vcoreiii base platform: Jaguar2.
Based on a larger patch from Lars Povlsen
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/irq-mscc-ocelot.c | 20
1 file changed, 20 insertions(+)
diff --git
Add the Device Tree binding documentation for the Microsemi Serval
interrupt controller that is part of the ICPU. It is connected directly to
the MIPS core interrupt controller.
Signed-off-by: Gregory CLEMENT
---
.../bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt| 3 ++-
1 file
mccard@0 {
>> > - compatible = "mmc-card";
>> > - reg = <0>;
>> > - };
>> > };
>> > diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
>> > b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
>> > index 3169a820558f..8a1c678bea5f 100644
>> > --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
>> > +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
>> > @@ -58,6 +58,30 @@
>> >phy-names = "sata-phy";
>> > };
>> > +/* U11 */
>> > + {
>> > + /* Main DTS file for Espressobin is without eMMC */
>> > + status = "disabled";
>> > +
>> > + non-removable;
>> > + bus-width = <8>;
>> > + mmc-ddr-1_8v;
>> > + mmc-hs400-1_8v;
>> > + marvell,xenon-emmc;
>> > + marvell,xenon-tun-count = <9>;
>> > + marvell,pad-type = "fixed-1-8v";
>> > +
>> > + pinctrl-names = "default";
>> > + pinctrl-0 = <_pins>;
>> > +
>> > + #address-cells = <1>;
>> > + #size-cells = <0>;
>> > + mmccard: mmccard@0 {
>> > + compatible = "mmc-card";
>> > + reg = <0>;
>> > + };
>> > +};
>> > +
>> > /* J1 */
>> >{
>> >wp-inverted;
>> >
>>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
ble at
> http://espressobin.net/wp-content/uploads/2020/05/ESPRESSObin_V7-0_Schematic.pdf
> */
>
> /dts-v1/;
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
for backporting it would
>> also need some machine-readable format. So patch would not be
>> occasionally backported to older/stable kernel where a2c7023f7075c is
>> not available.
>
> Based on stable-kernel-rules.html document I think that following line
> should define this dependency in machine readable format:
>
> Cc: # a2c7023f7075c: dsa: read mac address
>
> Gregory, if it is correct, would you add that line into commit sign-off
> area where is existing Fixes: line?
I amended the commit log with this change.
Thanks,
Gregory
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
ethernet3 =
> - serial0 =
> - serial1 =
> };
>
> chosen {
> --
> 2.28.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
1: port@1 {
> - reg = <1>;
> - label = "lan1";
> - phy-handle = <>;
> - };
> + {
> + label = "lan1";
> +};
>
> - switch0port3: port@3 {
> - reg = <3>;
> - label = "wan";
> - phy-handle = <>;
> - };
> - };
> + {
> + label = "wan";
> };
> --
> 2.28.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
cpu";
> ethernet = <>;
> @@ -131,19 +135,19 @@
> };
> };
>
> - port@1 {
> + switch0port1: port@1 {
> reg = <1>;
>
36
> ARM: dts: Add i2c0 pinctrl information for 98dx3236
Applied the 2 dts pacthes on mvebu/dt
Thanks,
Gregory
>
> arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 12 +++-
> drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 2 +-
> 2 files changed, 8 insertions(+), 6 deletions(-)
>
gpio_ext: gpio@20 {
> compatible = "nxp,pca9555";
> reg = <0x20>;
> + gpio-controller;
> #gpio-cells = <2>;
> };
> };
> --
> 2.17.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
reate mode 100644 arch/arm/boot/dts/armada-xp-crs326-24g-2s.dtsi
> create mode 100644 arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s-bit.dts
> create mode 100644 arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s.dts
> create mode 100644 arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s.dtsi
>
> --
> 2.26.2
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
gpios = <1 GPIO_ACTIVE_LOW>;
> input;
> line-name = "board-rev-1";
> };
> - usb3_ilimit {
> + usb3-ilimit-hog {
> gpio-hog;
> gpios = <5 GPIO_ACTIVE_HIGH>;
> input;
> --
> 2.17.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
#global-interrupts = <1>;
> + interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> + status = "disabled";
> + };
> +
> gic: interrupt-controller@21 {
> compatible = "arm,gic-400";
> #interrupt-cells = <3>;
> --
> 2.17.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
MMU-500
>> > https://git.kernel.org/will/c/e85e84d19b9d
>>
>> (note that I left patch 4 for arm-soc, as that's just updating .dts files)
>>
>
> Hi Gregory,
>
> Can you please help with the review/merge of patch #4?
Sure!
I've followed the series since the v1 even if I didn't commetn and I am
happy that it finally managed to be merged. I can now remove it from
my TODO list! :)
Gregory
>
> Best regards,
> Marcin
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
a7636fe28501 100644
> --- a/arch/arm/boot/dts/kirkwood-b3.dts
> +++ b/arch/arm/boot/dts/kirkwood-b3.dts
> @@ -9,7 +9,7 @@
> * L2 cache. If your B3 silently fails to boot, u-boot is probably too
> * old. Either upgrade, or consider the following email:
> *
> - * http://lists.
ll-through
>
> Signed-off-by: Gustavo A. R. Silva
Reviewed-by: Gregory CLEMENT
> ---
> drivers/i2c/busses/i2c-mv64xxx.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-mv64xxx.c
> b/drivers/i2c/busses/i2c-mv
nfo by pr_debug
> - remove the superfluous printk("\n");
> - use --follow option with git log to find the original commit to fix
> - use tty_port_tty_wakeup
> - use 'for' loop instead of 'while'
>
> Gregory
>
> Gregory CLEMENT (3):
> tty: n_gsm: Improve debug ou
than make it optional.
Fixes: e1eaea46bb40 ("tty: n_gsm line discipline")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index 67c8f8173023..d8d196645500 1006
If the length is zero then the print_hex_dump_bytes won't output
anything, so testing the length before the call is unnecessary.
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
for the review.
Changelog:
v1 -> v2:
- don't replace the pr_info by pr_debug
- remove the superfluous printk("\n");
- use --follow option with git log to find the original commit to fix
- use tty_port_tty_wakeup
- use 'for' loop instead of 'while'
Gregory
Gregory CLEMENT (3):
le" was not yet in mainline, it has no
SHA-1 ID yet. That's why I reference the same commit that the one
fixed by "TTY improve n_gsm support", as they should be applied in the
same order in stable branch than in mainline.
Gregory
Gregory CLEMENT (2):
tty: n_gsm: Remove unnecessary te
Warn the upper layer when n_gms is ready to receive data
again. Without this the associated virtual tty remains blocked
indefinitely.
Fixes: e1eaea46bb40 ("tty: n_gsm line discipline")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 26 ++
1 file c
ct.
Fixes: e1eaea46bb40 ("tty: n_gsm line discipline")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index 4465dd04fead..0a29a94ec438 100644
--- a/drive
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