From: Weijun Yang <york.y...@csr.com>
CMD19 tuning is also available for DDR50 mode.
Signed-off-by: Weijun Yang <york.y...@csr.com>
Signed-off-by: Barry Song <baohua.s...@csr.com>
---
drivers/mmc/host/sdhci.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff -
From: Weijun Yang <york.y...@csr.com>
According to hardware spec, validate DDR50 mode
for SDXC.
Signed-off-by: Weijun Yang <york.y...@csr.com>
Signed-off-by: Barry Song <baohua.s...@csr.com>
---
drivers/mmc/host/sdhci-sirf.c | 3 ++-
1 file changed, 2 insertions(+), 1 delet
ilable for DDR50
mode.
Signed-off-by: Weijun Yang <york.y...@csr.com>
Signed-off-by: Barry Song <baohua.s...@csr.com>
---
drivers/mmc/core/sd.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 4e736
From: Weijun Yang <york.y...@csr.com>
According to hardware spec, validate DDR50 mode
for SDXC.
Signed-off-by: Weijun Yang <york.y...@csr.com>
Signed-off-by: Barry Song <baohua.s...@csr.com>
---
drivers/mmc/host/sdhci-sirf.c | 3 ++-
1 file changed, 2 insertions(+), 1 delet
ilable for DDR50
mode.
Signed-off-by: Weijun Yang <york.y...@csr.com>
Signed-off-by: Barry Song <baohua.s...@csr.com>
---
drivers/mmc/core/sd.c| 19 +--
drivers/mmc/host/sdhci.c | 1 +
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/sd.c
2015-09-17 20:27 GMT+08:00 Ulf Hansson <ulf.hans...@linaro.org>:
> On 15 September 2015 at 09:13, Barry Song <21cn...@gmail.com> wrote:
>> 2015-08-25 20:05 GMT+08:00 Ulf Hansson <ulf.hans...@linaro.org>:
>>> On 20 August 2015 at 02:16, Barry Song <21cn...@gma
2015-08-25 20:05 GMT+08:00 Ulf Hansson <ulf.hans...@linaro.org>:
> On 20 August 2015 at 02:16, Barry Song <21cn...@gmail.com> wrote:
>> 2015-08-18 1:11 GMT+08:00 Ulf Hansson <ulf.hans...@linaro.org>:
>>> On 11 August 2015 at 10:41, Barry Song <21cn...@g
2015-08-18 1:11 GMT+08:00 Ulf Hansson ulf.hans...@linaro.org:
On 11 August 2015 at 10:41, Barry Song 21cn...@gmail.com wrote:
From: Weijun Yang york.y...@csr.com
As SD Specifications Part1 Physical Layer Specification Version
3.01 says, CMD19 tuning is available for unlocked cards in transfer
From: Barry Song baohua.s...@csr.com
the current quirk set is for an old FPGA, and this patch corrects
quirks according to real SoC.
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/host/sdhci-sirf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers
From: Weijun Yang york.y...@csr.com
According to hardware spec, validate DDR50 mode
for SDXC.
Signed-off-by: Weijun Yang york.y...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/host/sdhci-sirf.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
for DDR50
mode.
Signed-off-by: Weijun Yang york.y...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/core/sd.c| 1 +
drivers/mmc/host/sdhci.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 4e7366a..a1ed24d 100644
From: Weijun Yang weijun.y...@csr.com
hardware has 16bit to record the tuning count, so fix it to 16384.
at the same time, tuned_phases[SIRF_TUNING_COUNT] is useless as the
array is never used, so move it to a variant.
Signed-off-by: Weijun Yang weijun.y...@csr.com
Signed-off-by: Barry Song
From: Weijun Yang weijun.y...@csr.com
chips have some issues for version and capbility registers, here we fake
them.
Signed-off-by: Weijun Yang weijun.y...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/host/Kconfig | 1 +
drivers/mmc/host/sdhci-sirf.c | 35
ping Ulf
2015-02-15 23:43 GMT+08:00 Barry Song 21cn...@gmail.com:
From: weijun yang york.y...@csr.com
For the original tuning code, delay value is set to SD Bus Clock Delay
Register (SD_CLK_DELAY_SETTING) as (val | (Val 7) | (val 16)),
which means CLK_DELAY_IN1, CLK_DELAY_IN2
...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/host/sdhci-sirf.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index f6f82ec..4331409 100644
--- a/drivers/mmc/host/sdhci-sirf.c
+++ b
hi Chris, Ulf,
According to
https://www.sdcard.org/downloads/pls/simplified_specs/archive/partE1_200.pdf
(section CMD52 During Data Transfer ),
A card may accept CMD52 during data transfer if it supports Direct
Commands (see SDC, Table 6-3). For both SD and SPI modes, if an error
occurs during
-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/host/sdhci-sirf.c | 71 +++
1 file changed, 71 insertions(+)
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index dd29d47..e458d18 100644
--- a/drivers/mmc/host/sdhci-sirf.c
+++ b
platform_execute_tuning() callbacks.
Signed-off-by: Minda Chen minda.c...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/core/mmc_ops.c | 70 ++
include/linux/mmc/core.h | 1 +
2 files changed, 71 insertions(+)
diff --git a/drivers/mmc/core
2014-11-24 19:44 GMT+08:00 Ulf Hansson ulf.hans...@linaro.org:
On 21 November 2014 at 15:46, Barry Song 21cn...@gmail.com wrote:
From: Minda Chen minda.c...@csr.com
According to the SD card spec, Add a manual tuning command function
for SDR104/HS200 by sending command 19 or command 21 to read
platform_execute_tuning() callbacks.
Signed-off-by: Minda Chen minda.c...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/core/mmc_ops.c | 65 ++
include/linux/mmc/core.h | 1 +
2 files changed, 66 insertions(+)
diff --git a/drivers/mmc/core
These piece of code, which sends the tuning command don't belong in
the host driver. Instead I would like this to be handled from a helper
function from the mmc core.
I realize that there already a few existing host drivers that
implemented similar code and I don't like it. We should convert
2014-11-12 17:35 GMT+08:00 Ulf Hansson ulf.hans...@linaro.org:
On 11 November 2014 16:47, Barry Song 21cn...@gmail.com wrote:
From: Minda Chen minda.c...@csr.com
Add manual tuning function in CSR atlas7 SoC. It is mainly used
for the UHS-I SD card working SDR50 SDR104 mode.
The tuning
-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/host/sdhci-sirf.c | 105 +-
1 file changed, 104 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index dd29d47..c71cf4e 100644
--- a/drivers/mmc/host
of 8bit transfer in mmc controllers
and improve performance for mmc0 a lot.
Signed-off-by: Minda Chen minda.c...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
Reviewed-by: Romain Izard romain.izard@gmail.com
---
-v3:fix the HW version check according to Romain's feedback
drivers/mmc
-Original Message-
From: Barry Song [mailto:21cn...@gmail.com]
Sent: Thursday, August 21, 2014 6:09 PM
To: Romain Izard
Cc: linux-mmc@vger.kernel.org; Minda Chen; DL-SHA-WorkGroupLinux
Subject: Re: [PATCH v2] mmc: sdhci-sirf: fix 8bit width enable by overwriting
set_bus_width
-Original Message-
From: Ulf Hansson [mailto:ulf.hans...@linaro.org]
Sent: Monday, August 18, 2014 7:58 PM
To: Barry Song
Cc: Chris Ball; linux-mmc; linux-arm-ker...@lists.infradead.org; DL-SHA-
WorkGroupLinux; Minda Chen; Barry Song
Subject: Re: [PATCH] mmc: core: sd: check card
2014-08-20 22:25 GMT+08:00 Romain Izard romain.izard@gmail.com:
[Followup-To: header set to gmane.linux.kernel.mmc.]
On 2014-08-19, Barry Song 21cn...@gmail.com wrote:
From: Minda Chen minda.c...@csr.com
8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts use
bit 5
From: Minda Chen minda.c...@csr.com
8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts use
bit 5. this patch fixes the functionality of 8bit transfer in CSR mmc
controllers and improve performance for mmc0 a lot.
Signed-off-by: Minda Chen minda.c...@csr.com
Signed-off-by: Barry
From: Minda Chen minda.c...@csr.com
After suspending, unplug the sdcard, and set sd WP lock,
insert it again, then resume the system. resume codes do
not check the the sdcard write-proctect lock. now check
it.
Signed-off-by: Minda Chen minda.c...@csr.com
Signed-off-by: Barry Song baohua.s
From: Barry Song baohua.s...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
drivers/mmc/host/sdhci-sirf.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index 696122c..c6d399c 100644
From: Bin Shi bin@csr.com
To take advantage of combined dma buffer, enable
SDHCI_QUIRK2_SG_LIST_COMBINED_DMA_BUFFER to lift
read/write performance.
Signed-off-by: Bin Shi bin@csr.com
Signed-off-by: Barry Song barry.s...@csr.com
---
drivers/mmc/host/sdhci-sirf.c | 13 +
1
with
normal dma mapping.
Also this will involve one more memory copy, but good IO performance
is got:
On CSR SiRFprimaII, reading 8192KB will speed up from 17444KB/s to
18687KB/s, 7% lift.
Signed-off-by: Bin Shi bin@csr.com
Signed-off-by: Barry Song barry.s...@csr.com
---
drivers/mmc/host
From: Barry Song barry.s...@csr.com
1ms busy-loop might be wasted when the condition if(sdhci_readl(host,
SDHCI_PRESENT_STATE) mask) becomes false just after the if().
here we use time_after which will have no redundant busy-wait loop.
Signed-off-by: Barry Song barry.s...@csr.com
Cc: Bin Shi
, there is no this problem.
Signed-off-by: Bin Shi bin@csr.com
Signed-off-by: Binghua Duan binghua.d...@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
arch/arm/mach-prima2/Kconfig | 1 +
drivers/mmc/host/sdhci-sirf.c | 18 ++
2 files changed, 19 insertions(+)
diff --git
2013/8/9 Haijun Zhang haijun.zh...@freescale.com:
When command with busy flags send and also data busy end interrupt
will be generate, the command will be finished when data transfer
complete or data busy state end, Sometimes this will expend more than
10*Hz time to finish this command, so we
2013/8/9 Zhang Haijun b42...@freescale.com:
On 08/09/2013 02:39 PM, Barry Song wrote:
2013/8/9 Haijun Zhang haijun.zh...@freescale.com:
When command with busy flags send and also data busy end interrupt
will be generate, the command will be finished when data transfer
complete or data busy
2013/7/10 Wolfram Sang w...@the-dreams.de:
Since commit ab78029 (drivers/pinctrl: grab default handles from device core),
we can rely on device core for setting the default pins. Compile tested only.
Acked-by: Linus Walleij linus.wall...@linaro.org (personally at LCE13)
Signed-off-by: Wolfram
From: Bin Shi bin@csr.com
only sd0 has the issue that WP is inverted, so we drop the global set of
SDHCI_QUIRK_INVERTED_WRITE_PROTECT and only enable the wp-inverted prop
for sd0 in dts.
Signed-off-by: Bin Shi bin@csr.com
Signed-off-by: Barry Song baohua.s...@csr.com
---
arch/arm/boot
driver to use the new interface, avoiding
one warning, and simplifying the init sequence. Since we're here
already, this also adds an error path for failed clk_prepare_enable.
Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Christian Daudt c...@broadcom.com
Cc: Barry Song baohua.s...@csr.com
With device core now able to setup the default pin configuration, the call
to devm_pinctrl_get_select_default can be removed. And the pin configuration
code based on the deprecated Samsung specific gpio bindings is also removed.
CC: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Barry Song
-by: Barry Song baohua.s...@csr.com
---
-v2:
delete #include linux/pinctrl/consumer.h
drivers/mmc/host/sdhci-sirf.c |8
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index 09805af..ccf12dd 100644
--- a/drivers/mmc
From: Barry Song baohua.s...@csr.com
this patch adds the new driver for CSR SiRF SoCs:
SiRFprimaII: unicore ARM Cortex-A9
SiRFatlas6: unicore ARM Cortex-A9
SiRFmarco: dual core ARM Cortex-A9 SMP
Signed-off-by: Barry Song baohua.s...@csr.com
Signed-off-by: Bin Shi bin@csr.com
2012/1/12 Dmitry Shmidt dimitr...@google.com
On Tue, Jan 10, 2012 at 6:44 PM, Barry Song 21cn...@gmail.com wrote:
2012/1/10 Dmitry Shmidt dimitr...@google.com:
Signed-off-by: Dmitry Shmidt dimitr...@google.com
Hi Dmitry,
after you move mmc_bus_suspend, mmc_bus_resume to dev_pm_ops
2012/1/12 Dmitry Shmidt dimitr...@google.com
On Tue, Jan 10, 2012 at 6:44 PM, Barry Song 21cn...@gmail.com wrote:
2012/1/10 Dmitry Shmidt dimitr...@google.com:
Signed-off-by: Dmitry Shmidt dimitr...@google.com
Acked-by: Barry Song baohua.s...@csr.com
Hi Dmitry,
after you move
2012/1/10 Dmitry Shmidt dimitr...@google.com:
Signed-off-by: Dmitry Shmidt dimitr...@google.com
Hi Dmitry,
after you move mmc_bus_suspend, mmc_bus_resume to dev_pm_ops, while
doing hiberantion by swsusp, suspend/resume will not be called by the
hibernation flow since it will move to call
2012/1/9 Shubhrajyoti Datta omaplinuxker...@gmail.com:
Hi Bin,
On Mon, Jan 9, 2012 at 11:52 AM, Barry Song barry.s...@csr.com wrote:
From: Bin Shi bin@csr.com
This patch moves suspend/resume to dev_pm_ops and add hibernation support.
It was tested on CSR SiRFprimaII cortex-a9 platform
From: Bin Shi bin@csr.com
This patch moves suspend/resume to dev_pm_ops and add hibernation support.
It was tested on CSR SiRFprimaII cortex-a9 platform. A sd partition is used
as swsusp partition.
Signed-off-by: Bin Shi bin@csr.com
Signed-off-by: Barry Song barry.s...@csr.com
2011/10/27 Shawn.Dong shawn.dong...@gmail.com:
sdhci_set_clock or sdhci_reset or sdhci_send_command may be used in
critical region which is protected by spin_lock_irqsave. Thus, these
functions will delay the responsing of the kernel interrupts.
So in this case, using a mdelay will cause
2011/10/10 Borislav Petkov b...@alien8.de:
On Sun, Oct 09, 2011 at 10:44:12PM -0700, Barry Song wrote:
From: Barry Song baohua.s...@csr.com
patch PM: HIBERNATION: add resume_wait param to support MMC-like devices
as resume file add resume_wait param. this patch adds resume_delay so
From: Barry Song baohua.s...@csr.com
patch PM: HIBERNATION: add resume_wait param to support MMC-like devices
as resume file add resume_wait param. this patch adds resume_delay so that
resume_wait/delay has the same model with root_wait/delay.
Signed-off-by: Barry Song baohua.s...@csr.com
2011/10/1 Andrei E. Warkentin andrey.warken...@gmail.com:
Hi,
2011/9/28 Barry Song barry.s...@csr.com:
From: Barry Song baohua.s...@csr.com
now we wait 1ms after every loop, in the worst case, 1ms will be wasted.
that both decreases sd performance and increases cpu usage.
This patch
2011/10/7 Pavel Machek pa...@ucw.cz:
2011/9/29 Luca Tettamanti kronos...@gmail.com:
On Thu, Sep 29, 2011 at 11:29 AM, Barry Song barry.s...@csr.com wrote:
From: Barry Song baohua.s...@csr.com
Some devices like mmc are async detected very slow. For example,
drivers/mmc/host/sdhci.c
2011/10/7 Barry Song 21cn...@gmail.com:
2011/10/7 Pavel Machek pa...@ucw.cz:
2011/9/29 Luca Tettamanti kronos...@gmail.com:
On Thu, Sep 29, 2011 at 11:29 AM, Barry Song barry.s...@csr.com wrote:
From: Barry Song baohua.s...@csr.com
Some devices like mmc are async detected very slow
From: Barry Song baohua.s...@csr.com
Some devices like mmc are async detected very slow. For example,
drivers/mmc/host/sdhci.c launchs a 200ms delayed work to detect
mmc partitions then add disk.
we do have wait_for_device_probe and scsi_complete_async_scans
before calling swsusp_check
hi Valdis,
2011/9/29 valdis.kletni...@vt.edu:
On Thu, 29 Sep 2011 02:29:08 PDT, Barry Song said:
This patch adds resumewait kernel param just like rootwait so
that we have enough time to wait mmc ready. The differene is
here we wait for resume partition but rootwait waits for rootfs
From: Barry Song baohua.s...@csr.com
Some devices like mmc are async detected very slow. For example,
drivers/mmc/host/sdhci.c launchs a 200ms delayed work to detect
mmc partitions then add disk.
we do have wait_for_device_probe and scsi_complete_async_scans
before calling swsusp_check
2011/9/29 Luca Tettamanti kronos...@gmail.com:
On Thu, Sep 29, 2011 at 11:29 AM, Barry Song barry.s...@csr.com wrote:
From: Barry Song baohua.s...@csr.com
Some devices like mmc are async detected very slow. For example,
drivers/mmc/host/sdhci.c launchs a 200ms delayed work to detect
mmc
2011/9/29 Luca Tettamanti kronos...@gmail.com:
On Thu, Sep 29, 2011 at 5:47 PM, Luca Tettamanti kronos...@gmail.com wrote:
On Thu, Sep 29, 2011 at 11:29 AM, Barry Song barry.s...@csr.com wrote:
From: Barry Song baohua.s...@csr.com
Some devices like mmc are async detected very slow
you must have mis-operations.
2011/5/20 Huang Changming-R66093 r66...@freescale.com:
I have posted these patches, why I can't received them from Linux-mmc?
Thanks and Best Regards
Jerry Huang
-Original Message-
From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-
interrupt in hardware except that hardware gives a
special design with data1. Otherwise, controllers with shared pins
requested at runtime will not support sdio devices with interrupts.
Philip
On Apr 26, 2011, at 12:27 AM, Barry Song wrote:
Hi Wolfram,
2011/4/26 Wolfram Sang w.s
2011/4/28 Barry Song 21cn...@gmail.com:
Hi Philip,
2011/4/26 Philip Rakity prak...@marvell.com:
Barry,
How are interrupts from SDIO devices handled ? SDIO devices use one of the
pins to signal a interrupt to the host when data is availabe.
Good question. in fact, it is impossible
Hi Wolfram,
2011/4/26 Wolfram Sang w.s...@pengutronix.de:
* Where is the patch that implements the get_shared_pins() hook in
your driver?
We send the common level patch ahead to get the upstream agreement so
that we can maintain our bottom level sdhci codes better. We will send
the
Cc: Binghua Duan binghua.d...@csr.com
Cc: Andrei Warkentin andr...@motorola.com
Cc: Philip Rakity prak...@marvell.com
Signed-off-by: Barry Song 21cn...@gmail.com
---
drivers/mmc/host/sdhci.c | 13 +
drivers/mmc/host/sdhci.h | 2 ++
2 files changed, 15 insertions(+), 0 deletions
2011/4/26 Chris Ball c...@laptop.org:
Hi Barry,
On Mon, Apr 25 2011, Barry Song wrote:
From: Bin Shi bin@csr.com
some controllers share data bus or other pins between
multi-controllers and need to switch the functions of shared pins
runtime.
this patch requested those shared pins
2011/4/21 Andrei Warkentin andr...@motorola.com:
Hi,
On Thu, Apr 21, 2011 at 3:51 AM, Barry Song 21cn...@gmail.com wrote:
From: Bin Shi bin@csr.com
some controllers share data bus or other pins between
multi-controllers and need to switch the functions of shared pins
runtime
Cc: Binghua Duan binghua.d...@csr.com
Signed-off-by: Barry Song 21cn...@gmail.com
---
drivers/mmc/host/sdhci.c | 13 +
drivers/mmc/host/sdhci.h |2 ++
include/linux/mmc/sdhci.h |2 ++
3 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b
66 matches
Mail list logo
