On 1/12/2012 11:23 AM, Sebastian Riemer wrote:
We are running iSER directly on the host. KVM is compiled in but there
aren't any VMs on our iSER test server. It is a diskless SuperMicro
server with NFS root. On productive servers we have a live-image and
KVM uses the iSER driven block devices
On 12/01/12 10:29, Or Gerlitz wrote:
If you have build the kernel IB user space support (uverbs) and the
IB libs, do ibv_devinfo if not, just ossi cat
/sys/class/infiniband/mlx4_0/* and send the output. To be clear, iser
does work for you on the productive servers but not on this server?
I'm trying to have N threads reading from the same completion channel, bounded to M completion queues. I would like to
have N M, and to ensure that only a single thread at time can call ibv_poll_cq() on a given queue, to process the
events in the same order they were put in the queue.
I can't
Sparse complains because len in struct srp_direct_buf is declared as
big endian but it's used throughout as CPU endian. struct
srp_indirect_buf has the same thing. It's declared one way but used the
other way.
$ grep -w len drivers/scsi -R | grep -w md
drivers/scsi/ibmvscsi/ibmvfc.c:
On Thu, Jan 12, 2012 at 12:41 PM, Dan Carpenter
dan.carpen...@oracle.com wrote:
Sparse complains because len in struct srp_direct_buf is declared as
big endian but it's used throughout as CPU endian. struct
srp_indirect_buf has the same thing. It's declared one way but used the
other way.
Fixed segfault in osm_destroy() when hop_weights_file,
port_search_ordering_file or io_guid_file are configured.
The segfault introduced by d71a924736707400bed47a3c69395cf864c970bb.
Signed-off-by: Alex Netes ale...@mellanox.com
---
opensm/main.c |6 +++---
1 files changed, 3 insertions(+),
On 12/01/12 11:16, Sebastian Riemer wrote:
On 12/01/12 10:29, Or Gerlitz wrote:
If you have build the kernel IB user space support (uverbs) and the
IB libs, do ibv_devinfo if not, just ossi cat
/sys/class/infiniband/mlx4_0/* and send the output. To be clear, iser
does work for you on the
I'm trying to have N threads reading from the same completion channel, bounded
to M completion queues. I would like to
have N M, and to ensure that only a single thread at time can call
ibv_poll_cq() on a given queue, to process the
events in the same order they were put in the queue.
I
On Jan 11, 2012, at 5:22 PM, Hefty, Sean wrote:
I'm still waiting on feedback from the IBTA, but they are looking into the
matter.
The intent is for immediate data only to be provided on receive work
completions. The IBTA will clarify the spec on this. I'll submit patches
that remove
Should whatever this issue is be a general PCI fixup? Like broken MSI,
etc.
Can you point me to some details on this?
Might be nice to include what 0x51 tunes in the commit to aide other
peoole with the broken chipset :)
Isn't it necesary to check the PCI vendor as well as the devid?
Will
On 1/12/2012 5:18 PM, Sebastian Riemer wrote:
How do I find out if ib1 is on mlx4_1 or mlx4_0
you do ip addr show and compare with
/sys/class/infiniband/mlx4_*/ports/1/gid/0
you didn't send the kernel logs from the failure after opening the iser
(debug_level=2) and libiscsi
On 1/11/2012 10:09 PM, Or Gerlitz wrote:
[...] I'll give 3.0.15 a try tomorrow, however, the error you're
getting iser_drain_tx_cq:tx id 88402391f898 status 4 vend_err 57
means that iser got local protection error (=4) on the first buffer we
used with IB (the connection handshake buffers
On Wed, Jan 11, 2012 at 09:49:25PM +0200, Or Gerlitz wrote:
Shawn Bohrer sboh...@rgmadvisors.com wrote:
Is there any estimate on when we might see something like this upstream?
Could you elaborate a little on your use case for multicast IBoE
traffic? e.g how the setup looks like and how are
On Thu, 12 Jan 2012, Alex Netes wrote:
Fixed segfault in osm_destroy() when hop_weights_file,
port_search_ordering_file or io_guid_file are configured.
The segfault introduced by d71a924736707400bed47a3c69395cf864c970bb.
Signed-off-by: Alex Netes ale...@mellanox.com
---
opensm/main.c |6
Does this work on systems where the broken chipset might
not be the immediate parent of the qib device (ie there are
some PCIe switches in between)?
The code figures this out at the top of routine and returns, changing nothing.
This message and any attached documents contain information
Hi Goldwyn,
On 10:02 Wed 11 Jan , Goldwyn Rodrigues wrote:
Hi Alex,
Let me start with how we encountered the problem:
This problem came up when our customer was using a 2 port card with only
one of the port active. opensm could not get the guid of the port
that was active in daemon
The kernel IB stack uses one enumeration for IB speed, which wasn't
explicitly specified in the verbs header file. Add that enum, and
use it all over the code. Note that the IB speed/width notation is
also used by iWARP and IBoE hw drivers who apply the convention of
rate = speed X width, to
Hi Alex,
On Thu, Jan 12, 2012 at 07:23:30PM +0200, Alex Netes wrote:
Hi Goldwyn,
On 10:02 Wed 11 Jan , Goldwyn Rodrigues wrote:
Hi Alex,
Let me start with how we encountered the problem:
This problem came up when our customer was using a 2 port card with only
one of the port
From: Roland Dreier rol...@purestorage.com
rds_iw_flush_goal() just returns a count, but it is only called in one
place and its return value is ignored there. So delete all the dead code.
Signed-off-by: Roland Dreier rol...@purestorage.com
---
net/rds/iw_rdma.c | 15 +--
1 files
Seems to have the raw packet QP stuff mixed in now?
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On Thu, Jan 12, 2012 at 9:30 PM, Roland Dreier rol...@kernel.org wrote:
Seems to have the raw packet QP stuff mixed in now?
sorry, my bad, will fix and resend
Or.
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More
The kernel IB stack uses one enumeration for IB speed, which wasn't
explicitly specified in the verbs header file. Add that enum, and
use it all over the code. Note that the IB speed/width notation is
also used by iWARP and IBoE hw drivers who apply the convention of
rate = speed X width, to
On Thu, Jan 12, 2012 at 08:02:52AM -0800, Mike Marciniszyn wrote:
Should whatever this issue is be a general PCI fixup? Like broken MSI,
etc.
Can you point me to some details on this?
I can explain the broken MSI stuff, as an example. As I noted I'm not
sure what you are working around
On Thu, Jan 12, 2012 at 9:17 AM, Mike Marciniszyn
mike.marcinis...@qlogic.com wrote:
Does this work on systems where the broken chipset might
not be the immediate parent of the qib device (ie there are
some PCIe switches in between)?
The code figures this out at the top of routine and
if (parent-vendor != 0x8086)
return 1;
so I guess you don't need another vendor check.
Actually, Jason is right. The vendor check you reference here is in
qib_tune_pcie_coalesce() and not the routine being patched.
A bit of background here is that the issue was
On Thu, Jan 12, 2012 at 02:14:12PM -0800, Mike Marciniszyn wrote:
Actually, Jason is right. The vendor check you reference here is in
qib_tune_pcie_coalesce() and not the routine being patched.
A bit of background here is that the issue was noted with the
indicated Harpertown root complex
It doesn't seem to me like this has any place in the quirks thing
either. Things seem to be working properly, the MaxPayLoad of 128 is
clearly the highest the system will support correctly.
Jason
Probably the best thing to do unwind the module parameter default in 8d4548f2b
which would
Commit 8d4548f2b (IB/qib: Default some module parameters optimally)
introduced an issue with older root complexes. They cannot handle
the pcie_caps of 0x51 (MaxReadReq 4096, MaxPayload=256).
A typical diagnostic in this situation reported by syslog contains
the text:
[PCIe Poisoned TLP][Send
From: Roland Dreier rol...@kernel.org
Date: Thu, 12 Jan 2012 10:57:56 -0800
From: Roland Dreier rol...@purestorage.com
rds_iw_flush_goal() just returns a count, but it is only called in one
place and its return value is ignored there. So delete all the dead code.
Signed-off-by: Roland
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