On Jan 11, 2008 7:05 PM, Peter Stuge [EMAIL PROTECTED] wrote:
On Fri, Jan 11, 2008 at 02:01:22PM -0800, Andon Tschauschev wrote:
info: creating device #8 AweSim Processor
FixIt: Error: Unable to allocate processor model memory.
Aborted
..
mmap(0x54, 2147483648,
On Jan 10, 2008 4:42 AM, Carl-Daniel Hailfinger
[EMAIL PROTECTED] wrote:
On 10.01.2008 12:14, Florentin Demetrescu wrote:
Hi all,
For my part I continue to think that there is a problem with the IO address
decoding into the PCI-LPC bridge in mcp55.. Yinghai, can you help please?
On Dec 28, 2007 9:59 PM, Phani Babu Giddi [EMAIL PROTECTED] wrote:
Hello All,
It appears that the DSDT tables and the related ASL files are present for
few boareds in Linux BIOS. If so how are other boards expected to provide
the required DSDT table. Does it has to be taken care either by the
On Dec 13, 2007 9:01 AM, Marc Jones [EMAIL PROTECTED] wrote:
Marc Jones wrote:
Here is the initial patches for AMD Barcelona support! These patches
provide support for the Barcelona revision Bx. There is still a lot of
work to do as you will see in the FIXME comments. Please focus most
On Dec 13, 2007 2:51 PM, [EMAIL PROTECTED] wrote:
Quoting [EMAIL PROTECTED]:
Quoting Cimino Vittorio [EMAIL PROTECTED]:
Is possible to make a dump of southbridge?
tnx
Yup, lsppci -xxx as root
Sorry only one p
lspci -xxx
normal PCI 256 regs:
lspci -vvxxx
pcie 4096 regs
On Dec 10, 2007 1:19 PM, ron minnich [EMAIL PROTECTED] wrote:
On Dec 10, 2007 10:08 AM, Steve Isaacs [EMAIL PROTECTED] wrote:
This is part of my confusion. I installed a Phoenix BIOS to boot Linux
and be able to run lspci. I have no visibility into what it's (Phoenix
BIOS) design is for
On Dec 10, 2007 1:51 PM, ron minnich [EMAIL PROTECTED] wrote:
On Dec 10, 2007 1:39 PM, yhlu [EMAIL PROTECTED] wrote:
No, you don't need that. I have made it automatically detect that. So
you only need the chain that down to superio.
if my memory is right, the auto detect
On Dec 10, 2007 3:03 PM, ron minnich [EMAIL PROTECTED] wrote:
On Dec 10, 2007 2:52 PM, yhlu [EMAIL PROTECTED] wrote:
On Dec 10, 2007 1:51 PM, ron minnich [EMAIL PROTECTED] wrote:
On Dec 10, 2007 1:39 PM, yhlu [EMAIL PROTECTED] wrote:
No, you don't need that. I have made
whole boot log and your Options.lb in your MB dir ?
YH
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[Patch] mcp55: irq and apic
route device irq through pci bridge instead in mptable.
don't enable pin0 for ioapic of io-4
Signed-off-by: Yinghai Lu [EMAIL PROTECTED]
Index: src/southbridge/nvidia/mcp55/mcp55_lpc.c
===
---
On Dec 5, 2007 3:44 PM, Uwe Hermann [EMAIL PROTECTED] wrote:
On Wed, Dec 05, 2007 at 10:49:52PM +0100, Uwe Hermann wrote:
route device irq through pci bridge instead in mptable.
don't enable pin0 for ioapic of io-4
Please explain in more detail why the change is done and which
On Nov 29, 2007 4:31 PM, Jordan Crouse [EMAIL PROTECTED] wrote:
On 29/11/07 13:58 -0800, ron minnich wrote:
jordan, for SiS we really need to get the point of having an
normal/fallback LAB payload that runs in 2 MB, one MB for each one.
how hard is this? Does buildrom do fallback in
On Nov 30, 2007 4:42 AM, Peter Stuge [EMAIL PROTECTED] wrote:
On Wed, Nov 28, 2007 at 07:14:08PM -0500, Richard Smith wrote:
If I can I'd also like to upgrade the SPI flash part to as big as
the chipset will support and if thats still not big enough to hold
my kernel+rootfs then change to a
On Nov 29, 2007 9:25 PM, Feng, Libo [EMAIL PROTECTED] wrote:
Hi, all,
But the function init_cpus is called before the three functions:
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init();
The trace is sent out from the init_cpus.
that is for next fail reboot.
YH
my own tree have
#if CacheSize 0x8000
/* enable caching for 16K/8K/4K using fixed mtrr */
movl$0x269, %ecx /* fix4k_cc000*/
#if CacheSize == 0x4000
movl$0x06060606, %edx /* WB IO type */
#endif
#if CacheSize == 0x2000
movl$0x0606, %edx
On Nov 21, 2007 12:03 PM, Myles Watson [EMAIL PROTECTED] wrote:
On Wed, Nov 21, 2007 at 12:13:23PM -0700, Myles Watson wrote:
It makes the same changes as mentioned before, but it also uses the
correct kernel image depending on the architecture. mkelfimage
doesn't work with an x86_64
On Nov 21, 2007 3:29 PM, Myles Watson [EMAIL PROTECTED] wrote:
On 11/21/07, yhlu [EMAIL PROTECTED] wrote:
On Nov 21, 2007 12:03 PM, Myles Watson [EMAIL PROTECTED] wrote:
On Wed, Nov 21, 2007 at 12:13:23PM -0700, Myles Watson wrote:
It makes the same changes as mentioned before
On Nov 19, 2007 11:17 AM, ron minnich [EMAIL PROTECTED] wrote:
On Nov 19, 2007 11:16 AM, Linux Bios [EMAIL PROTECTED] wrote:
This appears to be where northbridge is setup and where I would route memory
requests to my memory conrtoller. However it looks to be coded by node_id.
My FPGA would
On Nov 17, 2007 5:40 PM, Peter Stuge [EMAIL PROTECTED] wrote:
On Sat, Nov 17, 2007 at 01:39:33PM -0800, Vlad wrote:
There are at least two super-BIOS implementations that rely on a
tiny Linux kernel loaded from Flash ROM:
Good point.
For LAB I believe Stefan wants to include more drivers
On Nov 16, 2007 4:42 AM, Fridel Fainshtein [EMAIL PROTECTED] wrote:
Etherboot does not work with gcc 4. At least filo part.
As I remember, I found a few strange things like
#if 0 -- original
#define isdigit(c) ((c 0x04) != 0)
#define islower(c) ((c 0x02) != 0)
//#define
On Nov 15, 2007 7:38 AM, Corey Osgood [EMAIL PROTECTED] wrote:
Fridel Fainshtein wrote:
I compared to etherboot and it works there.
In Etherboot there are 2 set of bswap functions:
1) little
2) big
so any reason for not using etherboot with filo or kernel loader?
YH
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On Nov 15, 2007 12:44 PM, Ward Vandewege [EMAIL PROTECTED] wrote:
Hi all,
There is a problem with the ck804 code in the tree when it comes to SATA
support. I've observed this on a tyan s2891, and it has been confirmed by
folks with a sun ultra40.
This patch changes the
On 11/5/07, David Edrich [EMAIL PROTECTED] wrote:
Is anyone working on a Linux BIOS port for any 4 socket Opteron based
SuperMicro board with an HTX slot?
that would be very similar to tyans 2912...
you could talk to your supermicro account about it.
YH
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On 11/5/07, Torsten Duwe [EMAIL PROTECTED] wrote:
This patch makes both PCI slots and the primary PCIe work for me, sort of.
The only downsides are that under heavy usage I lose an interrupt once in a
while, but this might be due to irqpoll.
The other issue is that the graphics card still
Please try to use mcp55 base MB...
if sth is too cheap, it mean some problem there.
YH
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-- Forwarded message --
From: Yu Sheng BAI/ Wen YANG [EMAIL PROTECTED]
Date: Oct 18, 2007 9:45 PM
Subject: Crystal Choir Yellow A Weekly Reminder -- 10/21
To: Jane Li [EMAIL PROTECTED]
Cc: Teacher Hong [EMAIL PROTECTED], [EMAIL PROTECTED]
Dear Yellow A parents,
Hope you had fun
On 10/12/07, Baski [EMAIL PROTECTED] wrote:
If we do not advertise about the CPU info through ACPI in s2881, how come
linux shows all the cpu cores through /proc/cpuinfo?
If it's using mptable, pl. give reference in filo code or wherever it is.
src/mainboard/tyan/s2881/mptable.c
YH
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On 10/5/07, [EMAIL PROTECTED] [EMAIL PROTECTED] wrote:
Hi gentlemens,
Sorry for answering so late, but Im back after 3 sleepless nights so Im under
continuous coffee perfusion simply to stay awake..
Firstly to answer to Yinghai, I didn't use dumpio (I don't know what is
this..). I'm mostly
On 10/5/07, niko [EMAIL PROTECTED] wrote:
Hello there,
I'm in the midst of an upgrade for my server, but I want the entire
thing to run 100% Free Software, including LinuxBIOS. The Tyan S2912
seems to be a perfect match feature/specifications wise for what I am
searching for. I need a dual
On 10/5/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Fri, Oct 05, 2007 at 11:04:29AM -0700, yhlu wrote:
..here's hoping the compatibility list is out of date!
stefan, can you update that!
anything is missed?
I hope we can find another MB
split power plane ( for quad core support
On 10/3/07, kevint [EMAIL PROTECTED] wrote:
Correction: Rev C and Rev E Opteron processors.
good, we could translate hadma code to CAR based code, please check
the serengeti_cheetah...
YH
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On 10/3/07, ron minnich [EMAIL PROTECTED] wrote:
On 10/3/07, Russell Whitaker [EMAIL PROTECTED] wrote:
On Wed, 3 Oct 2007, Morgan Tsai wrote:
Copyright (C) 2007 Morgan Tsai [EMAIL PROTECTED]
Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
Also, your email of Sept 21
On 10/3/07, [EMAIL PROTECTED] [EMAIL PROTECTED] wrote:
I propose:
$(LB)/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
138c138
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x44,/* GPIO39 PCI_GNT3 */
\
---
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x68,/* GPIO39 PCI_GNT3 */
On 9/28/07, ron minnich [EMAIL PROTECTED] wrote:
OK, these mobos are close enough to each other to share most code. Let
me throw out a challenge to this group. Make the bios image that runs
on each board *IDENTICAL*. You can figure out what each board is --
can you tell by which superio it is
On 9/28/07, Corey Osgood [EMAIL PROTECTED] wrote:
subsystem vendor/model ids.
LinuxBIOS is supposed to set up those.
YH
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I would like a way to change the MAC address for a rom image with some tool -
ideally as an option to flashrom, I guess. Keep in mind that there can be
multiple addresses on a board!
1. use flashrom with exclude range to keep the old mac...
2. add some script to read out and mac, and flash
On 9/25/07, [EMAIL PROTECTED] [EMAIL PROTECTED] wrote:
Hi,
This fix still doesn't work for m57sli v2.0..
As promised, I send a log with :
- full debugging log in LinuxBIOS;
Please only set log_level to 8...
- Linux boot messages;
- the result of a lspci -vvv command (inclused at the end
this is a known problem...
Someone found that on Tyan S488X.
YH
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On 9/24/07, ron minnich [EMAIL PROTECTED] wrote:
I think it has to be an AMD laptop. Intel is just not gonna play at
this point, as far as I can tell.
Of course, we have to boot windows or find someone that does not care
about booting windows.
linux laptop as workstation ?
MSI or Arima
On 9/25/07, Ward Vandewege [EMAIL PROTECTED] wrote:
On Tue, Sep 25, 2007 at 12:28:48PM -0700, yhlu wrote:
this is a known problem...
Someone found that on Tyan S488X.
Is there also a solution? Or who should we talk to for a solution?
some bits in ck804_early_setup_car.c...
YH
On 9/25/07, ron minnich [EMAIL PROTECTED] wrote:
On 9/25/07, yhlu [EMAIL PROTECTED] wrote:
this is a known problem...
Someone found that on Tyan S488X.
and solved it? Or just discovered it? I don't understand.
I was supposed to fix that problem..but doesn't have time to compare
On 9/24/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Thu, Sep 20, 2007 at 09:44:33AM -0700, yhlu wrote:
please try to move
RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FF, 0x1900,
from
ctrl_conf_master_only
to
ctrl_conf_mcp55_only
Nice, thanks!
That fixes the problem for me
On 9/21/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Wed, Sep 19, 2007 at 04:30:25PM -0700, yhlu wrote:
On 9/17/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Mon, Sep 17, 2007 at 03:49:46PM -0700, yhlu wrote:
On 9/17/07, Ward Vandewege [EMAIL PROTECTED] wrote:
I've attached that boot
please try to move
RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FF, 0x1900,
from
ctrl_conf_master_only
to
ctrl_conf_mcp55_only
YH
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so it seems the pci device in the slot is not show up in your system...
can you check that with lspci in lb/kernel...?
YH
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On 9/17/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Mon, Sep 17, 2007 at 03:49:46PM -0700, yhlu wrote:
On 9/17/07, Ward Vandewege [EMAIL PROTECTED] wrote:
I've attached that boot log to this message.
the one without any vga card installed?
Can you post one with pcie display card
On 9/16/07, Richard Wei [EMAIL PROTECTED] wrote:
Ha~ it works now after changed to 64bit kernel.
Thanks ^_^
But still wondering why it only support 64bit kernel.
What should we do to make the 32bit kernel support possible?
So could be 32bit kernel problem. you could dig out why the 32bit
1. 64 bit kernel? I never tried 32 bit kernel...
2. nothing to with irq.
3. boot log wht pci_vga card?
YH
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On 9/17/07, Ward Vandewege [EMAIL PROTECTED] wrote:
I've attached that boot log to this message.
the one without any vga card installed?
Can you post one with pcie display card installed and the one with pci
display card installed?
YH
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supposed to use
/* Get the limit (rounded up) */
rend = resource_end(resource);
YH
On 9/15/07, Rudolf Marek [EMAIL PROTECTED] wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hello,
Following patch fixes the resource size, which should be written to register.
On 9/14/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Fri, Sep 14, 2007 at 05:45:18PM +0200, LinuxBIOS information wrote:
Compilation of newisys:khepri has been broken
See the error log at
http://qa.linuxbios.org/log_buildbrd.php?revision=2776device=kheprivendor=newisys
too few registers.
please use 64 bit kernel...
YH
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some months ago, i sent out about one patch about it, but wonder if it
is checked in...you may dig out from list.
or let me find some time to compare the my local tree with public tree.
YH
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On 9/10/07, Marc Jones [EMAIL PROTECTED] wrote:
Barcelona is very similar to the Opteron but does require some new
initialization code.
???
YH
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On 9/11/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
yhlu wrote:
some months ago, i sent out about one patch about it, but wonder if it
is checked in...you may dig out from list.
or let me find some time to compare the my local tree with public tree.
YH
What was the patch about
On 9/8/07, ron minnich [EMAIL PROTECTED] wrote:
On 9/6/07, Ward Vandewege [EMAIL PROTECTED] wrote:
These patches are released under the GPLv2, so we can just include them in
our buildrom tree. Do we need a license header for each file?
This comes from tiny, right? I think since it is a
On 9/7/07, Fridel Fainshtein [EMAIL PROTECTED] wrote:
Hi,
Does quad core opteron needs some special software?
If yes, is there any supporting open source code?
(May be just first steps, cache as ram etc.)
before I was leaving AMD,
1. the code works well in simulator even with 64node...
2. on
On 9/7/07, [EMAIL PROTECTED] [EMAIL PROTECTED] wrote:
Hi all,
Just some little newbee questions:
* What is the romstrap section? Does it have to be located @ a fixed
physical
address?
* What is a SIP table?
you need to access Nvidia NDA info about that...
YH
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it seems your soft-reset never work...
YH
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boot log?
YH
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just provide one fake spd array...
YH
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On 8/18/07, Andreas B. Mundt [EMAIL PROTECTED] wrote:
Hello everybody,
it has been pointed out on the list, that an implementation of ACPI for the
GA-M57SLI-S4 needs to be done in a cleanroom to avoid legal issues.
Is it possible to move the ACPI functionality from the BIOS to the linux
On 8/18/07, Joseph Smith [EMAIL PROTECTED] wrote:
How would I provide a fake spd array? Here is the situation. My board
has the onboard memory without a SPD, I could just hardcode this into
the northbridge raminit.c. But I don't want to do that so people that
may want to use the northbridge
please check if bcm5785 bcm5780 is in the first ht link in your MB Config.lb.
Or send out your MB Config.lb.
YH
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On 7/30/07, Richard Wei [EMAIL PROTECTED] wrote:
I was trying to compile LinuxBIOSv2-2673 for Tyan S2885.
The EVB has only one CPU on board.
Somehow, I got the following message from the console.
The system seems to hang right inside the memreset() function.
And the function seems only to
On 7/30/07, Richard Wei [EMAIL PROTECTED] wrote:
Hmm... I only have one AMD Opteron.
Do I have to configure or rewrite the code
for Hypertransport configuration?
what's your CPU rev? B3 or C0...?
YH
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On 7/30/07, Richard Wei [EMAIL PROTECTED] wrote:
Oh... I check it again.
The information right on the AMD Opteron processor is OSA240CC05AH.
By the last two digit, I think I have Rev. B3.
AD CPUID：Model4ESRev.C0�C0.13um
AG CPUID：Model5(max.1CPU)Rev.B3-0,13umSledgehammer core
AH
On 7/29/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
Peter Stuge wrote:
2. I've lost cpu frequency control (no powernow-k8) so now both my
CPUs are running flat out at 3000 MHz. Core temperatures are
hovering just below 70C (63C and 67C).
I just had a look at
On 7/29/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
* yhlu [EMAIL PROTECTED] [070729 21:23]:
Fixing things that we do wrong in Linux is a bad thing. It will only
help us with Linux and lock out all others. Did we do this whole free
bios thing to make it easier to lock others out? Ouch
On 7/25/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
* john [EMAIL PROTECTED] [070725 03:52]:
Hello,
I managed to boot LinuxBIOS on my M57sli MB but without X. I'm using
the Nvidia proprietary driver. Here's the error message:
(EE) NVIDIA(0): The NVIDIA kernel module does not
On 7/25/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
* yhlu [EMAIL PROTECTED] [070725 21:58]:
On 7/25/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
* yhlu [EMAIL PROTECTED] [070725 17:37]:
I think implementing ACPI for this board would be the best solution to
fix this.
i don't
On 7/5/07, George V. Adamov [EMAIL PROTECTED] wrote:
I have changed the config for MB.
(Actualy I took the config from Gigabyte as base, then changed superIO
chipset to winbond).
are you using tar ball i sent or from public tree?
YH
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gcc version?
try 4.0.2 or 4.1.2 please.
YH
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then linuxbios + tiny kernel with kvm could load other os and other linux.
YH
On 7/3/07, ron minnich [EMAIL PROTECTED] wrote:
we're going to put kvm into flash. Xen is really falling out of favor
and kvm is winning. This was very clear at OLS as I talked to vendors.
ron
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it mean your mem is not initilized properly.
socket AM2 or Socket F? you need to specify that in MB Config.lb
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On 6/27/07, john [EMAIL PROTECTED] wrote:
Hello,
I'm running Fedora 7 with Xen kernel on this motherboard with AMD
6000+ CPU. Virtual Machine Manager tells me Virtualization is disabled
in the BIOS. Originally I was using BIOS version F8. Gigabyte gave me a
beta copy (F9a) but it didn't
On 6/27/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
* yhlu [EMAIL PROTECTED] [070627 18:58]:
for using xen with LinuxBIOS in Rev F and later:
You need to use LinuxBIOS + Kernel + kexec + to load xen.
Why is that? Multiboot?
Can we go the other way round? LinuxBIOS+Xen+DOM0 in the kernel
How about 4.1.2?
YH
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On 6/20/07, Carl-Daniel Hailfinger [EMAIL PROTECTED] wrote:
Yinghai,
can you look at the mail below?
ST/Ward,
can you apply the attached patch and then post a LB boot log on
a GA-M57SLI with BIOS_DEBUG or BIOS_SPEW and additionally dmasg and
lspci -vvvnx from the same boot? This would help
On 6/13/07, Myles Watson [EMAIL PROTECTED] wrote:
I'm using LinuxBIOS on my Tyan s2892. I have a device that maps a lot of
the memory space, but I'm struggling trying to get the Opteron to read and
write to my device in larger blocks. I have set the variable MTRRs in the
device driver to
On 5/31/07, Thomas Ekstrand [EMAIL PROTECTED] wrote:
1. custom board based on the broadcom blast.
2. via PCIX bridge internally in the ht2000
do you change anything with BLAST code in the tree?
the NIC should work, and only some problem with sata, but someone sent
patch for sata already. or
You could use btext console in LinuxBIOS for it. The etherboot (with
filo) should still include btext console too.
YH
On 5/31/07, Jeremy Jackson [EMAIL PROTECTED] wrote:
Hi,
I'm using the LinuxBIOS ragexl support, combined with linux framebuffer
driver atyfb. Doing it this way is 100%
1. Blast based, what doesn't mean?
2. your broadcom is PCIX or PCI-E?
YH
On 5/30/07, Thomas Ekstrand [EMAIL PROTECTED] wrote:
Hi!
I have this error:
--snip--
tg3: eth0: No interrupt was generated using MSI, switching to INTx mode.
Please
report this failure to the PCI maintainer and
try to use mkelfImage to build one elf from your kernel and initrd.
YH
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you may need to update subsystem id in Options.lb later, you are using
tyan 2891 's id.
YH
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On 5/23/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
I think this should be done in mainboard.c
current way is:
you have set_subsystem_id in pci_device ops. there is one default in
pci_device.c that will use default vaule in Options.lb.
the solution will be
make Config.lb take different
NAK.
Already defined src/cpu/amd/socket_AM2/Config.lb.
and your MB Config.lb will include that with
chip cpu/amd/socket_AM2
YH
On 5/21/07, Ward Vandewege [EMAIL PROTECTED] wrote:
Subject says it all...
Thanks,
Ward.
--
Ward Vandewege [EMAIL PROTECTED]
Free Software Foundation - Senior
1204
- -#if 1
+#if 0
//By yhlu for debug Athlon64 939 can do dual channel, but it
. if (unbuffered is_opteron(ctrl)) {
die
Ning,
Try the code in SVN tree, and if it doesn't work, try the tar ball I
sent to this list.
YH
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On 5/16/07, Vincente Tsou [EMAIL PROTECTED] wrote:
Hi,
I have a problem in LinuxBIOS when install Fedora,
First ,my platform is AMD SocketF + HT2100 + HT1000 and I have a bootable
LinuxBIOS already.
It can boot into SATA HD.
But i want to install fedora core 6 into SATA HD from PXE.
When i
1. use smp 64bit kernel.
2. s2865 onboard NIC is in silicon, so please refer irq routing in
s2895 or s2891 etc.
YH
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On 5/16/07, Jeremy Jackson [EMAIL PROTECTED] wrote:
Thanks for the reply, see below:
On Wed, 2007-05-16 at 09:20 -0700, yhlu wrote:
1. use smp 64bit kernel.
I have Ubuntu feisty kernel, 2.6.20-14-generic #2 SMP, which shows 2
CPUs with an AMD Athlon64 X2 4600+. Do I need any other kernel
On 5/16/07, Jeremy Jackson [EMAIL PROTECTED] wrote:
ports 1 and 2 don't detect drives.
known problem
YH
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I made some change, please check it
Acked_by: Yinghai Lu [EMAIL PROTECTED]
YH
On 5/16/07, Ward Vandewege [EMAIL PROTECTED] wrote:
Hi all,
Please find the revised fan control patch for the Tyan s2881 attached.
Everything is now in the tyan/s2881/mainboard.c file.
It works, but the
On 5/14/07, Marc Jones [EMAIL PROTECTED] wrote:
Ward Vandewege wrote:
I'll work on moving the code to mainboard.c file.
Does it make sense to have an API letting the mainboard specific code
interface the component? Maybe even setting the FANs and threshold in
the config.lb file?
I
On 5/14/07, Carl-Daniel Hailfinger [EMAIL PROTECTED] wrote:
Hello Yinghai,
have you tested PCI slot functions on the GA-M57SLI?
I forgot whether PCI cards in PCI slots need a LB config change or
should they work out of the box?
it should work out of the BOX, but irq routting in mptable
On 5/12/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
* Ward Vandewege [EMAIL PROTECTED] [070511 23:35]:
Does it make sense to have an API letting the mainboard specific code
interface the component? Maybe even setting the FANs and threshold in
the config.lb file?
that will be good. to make
On 5/11/07, Ward Vandewege [EMAIL PROTECTED] wrote:
On Tue, May 01, 2007 at 12:59:40PM -0700, yhlu wrote:
I tried adding them to mainboard.c, but that is too early in the process; if
I add a mainboard_init there (hooked into the init action of
mainboard_operations), this code is executed quite
On 5/11/07, Carl-Daniel Hailfinger [EMAIL PROTECTED] wrote:
Hi ST,
On 08.05.2007 22:45, ST wrote:
could someone with a GA-M57SLI please post a lspci -vvvnx to the
list, preferably both under LB and factory BIOS? I'm trying to
verify some code I wrote.
Attached to this mail you will
On 3/12/07, Zeb Whitman [EMAIL PROTECTED] wrote:
supermicro h8qm8-2
( http://www.supermicro.com/Aplus/motherboard/Opteron8000/MCP55/H8QM8-2.cfm )
This one could be supported in several hours. contact with supermicro
sales, they could provide support to you.
tyan s4985
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