: [PATCH 1/7] powerpc/85xx: re-enable timebase sync disabled by
KEXEC patch
On 11/04/2011 07:29 AM, Zhao Chenhui wrote:
From: Li Yang le...@freescale.com
The timebase sync is not only necessary when using KEXEC. It should also
be used by normal boot up and cpu hotplug. Remove the ifdef added
Subject: Re: [PATCH 2/7] powerpc/85xx: add HOTPLUG_CPU support
On 11/04/2011 07:31 AM, Zhao Chenhui wrote:
From: Li Yang le...@freescale.com
Add support to disable and re-enable individual cores at runtime
on MPC85xx/QorIQ SMP machines. Currently support e500 core.
MPC85xx machines use
To: Zhao Chenhui-B35336; linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 3/7] powerpc/85xx: add sleep and deep sleep support
Hi Zhao,
From: Li Yang leoli at freescale.com
Some Freescale chips like MPC8536 and P1022 has deep sleep PM mode in
addtion to the sleep PM mode.
In sleep PM mode
Subject: Re: [PATCH 3/7] powerpc/85xx: add sleep and deep sleep support
On 11/04/2011 07:33 AM, Zhao Chenhui wrote:
+/* Cast the ccsrbar to 64-bit parameter so that the assembly
+ * code can be compatible with both 32-bit 36-bit */
+extern void mpc85xx_enter_deep_sleep(u64 ccsrbar, u32
: [PATCH 5/7] fsl_pmc: update device bindings
On 11/04/2011 07:36 AM, Zhao Chenhui wrote:
From: Li Yang le...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
.../devicetree/bindings/powerpc/fsl/pmc.txt| 63 +++--
--
1 files changed, 36 insertions(+), 27
-Original Message-
From: linuxppc-dev-bounces+leoli=freescale@lists.ozlabs.org
[mailto:linuxppc-dev-bounces+leoli=freescale@lists.ozlabs.org] On
Behalf Of Scott Wood
Sent: Saturday, November 05, 2011 5:14 AM
To: Zhao Chenhui-B35336
Cc: net...@vger.kernel.org;
-Original Message-
From: linuxppc-dev-bounces+leoli=freescale@lists.ozlabs.org
[mailto:linuxppc-dev-bounces+leoli=freescale@lists.ozlabs.org] On
Behalf Of Scott Wood
Sent: Saturday, November 05, 2011 5:14 AM
To: Zhao Chenhui-B35336
Cc: net...@vger.kernel.org;
-Original Message-
From: linuxppc-dev-bounces+leoli=freescale@lists.ozlabs.org
[mailto:linuxppc-dev-bounces+leoli=freescale@lists.ozlabs.org] On
Behalf Of Scott Wood
Sent: Saturday, November 05, 2011 5:12 AM
To: Zhao Chenhui-B35336
Cc: net...@vger.kernel.org;
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, November 09, 2011 4:58 AM
To: Li Yang-R58472
Cc: Wood Scott-B07421; Zhao Chenhui-B35336; linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 2/7] powerpc/85xx: add HOTPLUG_CPU support
On 11/08/2011 04:05 AM, Li Yang-R58472 wrote
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, November 09, 2011 4:40 AM
To: Li Yang-R58472
Cc: Wood Scott-B07421; Zhao Chenhui-B35336; linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 5/7] fsl_pmc: update device bindings
On 11/08/2011 04:56 AM, Li Yang-R58472 wrote:
diff
Cc: linuxppc-dev@lists.ozlabs.org; Li Yang-R58472
Subject: Re: [PATCH v2 2/7] powerpc/85xx: add HOTPLUG_CPU support
On 11/16/2011 03:55 AM, Zhao Chenhui wrote:
+static void __cpuinit smp_85xx_mach_cpu_die(void) {
+unsigned int cpu = smp_processor_id();
+register u32 tmp
-off-by: Peter Chen peter.c...@freescale.com
Acked-by: Li Yang le...@freescale.com
- Leo
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Subject: Re: [PATCH v2 1/7] powerpc/85xx: re-enable timebase sync disabled
by KEXEC patch
On Fri, Nov 18, 2011 at 08:35:02AM -0600, Kumar Gala wrote:
On Nov 16, 2011, at 12:42 PM, Scott Wood wrote:
On 11/16/2011 03:55 AM, Zhao Chenhui wrote:
From: Li Yang le...@freescale.com
Subject: Re: [PATCH] usb/fsl_udc: fix dequeuing a request in progress
On Fri, Nov 11, 2011 at 08:38:13PM +0800, Li Yang wrote:
The original implementation of dequeuing a request in progress is not
correct. Change to use a correct process and also clean up the
related functions a little bit
-Original Message-
From: Peter Chen [mailto:hzpeterc...@gmail.com]
Sent: Wednesday, November 23, 2011 11:02 AM
To: Li Yang-R58472
Cc: Chen Peter-B29397; ba...@ti.com; gre...@suse.de; linux-
u...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] usb/fsl_udc: fix
2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
them to a large buffer.
Signed-off-by: Liu Shuo b35...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
drivers/mtd/nand/fsl_elbc_nand.c | 211
+++---
1 files changed, 194 insertions
Subject: Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support
large-page Nand chip
On Thu, 2011-11-24 at 08:41 +0800, b35...@freescale.com wrote:
+ /*
+* Freescale FCM controller has a 2K size limitation of
buffer
+* RAM, so
-Original Message-
From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
Sent: 2011年11月23日 2:59
To: Shi Xuelin-B29237
Cc: dan.j.willi...@intel.com; Li Yang-R58472; z...@zh-kernel.org;
vinod.k...@intel.com; linuxppc-dev@lists.ozlabs.org;
linux-ker...@vger.kernel.org
Subject: Re: [PATCH
-Original Message-
From: Artem Bityutskiy [mailto:dedeki...@gmail.com]
Sent: Wednesday, November 30, 2011 4:51 PM
To: Kumar Gala
Cc: Wood Scott-B07421; Li Yang-R58472; Liu Shuo-B35362; linux-
ker...@vger.kernel.org Kernel; linux-...@lists.infradead.org; Andrew
Morton; David Woodhouse
-Original Message-
From: Paul Gortmaker [mailto:paul.gortma...@windriver.com]
Sent: Friday, February 03, 2012 6:42 AM
To: Li Yang-R58472
Cc: net...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
Subject: [RFC] Multi queue support in ethernet/freescale/ucc_geth.c
Hi Li,
Hi Paul
I tried a debian install on the p5020ds here and I find SATA to be
extremely slow, generating millions of interrupts. I think the defaults
should be a lot more aggressive at coalescing.
The P5020 has a hardware problem with SATA, making it generate more interrupts
than it should. A new revision
Subject: Re: [PATCH 1/2] powerpc/85xx: fix problem that prevents
PHYS_64BIT from configurable
On Feb 16, 2012, at 6:10 AM, Li Yang wrote:
Fix the problem that large physical address support cannot be disabled
when some platforms which only provides 36-bit support are selected.
According
Subject: Re: [PATCH] powerpc/85xx: allow CONFIG_PHYS_64BIT to be
selectable
Huang Changming-R66093 wrote:
I have one similar patch to remove the select PHYS_64BIT.
http://patchwork.ozlabs.org/patch/132351/
That one doesn't update the defconfigs, which means that the default
-Original Message-
From: Tabi Timur-B04825
Sent: Friday, February 24, 2012 10:46 AM
To: Li Yang-R58472
Cc: Huang Changming-R66093; ga...@kernel.crashing.org;
b...@kernel.crashing.org; Wood Scott-B07421; linuxppc-...@ozlabs.org
Subject: Re: [PATCH] powerpc/85xx: allow
Subject: Re: [PATCH] powerpc/85xx: allow CONFIG_PHYS_64BIT to be
selectable
Li Yang-R58472 wrote:
Even though the user still need to know the addressing mode that
u-boot is using. It won't work if the addressing mode of u-boot and
device tree are different.
U-Boot will tell
Subject: Re: [PATCH] powerpc/85xx: allow CONFIG_PHYS_64BIT to be
selectable
Li Yang-R58472 wrote:
The mpc85xx_defconfig does include silicons with e500v1 core which
doesn't have the 36-bit support. Won't enabling 36-bit support by
default break the support for them
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