On 2010-11-11 19:34, Peter Stuge wrote:
/ Freddie Chopin wrote:
// If no SRST pin is available, Cortex-M3 soft-reset is required,
//
// How common is this case?
//
// How common is what? Lack of SRST?
//
// Yes?
/
For me such situations are almost impossible, but some strange and
bizarre policy
On 11/11/2010 22:26, Freddie Chopin wrote:
On 2010-11-11 20:47, Spencer Oliver wrote:
I disagree with this patch as SYSTEMRESET is not supported as expected
on all cores.
Shouldn't the code assume that this standard mechanism works as the
standard says? If some chip does not support it, than
On 2010-11-12 09:21, Laurent Gauch wrote:
I (and many other people) like to use OpenOCD with just command-line
parameters, like this:
openocd -f interface/... -f target/...
It worked fine, and that was very cool, because one does not need to
prepare millions of config files for each project /
Freddie Chopin wrote:
I like to use OpenOCD with just command-line parameters
..
Yes VERY cool, and a part of the success of OpenOCD !
So we have to keep it that way!
I don't think that anyone has ever protested against this. Personally
I don't like this way of running openocd at all, but
Spencer Oliver wrote:
Shouldn't the code assume that this standard mechanism works as the
standard says?
The standard as you call it says the behaviour is implementation
defined for both.
That's very clear for me.. The solution in OpenOCD will then be to
assume nothing, and always require
The default option should be the safe option an *all* cores.
Is there one?
VECTRESET is reliable from all cores i have tested - which is pretty
much all available/nda cm3 cores.
It just has the negative that it is core only reset.
I am happy todo some work on this - finding the spare
Freddie Chopin wrote:
My perception of the situation is strongly the opposite. There is no
policy, relax, there is just people working together making something
generic that works. This is a difficult task.
I cannot agree, as there were many discussions about whether
reset_config should be
Spencer Oliver wrote:
The default option should be the safe option an *all* cores.
Is there one?
VECTRESET is reliable from all cores i have tested - which is
pretty much all available/nda cm3 cores.
Aha! What about the 'implementation defined' part though?
It just has the negative that
On 2010-11-12 17:46, Laurent Gauch wrote:
I think you indicated that you like to use Cygwin?
I do not like Cygwin at all, but I HAVE TO use it ;-( to build openocd
on Windows
I don't build OpenOCD on Windows, but rather cross-compile it on Linux,
which I actually have in a virtual machine
On 12/11/2010 16:26, Peter Stuge wrote:
Spencer Oliver wrote:
The default option should be the safe option an *all* cores.
Is there one?
VECTRESET is reliable from all cores i have tested - which is
pretty much all available/nda cm3 cores.
Aha! What about the 'implementation defined' part
Hi!
This patch changes the default behaviour of Cortex-M3 soft-reset. More
details can be found in thread STM32 reset_config.
I've tested that with STM32 - everything works fine, peripherals are
reset as they should be (with standard cfg files).
4\/3!!
From
Freddie Chopin wrote:
If no SRST pin is available, Cortex-M3 soft-reset is required,
How common is this case?
so use SYSRESETREQ by default.
Default instead of SRST, or default instead of VECTRESET?
//Peter
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Openocd-development mailing list
On 2010-11-11 17:51, Peter Stuge wrote:
Freddie Chopin wrote:
If no SRST pin is available, Cortex-M3 soft-reset is required,
How common is this case?
How common is what? Lack of SRST?
so use SYSRESETREQ by default.
Default instead of SRST, or default instead of VECTRESET?
Instead of
Freddie Chopin wrote:
If no SRST pin is available, Cortex-M3 soft-reset is required,
How common is this case?
How common is what? Lack of SRST?
Yes?
so use SYSRESETREQ by default.
Default instead of SRST, or default instead of VECTRESET?
Instead of VECTRESET,
Ok.
If SRST is
On 11/11/2010 11:00, Freddie Chopin wrote:
Hi!
This patch changes the default behaviour of Cortex-M3 soft-reset. More
details can be found in thread STM32 reset_config.
I've tested that with STM32 - everything works fine, peripherals are
reset as they should be (with standard cfg files).
On 2010-11-11 19:34, Peter Stuge wrote:
Freddie Chopin wrote:
If no SRST pin is available, Cortex-M3 soft-reset is required,
How common is this case?
How common is what? Lack of SRST?
Yes?
For me such situations are almost impossible, but some strange and
bizarre policy makes default
On 2010-11-11 20:47, Spencer Oliver wrote:
I disagree with this patch as SYSTEMRESET is not supported as expected
on all cores.
Shouldn't the code assume that this standard mechanism works as the
standard says? If some chip does not support it, than this chip should
have VECTRESET selected
Freddie Chopin wrote:
How common is what? Lack of SRST?
Yes?
For me such situations are almost impossible,
Impossible? Weird measure of common. :)
but some strange and bizarre policy makes default target file for
stm32 tell OpenOCD there is no reset at all...
My perception of the
On 2010-11-12 00:05, Peter Stuge wrote:
My perception of the situation is strongly the opposite. There is no
policy, relax, there is just people working together making something
generic that works. This is a difficult task.
I cannot agree, as there were many discussions about whether
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