> On 30-Jan-2024, at 22:07, Greg Kurz wrote:
>
> error_printf() doesn't add newlines.
>
> Signed-off-by: Greg Kurz
Reviewed-by: Ani Sinha
> ---
> hw/loongarch/acpi-build.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acp
This object represents the PLLs and their channels. The PLLs allow for a
more fine-grained control of the clocks frequency.
Wasn't sure about how to handle the reset and the migration so used the
same appproach as the BCM2835 CPRMAN.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
On Sat, 27 Jan 2024 at 20:30, Jan Klötzke wrote:
>
> Debug exceptions that target AArch32 Hyp mode are reported differently
> than on AAarch64. Internally, Qemu uses the AArch64 syndromes. Therefore
> such exceptions need to be either converted to a prefetch abort
> (breakpoints, vector catch) or
On Tue, Jan 30, 2024 at 10:14:28PM +0530, Ani Sinha wrote:
> Since commit f10a570b093e6 ("KVM: x86: Add CONFIG_KVM_MAX_NR_VCPUS to allow
> up to 4096 vCPUs")
> Linux kernel can support upto a maximum number of 4096 vCPUS when MAXSMP is
> enabled in the kernel. QEMU has been tested to correctly boo
Since commit f10a570b093e6 ("KVM: x86: Add CONFIG_KVM_MAX_NR_VCPUS to allow up
to 4096 vCPUs")
Linux kernel can support upto a maximum number of 4096 vCPUS when MAXSMP is
enabled in the kernel. QEMU has been tested to correctly boot a linux guest
with 1728 vcpus both with edk2 and seabios firmware
On 1/30/24 18:52, Alex Bennée wrote:
Pierrick Bouvier writes:
On 1/26/24 20:05, Alex Bennée wrote:
Pierrick Bouvier writes:
For now, it simply performs instruction, bb and mem count, and ensure
that inline vs callback versions have the same result. Later, we'll
extend it when new inline op
error_printf() doesn't add newlines.
Signed-off-by: Greg Kurz
---
hw/i386/acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index edc979379c03..e990b0ae927f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
ACPI build for ARM, i386 and Loongarch all have the
same warning report with a hint for the user. The
hint is printed with error_printf() as expected but
it lacks the terminating '\n'.
v2:
- s/error_fprintf/error_printf in commit logs (Ani)
Greg Kurz (3):
hw/i386: Add `\n` to hint message
hw/
error_printf() doesn't add newlines.
Signed-off-by: Greg Kurz
---
hw/arm/virt-acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 17aeec7a6f56..48febde1ccd1 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/v
error_printf() doesn't add newlines.
Signed-off-by: Greg Kurz
---
hw/loongarch/acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index 730bc4a748c4..a1c419874123 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/l
On Mon, Jan 29, 2024 at 05:44:43PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Mon, 29 Jan 2024 17:44:43 +0100
> From: Philippe Mathieu-Daudé
> Subject: [PATCH v3 01/29] bulk: Access existing variables initialized to
> &S->F when available
> X-Mailer: git-send-email 2.41.0
>
> When a variable i
Add the necessary files to add a simple RCC implementation with just
reads from and writes to registers. Also instanciate the RCC in the
STM32L4x5_SoC. It is needed for accurate emulation of all the SoC
clocks and timers.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
MAINTAINERS
Update the RCC state and propagate frequency changes when writing to the
RCC registers. Currently, ICSCR, CIER, the reset registers and the stop
mode registers are not implemented.
Some fields have not been implemented due to uncertainty about
how to handle them (Like the clock security system or
This object is used to represent every multiplexer in the clock tree as
well as every clock output, every presecaler, frequency multiplier, etc.
This allows to use a generic approach for every component of the clock tree
(except the PLLs).
Wasn't sure about how to handle the reset and the migratio
Now that we can generate reliable clock frequencies from the RCC, remove
the hacky definition of the sysclk in the b_l475e_iot01a initialisation
code and use the correct RCC clock.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/arm/b-l475e-iot01a.c| 10 +-
hw/arm
This patch adds the STM32L4x5 RCC (Reset and Clock Control) device and is part
of a series implementing the STM32L4x5 with a few peripherals.
Due to the high number of lines, I tried to split the patch into several
independent commits.
Each commit compiles on its own but I had to add temporary wo
On Mon, Jan 29, 2024 at 05:44:56PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Mon, 29 Jan 2024 17:44:56 +0100
> From: Philippe Mathieu-Daudé
> Subject: [PATCH v3 14/29] target/i386: Prefer fast cpu_env() over slower
> CPU QOM cast macro
> X-Mailer: git-send-email 2.41.0
>
> Mechanical patch pr
Instanciate the whole clock tree and using the Clock multiplexers and
the PLLs defined in the previous commits. This allows to statically
define the clock tree and easily follow the clock signal from one end to
another.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/misc/stm32l4
> On 30-Jan-2024, at 21:26, Greg Kurz wrote:
>
> error_fprintf() doesn't add newlines.
^
Should be error_printf(). Ditto for other patches.
>
> Signed-off-by: Greg Kurz
> ---
> hw/i386/acpi-build.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
Tests:
- the ability to change the sysclk of the device
- the ability to enable/disable/configure the PLLs
- if the clock multiplexers work
- the register flags and the generation of irqs
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
tests/qtest/meson.build | 3 +-
test
Add write protections for the fields in the CR register.
PLL configuration write protections (among others) have not
been handled yet. This is planned in a future patch set.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/misc/stm32l4x5_rcc.c | 164 ---
error_fprintf() doesn't add newlines.
Signed-off-by: Greg Kurz
---
hw/arm/virt-acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 17aeec7a6f56..48febde1ccd1 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/
ACPI build for ARM, i386 and Loongarch all have the
same warning report with a hint for the user. The
hint is printed with error_printf() as expected but
it lacks the terminating '\n'.
Greg Kurz (3):
hw/i386: Add `\n` to hint message
hw/loongarch: Add `\n` to hint message
hw/arm: Add `\n` to
error_fprintf() doesn't add newlines.
Signed-off-by: Greg Kurz
---
hw/i386/acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index edc979379c03..e990b0ae927f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.
error_fprintf() doesn't add newlines.
Signed-off-by: Greg Kurz
---
hw/loongarch/acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index 730bc4a748c4..a1c419874123 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/
Peter Xu writes:
> On Mon, Jan 29, 2024 at 09:42:24AM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Fri, Jan 26, 2024 at 07:19:39PM -0300, Fabiano Rosas wrote:
>> >> +static MultiFDMethods multifd_socket_ops = {
>> >> +.send_setup = multifd_socket_send_setup,
>> >> +.send_c
Manos Pitsidianakis writes:
> On Tue, 30 Jan 2024 12:15, "Daniel P. Berrangé" wrote:
>>On Tue, Jan 30, 2024 at 12:11:07PM +0200, Manos Pitsidianakis wrote:
>>> Check if a file argument is a cover letter patch produced by
>>> git-format-patch --cover-letter; It is initialized with subject suffix
Similarly to commits dadbb58f59..5ae79fe825 for other ARM boards,
connect FIQ output of the GIC CPU interfaces to the CPU.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/xilinx_zynq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 66d0de
On Tue, 30 Jan 2024 at 15:11, Alex Bennée wrote:
> I suspect the problem is that checkpatch.pl is an import from the Linux
> source tree which has since had syncs with its upstream as well as a
> slew of QEMU specific patches. If we don't care about tracking upstream
> anymore we could bite the bu
When the Rutabaga GPU device frees resources, it calls
rutabaga_resource_unref for that resource_id. However, when the generic
VirtIOGPU functions destroys resources, it only removes the
virtio_gpu_simple_resource from the device's VirtIOGPU->reslist list.
The rutabaga resource associated with that
Philippe Mathieu-Daudé writes:
> Missed during commit d537cf6c86 ("Unify IRQ handling")
> when qemu_irq typedef was introduced for IRQState.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
When destroying/unrefing resources, devices such as virtio-gpu-rutabaga
need to do their own bookkeeping (free rutabaga resources that are
associated with the virtio_gpu_simple_resource).
This commit adds a class method so that virtio-gpu-rutabaga can override
it in the next commit.
Reviewed-by:
While the VirtioGPU type has a reset_bh field to specify a reset
callback, it's never used. virtio_gpu_reset() calls the general
virtio_gpu_reset_bh() function for all devices that inherit from
VirtioGPU.
While no devices override reset_bh at the moment, a device reset might
require special logic
While testing the rutabaga gpu device, we noticed that if the device is
reset, it stops working and complains about missing resource ids. A
quick investigation discovered that the generic VirtIOGPU implementation
frees all resources, but for Rutabaga, they are tied with rutabaga
objects that need t
Pierrick Bouvier writes:
> On 1/26/24 20:05, Alex Bennée wrote:
>> Pierrick Bouvier writes:
>>
>>> For now, it simply performs instruction, bb and mem count, and ensure
>>> that inline vs callback versions have the same result. Later, we'll
>>> extend it when new inline operations are added.
>>
On Tue, Jan 30, 2024 at 12:31 PM Philippe Mathieu-Daudé
wrote:
>
> Since commit b04d989054 ("SPARC: Emulation of Leon3") the
> main_cpu_reset() handler sets both pc/npc when the CPU is
> reset, after the machine is realized. It is pointless to
> set it in leon3_generic_hw_init().
>
> Signed-off-by
On Tue, Jan 30, 2024 at 12:31 PM Philippe Mathieu-Daudé
wrote:
>
> CPUSPARCState::irq_manager holds a pointer to a QDev,
> so declare it as DeviceState instead of void.
>
> Move the comment about Leon3 fields.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/sparc/cpu.h | 5 ++---
> 1 fi
On Tue, Jan 30, 2024 at 12:43 PM Philippe Mathieu-Daudé
wrote:
>
> Hi Clément,
>
> On 16/1/24 14:02, Clément Chigot wrote:
> > This allows to register more than one CPU on the leon3_generic machine.
> >
> > Co-developed-by: Frederic Konrad
> > Signed-off-by: Clément Chigot
> > ---
> > hw/sparc
Peter Xu writes:
> On Mon, Jan 29, 2024 at 10:44:46AM -0300, Fabiano Rosas wrote:
>> > Since we're at it, I would also like to know how you think about whether we
>> > should still suggest people using VMSD versioning, as we know that it won't
>> > work for backward migrations.
>> >
>> > My curre
In case of migration, during restore operation, qemu checks the config space of
the pci device with the config space
in the migration stream captured during save operation. In case of config space
data mismatch, restore operation is failed.
config space check is done in function get_pci_config_d
On Tue, Jan 02, 2024 at 12:58:08PM +1100, Richard Henderson wrote:
> Since alpha binaries are generally built for multiple
> page sizes, it is trivial to allow the page size to vary.
>
> Signed-off-by: Richard Henderson
> ---
> target/alpha/cpu-param.h | 16 ++--
> 1 file changed, 14
On Tue, Jan 02, 2024 at 12:58:07PM +1100, Richard Henderson wrote:
> Since ppc binaries are generally built for multiple
> page sizes, it is trivial to allow the page size to vary.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> target/ppc/cpu-param.h | 9
On Tue, 30 Jan 2024 at 15:10, Marc-André Lureau
wrote:
>
> Hi
>
> On Tue, Jan 30, 2024 at 5:01 PM Manos Pitsidianakis
> wrote:
> >
> > On Tue, 30 Jan 2024 at 14:50, Marc-André Lureau
> > wrote:
> > >
> > > Hi
> > >
> > > On Mon, Jan 29, 2024 at 7:46 PM Manos Pitsidianakis
> > > wrote:
> > > >
>
On Tue, Jan 02, 2024 at 12:58:06PM +1100, Richard Henderson wrote:
> Bizzarely, it is possible to set /proc/sys/vm/mmap_min_addr
> to a value below the host page size. Fix that.
>
> Signed-off-by: Richard Henderson
> ---
> linux-user/main.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-
On Tue, Jan 02, 2024 at 12:58:04PM +1100, Richard Henderson wrote:
> If set, match the host and guest page sizes.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> linux-user/main.c | 16 +---
> 1 file changed, 13 insertions(+), 3 deletions(-)
[...]
On Tue, Jan 30, 2024 at 11:14:59AM +0100, Igor Mammedov wrote:
> On Thu, 6 Jul 2023 13:49:49 +0800
> Tao Su wrote:
>
> > The GraniteRapids CPU model mainly adds the following new features
> > based on SapphireRapids:
> > - PREFETCHITI CPUID.(EAX=7,ECX=1):EDX[bit 14]
> > - AMX-FP16 CPUID.(EAX=7,E
Ilya Leoshkevich writes:
> Make sure that qemu gdbstub, like gdbserver, allows reading from and
> writing to PROT_NONE pages.
>
> Signed-off-by: Ilya Leoshkevich
Acked-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Ilya Leoshkevich writes:
> Both the report() function as well as the initial gdbstub test sequence
> are copy-pasted into ~10 files with slight modifications. This
> indicates that they are indeed generic, so factor them out. While
> at it, add a few newlines to make the formatting closer to PEP-
On Tue, Jan 02, 2024 at 12:58:03PM +1100, Richard Henderson wrote:
> Dynamically size the node for the runtime target page size.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/user-exec.c | 13 -
> 1 file changed, 8 insertions(+), 5 dele
On Tue, Jan 02, 2024 at 12:58:02PM +1100, Richard Henderson wrote:
> Move qemu_host_page_{size,mask} and HOST_PAGE_ALIGN into bsd-user.
> It should be removed from bsd-user as well, but defer that cleanup.
>
> Reviewed-by: Warner Losh
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richar
On Tue, Jan 02, 2024 at 12:58:01PM +1100, Richard Henderson wrote:
> This option controls the host page size. From the mis-usage in
> our own testsuite, this is easily confused with guest page size.
>
> The only thing that occurs when changing the host page size is
> that stuff breaks, because on
On Tue, Jan 02, 2024 at 12:58:00PM +1100, Richard Henderson wrote:
> When guest page size > host page size, this test can fail
> due to the SIGBUS protection hack. Avoid this by making
> sure that the file size is at least one guest page.
Maybe also mention PAGE_PASSTHROUGH?
> Visible with alpha
On 30/01/24, Richard Henderson wrote:
> While the primary use of mmu_index is for the softmmu index for
> system-mode tcg, it has a secondary use in encoding cpu state for
> the page table walker, and thus depending on the target may also
> be used by memory_rw_debug with kvm et al.
>
> This is wh
Hi
On Tue, Jan 30, 2024 at 5:01 PM Manos Pitsidianakis
wrote:
>
> On Tue, 30 Jan 2024 at 14:50, Marc-André Lureau
> wrote:
> >
> > Hi
> >
> > On Mon, Jan 29, 2024 at 7:46 PM Manos Pitsidianakis
> > wrote:
> > >
> > > When the Rutabaga GPU device frees resources, it calls
> > > rutabaga_resource
On Mon, 29 Jan 2024 17:44:56 +0100
Philippe Mathieu-Daudé wrote:
> Mechanical patch produced running the command documented
> in scripts/coccinelle/cpu_env.cocci_template header.
commenting here since, I'm not expert on coccinelle scripts.
On negative side we are permanently loosing type check
On Tue, 30 Jan 2024 at 14:50, Marc-André Lureau
wrote:
>
> Hi
>
> On Mon, Jan 29, 2024 at 7:46 PM Manos Pitsidianakis
> wrote:
> >
> > When the Rutabaga GPU device frees resources, it calls
> > rutabaga_resource_unref for that resource_id. However, when the generic
> > VirtIOGPU functions destroy
Am 30. Januar 2024 07:48:50 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 29/1/24 21:26, Paolo Bonzini wrote:
>> On Mon, Jan 29, 2024 at 8:49 PM Bernhard Beschow wrote:
>>> Don't we prefer a macro for below code? While touching the code we could
>>> use it. (Sorry I can't recall its name from th
On Tue, 30 Jan 2024, Philippe Mathieu-Daudé wrote:
On 3/11/23 18:38, Richard Henderson wrote:
This field is read-only. It is easier to store it separately
and merge it only upon read.
While we're at it, use FSR_VER_SHIFT to initialize fpu_version.
Signed-off-by: Richard Henderson
---
targe
On Tue, Jan 30, 2024 at 03:30:13AM +, JeeHeng Sia wrote:
...
> > Sharing code is good, but if we have to parametrize the entire table, then
> > we might as well keep Arm and RISCV separate. Building the table first
> > with this struct, just to have it built again with the build_append API,
> >
Hi
On Mon, Jan 29, 2024 at 7:46 PM Manos Pitsidianakis
wrote:
>
> When the Rutabaga GPU device frees resources, it calls
> rutabaga_resource_unref for that resource_id. However, when the generic
> VirtIOGPU functions destroys resources, it only removes the
> virtio_gpu_simple_resource from the de
Hi
On Mon, Jan 29, 2024 at 7:46 PM Manos Pitsidianakis
wrote:
>
> When destroying/unrefing resources, devices such as virtio-gpu-rutabaga
> need to do their own bookkeeping (free rutabaga resources that are
> associated with the virtio_gpu_simple_resource).
>
> This commit adds a class method so
With GCC 14 the code failed to compile on i686 (and was wrong for any
version of GCC):
../block/blkio.c: In function ‘blkio_file_open’:
../block/blkio.c:857:28: error: passing argument 3 of ‘blkio_get_uint64’ from
incompatible pointer type [-Wincompatible-pointer-types]
857 |
On Tue, Jan 30, 2024 at 10:15 AM Philippe Mathieu-Daudé
wrote:
>
> On 16/1/24 14:02, Clément Chigot wrote:
> > Now that SMP is possible, the asr17 must be checked in the little boot code
> > or the secondary CPU will reinitialize the Timer and the Uart.
> >
> > Co-developed-by: Frederic Konrad
>
On Tue, Jan 30, 2024 at 03:16:34AM +, JeeHeng Sia wrote:
...
> > I think either there should be a comment that this supports only v2 of
> > SPCR spec or it should be able to create SPCR of any version. IMO, I
> > think it is better to add support till v4 (latest). Since consumers like
> > Linux
On Mon, Jan 29, 2024 at 8:40 PM Stefan Hajnoczi wrote:
>
> On Mon, 29 Jan 2024 at 13:53, Eugenio Perez Martin
> wrote:
> >
> > On Mon, Jan 15, 2024 at 5:33 PM Stefan Hajnoczi wrote:
> > >
> > > Dear QEMU and KVM communities,
> > > QEMU will apply for the Google Summer of Code and Outreachy inte
On Tue, Jan 30, 2024 at 01:04:46PM +0100, Kevin Wolf wrote:
> Am 30.01.2024 um 11:30 hat Richard W.M. Jones geschrieben:
> > On Tue, Jan 30, 2024 at 09:51:59AM +0100, Kevin Wolf wrote:
> > > Am 29.01.2024 um 19:53 hat Richard W.M. Jones geschrieben:
> > > > With GCC 14 the code failed to compile on
Am 30.01.2024 um 11:30 hat Richard W.M. Jones geschrieben:
> On Tue, Jan 30, 2024 at 09:51:59AM +0100, Kevin Wolf wrote:
> > Am 29.01.2024 um 19:53 hat Richard W.M. Jones geschrieben:
> > > With GCC 14 the code failed to compile on i686 (and was wrong for any
> > > version of GCC):
> > >
> > > ../
On 30/1/24 12:30, Peter Maydell wrote:
On Tue, 30 Jan 2024 at 11:24, Philippe Mathieu-Daudé wrote:
Hi Manos,
On 30/1/24 12:02, Manos Pitsidianakis wrote:
On Tue, 30 Jan 2024 at 12:57, Peter Maydell wrote:
On Tue, 30 Jan 2024 at 10:51, Manos Pitsidianakis
wrote:
On Tue, 30 Jan 2024 at 1
On 16/1/24 14:02, Clément Chigot wrote:
V2 modifications
- Patch1: Add SPDX copyright tags.
- Patch3: Add defines for MP_STATUS fields. Improve comments.
- Patch4: Improve a comment.
- Patch6: Dropped as already merged.
---
This series allows leon3 emulations to record up 4 CPUs.
It re
On 16/1/24 14:02, Clément Chigot wrote:
This allows to register more than one CPU on the leon3_generic machine.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/sparc/leon3.c | 106 +--
1 file changed, 74 insertions(+), 32 del
On 16/1/24 14:02, Clément Chigot wrote:
This implements the multiprocessor status register in grlib-irqmp and bind
it to a start signal, which will be later wired in leon3-generic to
start a cpu.
The EIRQ and BA bits are not implemented.
Based on https://gaisler.com/doc/gr712rc-usermanual.pdf,
On 16/1/24 14:02, Clément Chigot wrote:
This allows the guest program to know its cpu id.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
Reviewed-by: Richard Henderson
---
target/sparc/helper.c| 16
target/sparc/helper.h| 1 +
target/sparc/transla
On Tue, Jan 30, 2024 at 12:12 PM LIU Zhiwei
wrote:
>
> thead-c906 uses some flags in pte [60-63] bits. It has history reasons that
> SVPBMT didn't exist when thead-c906 came to world.
>
> We named this feature as xtheadmaee. this feature is controlled by an custom
> CSR named mxstatus, whose maee
Hi Clément,
On 16/1/24 14:02, Clément Chigot wrote:
This allows to register more than one CPU on the leon3_generic machine.
Co-developed-by: Frederic Konrad
Signed-off-by: Clément Chigot
---
hw/sparc/leon3.c | 106 +--
1 file changed, 74 insertio
CPUSPARCState::irq_manager holds a pointer to a QDev,
so declare it as DeviceState instead of void.
Move the comment about Leon3 fields.
Signed-off-by: Philippe Mathieu-Daudé
---
target/sparc/cpu.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/sparc/cpu.h b/tar
Since commit b04d989054 ("SPARC: Emulation of Leon3") the
main_cpu_reset() handler sets both pc/npc when the CPU is
reset, after the machine is realized. It is pointless to
set it in leon3_generic_hw_init().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sparc/leon3.c | 2 --
1 file changed, 2 del
Minor cleanups noticed while reviewing Clément series:
https://lore.kernel.org/qemu-devel/20240116130213.172358-1-chi...@adacore.com/
Philippe Mathieu-Daudé (2):
target/sparc: Provide hint about CPUSPARCState::irq_manager member
hw/sparc/leon3: Remove duplicated code
target/sparc/cpu.h | 5 +
On Tue, 30 Jan 2024 at 11:24, Philippe Mathieu-Daudé wrote:
>
> Hi Manos,
>
> On 30/1/24 12:02, Manos Pitsidianakis wrote:
> > On Tue, 30 Jan 2024 at 12:57, Peter Maydell
> > wrote:
> >>
> >> On Tue, 30 Jan 2024 at 10:51, Manos Pitsidianakis
> >> wrote:
> >>>
> >>> On Tue, 30 Jan 2024 at 12:42,
On 30/1/24 12:05, Richard Henderson wrote:
On 1/30/24 18:26, Philippe Mathieu-Daudé wrote:
What is the rationale here? (I'm trying to generically understand
in which case one is better than another).
Didn't you ask Anton why a generic cpu_* function was using CPUArchState?
Anyway, I think we'
On 30/1/24 12:02, Richard Henderson wrote:
On 1/30/24 18:20, Philippe Mathieu-Daudé wrote:
Can the index ever be negative?
No.
Then why not return an unsigned type?
The existing function didn't, and I didn't think about it.
Does it really matter?
No :)
On Tue, Jan 30, 2024 at 04:59:53PM +0800, lixianglai wrote:
> Hi Andrea:
>
> I'm sorry for taking so long to reply you!
No worries. In the meantime, I've been busy working on some of the
enhancements the the libvirt code structure that I've mentioned
during the previous round of review, and th
Hi Manos,
On 30/1/24 12:02, Manos Pitsidianakis wrote:
On Tue, 30 Jan 2024 at 12:57, Peter Maydell wrote:
On Tue, 30 Jan 2024 at 10:51, Manos Pitsidianakis
wrote:
On Tue, 30 Jan 2024 at 12:42, Peter Maydell wrote:
On Tue, 30 Jan 2024 at 10:39, Manos Pitsidianakis
wrote:
On Tue, 30 Ja
thead-c906 uses some flags in pte [60-63] bits. It has history reasons that
SVPBMT didn't exist when thead-c906 came to world.
We named this feature as xtheadmaee. this feature is controlled by an custom
CSR named mxstatus, whose maee field encodes whether enable the pte [60-63]
bits.
The sectio
riscv specification allows custom CSRs in decode area. So we should
register all vendor CSRs in cpu realize stage.
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu.c | 3 +++
target/riscv/tcg/tcg-cpu.c | 26 ++
target/riscv/tcg/tcg-cpu.h | 1 +
3 files changed, 30
We first add a framework for vendor CSRs in patch 1. After that we add
one thead-c906 CSR mxstatus, which is used for mmu extension xtheadmaee.
This patch set fix the regression on kernel pointed by Björn Töpel in
https://www.mail-archive.com/qemu-devel@nongnu.org/msg1018232.html.
LIU Zhiwei (2):
Missed during commit d537cf6c86 ("Unify IRQ handling")
when qemu_irq typedef was introduced for IRQState.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 1163a71f3c..74408c
On 1/30/24 14:23, Alex Bennée wrote:
Pierrick Bouvier writes:
On 1/26/24 19:14, Alex Bennée wrote:
Pierrick Bouvier writes:
We introduce a cpu local storage, automatically managed (and extended)
by QEMU itself. Plugin allocate a scoreboard, and don't have to deal
with how many cpus are lau
vxrm and vxsat have been moved into a special register vcsr since
RVV v1.0. So remove them from FCSR for vector 1.0.
Signed-off-by: LIU Zhiwei
---
target/riscv/cpu_bits.h | 8
1 file changed, 8 deletions(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index ebd7917d49
The real return value type has been converted to RISCVException,
but some function declarations still not. This patch makes all
csr operation declarations use RISCVExcetion.
Signed-off-by: LIU Zhiwei
---
target/riscv/csr.c | 117 -
1 file changed, 74 i
On 1/30/24 18:26, Philippe Mathieu-Daudé wrote:
What is the rationale here? (I'm trying to generically understand
in which case one is better than another).
Didn't you ask Anton why a generic cpu_* function was using CPUArchState?
Anyway, I think we've generally used CPUState more often with g
On 1/30/24 18:20, Philippe Mathieu-Daudé wrote:
Can the index ever be negative?
No.
Then why not return an unsigned type?
The existing function didn't, and I didn't think about it.
Does it really matter?
r~
On Tue, 30 Jan 2024 at 12:57, Peter Maydell wrote:
>
> On Tue, 30 Jan 2024 at 10:51, Manos Pitsidianakis
> wrote:
> >
> > On Tue, 30 Jan 2024 at 12:42, Peter Maydell
> > wrote:
> > >
> > > On Tue, 30 Jan 2024 at 10:39, Manos Pitsidianakis
> > > wrote:
> > > >
> > > > On Tue, 30 Jan 2024 at 12:
From: Nick Briggs
Solaris has net/if_arp.h and netinet/if_ether.h rather than net/ethernet.h,
but does not define ETHER_ADDR_LEN, instead providing ETHERADDRL.
Signed-off-by: Nick Briggs
Reviewed-by: Konstantin Kostiuk
Signed-off-by: Konstantin Kostiuk
---
qga/commands-posix.c | 5 -
1 f
From: Peng Ji
When a volume has more than one disk, all disks cannot be
returned correctly because there is not enough malloced memory
for disk extents, so before executing DeviceIoControl for the
second time, get the correct size of the required memory space
to store all disk extents.
Details:
From: "Angel M. Villegas"
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1757
Updates to qga help output and documentation for --allow-rpcs and --blocks-rpcs
Signed-off-by: "Angel M. Villegas"
Reviewed-by: Konstantin Kostiuk
Signed-off-by: Konstantin Kostiuk
---
docs/interop/qemu-g
From: Samuel Tardieu
guest-exec invocation does not need the full path of the executable to
execute. Using only the command names ensures correct execution of the
test on systems not adhering to the FHS.
Signed-off-by: Samuel Tardieu
Reviewed-by: Konstantin Kostiuk
Reviewed-by: Philippe Mathie
The following changes since commit 11be70677c70fdccd452a3233653949b79e97908:
Merge tag 'pull-vfio-20240129' of https://github.com/legoater/qemu into
staging (2024-01-29 10:53:56 +)
are available in the Git repository at:
https://github.com/kostyanf14/qemu.git tags/qga-pull-2024-01-30
f
On Tue, 30 Jan 2024 at 10:51, Manos Pitsidianakis
wrote:
>
> On Tue, 30 Jan 2024 at 12:42, Peter Maydell wrote:
> >
> > On Tue, 30 Jan 2024 at 10:39, Manos Pitsidianakis
> > wrote:
> > >
> > > On Tue, 30 Jan 2024 at 12:34, Peter Maydell
> > > wrote:
> > > >
> > > > On Tue, 30 Jan 2024 at 10:11
On Tue, 30 Jan 2024 at 12:42, Peter Maydell wrote:
>
> On Tue, 30 Jan 2024 at 10:39, Manos Pitsidianakis
> wrote:
> >
> > On Tue, 30 Jan 2024 at 12:34, Peter Maydell
> > wrote:
> > >
> > > On Tue, 30 Jan 2024 at 10:11, Manos Pitsidianakis
> > > wrote:
> > > >
> > > > Check if a file argument i
On Tue, Jan 30, 2024 at 10:18:07AM +, Peter Maydell wrote:
> On Mon, 29 Jan 2024 at 23:31, Fabiano Rosas wrote:
> >
> > Fabiano Rosas writes:
> >
> > > Peter Xu writes:
> > >
> > >> On Fri, Jan 26, 2024 at 11:54:32AM -0300, Fabiano Rosas wrote:
> > > The issue that occurs to me now is that '
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