Hi Eduardo,
Is it possible to identify context switches inside QEMU. In order to support
transactional memory in QEMU, we have added
target_ulong tm_abort_eip;
int inTransaction;
to CPUX86State structure.
tm_abort_eip is the EIP to jump to when a transaction fails i.e. start of
the
I think I could not explain my question regarding addl %ebx, (%eax).
What I wanted to ask was that this instruction also accesses the memory and
I also need to intercept it within a transaction. Incase of addl %ebx,
(%eax), Are the functions under /* CPU memory access without any memory or
io
2007/4/25, Atif Hashmi [EMAIL PROTECTED]:
Instructions like addl %ebx, (%eax) are also considered to be memory
refernce instructions. Do these type of instructions also refer to the
functions that you mentioned.
No. You are using __asm_volatile(mov %al %al) to mark the start of your
Hi Eduardo,
I think I could not explain my question regarding addl %ebx, (%eax). What
I wanted to ask was that this instruction also accesses the memory and I
also need to intercept it within a transaction. Incase of addl %ebx,
(%eax), Are the functions under /* CPU memory access without any
Hi Eduardo,
Thanks for pointing me to the file. Could you please clarify one more thing.
Instructions like addl %ebx, (%eax) are also considered to be memory
refernce instructions. Do these type of instructions also refer to the
functions that you mentioned.
Secondly, what is the purpose of
Hi Eduardo,
I have finished implementing the implementing the roll-back functionality
for transactional memory. There is one thing that I wanted to ask you. In
order to roll-back, I need to log all the memory references. So that in that
case when a transaction fails and roll-back occurs, memory
Hi,
You have a description of memory access instruction format in cpu-all.h,
under
/* CPU memory access without any memory or io remapping */
These instructions are defined in softmmu_header.h. If you don't care too
much about performance it will be easier to modify the code written in C
(undef
Hi Atif,
Your code seems quite ok to me. Just try including stored_eip inside the
DisasContext, otherwise you'll lose its value between calls to disas_insn
function.
Also make sure that the instructions you are using as markers are not
executed elsewhere, as your compiler could generate them
Hi
2007/4/17, Atif Hashmi [EMAIL PROTECTED]:
But this prints Transaction restart once and then the program finishes.
This means that commit transaction is not called the second time. Could you
please tell me what am I doing wrong?
Helper functions are outside the translated opcode stream
HI Eduardo,
Thanks for you reply. I have update target-i386/translate.c as follows
if(modrm==0xC0)
{
stored_eip = pc_start - s-cs_base;
gen_op_movl_AL_AL();
}
else if(modrm==0xDB)
{
gen_op_movl_BL_BL(stored_eip);
gen_eob(s);
}
target-i386/op.c
Hi,
I have another small question. Actually, I am implementing hardware
transactional memory support in QEMU. I have implemented the following two
helper functions functions in targer-i386/helper.c
void helper_StartTransaction()
void helper_CommitTransaction();
My application looks as follows.
Sorry for my previous incomplete email
Hi,
I have another small question. Actually, I am implementing hardware
transactional memory support in QEMU. I have implemented the following two
helper functions functions in targer-i386/helper.c
void helper_StartTransaction()
void
Atif Hashmi wrote:
Hi Eduardo,
Thanks a lot for your help. I really appreciate it. I have added the
functionality that I wanted.
Just in case it might help somebody reading this list, I use the appended
patch to detect a special instruction pattern as pass/fail condition and
shut down qemu
Hi Atif,
In target-i386/translate.c, there are many variants of mov i.e.
case 0x89: /* mov Gv, Ev */
case 0xc7: /* mov Ev, Iv */
case 0x8b: /* mov Ev, Gv */
case 0x8e: /* mov seg, Gv */
That's true. I forgot the fact that mov %eax,%eax can be both:
0x89 0xC0
0x8B 0xC0
It's up to the
Hi Eduardo,
Thanks a lot for your help. I really appreciate it. I have added the
functionality that I wanted.
By the way, Is there any documentation that can help me better understand
the QEMU source code?
Regards,
Atif
On 4/8/07, Eduardo Felipe [EMAIL PROTECTED] wrote:
Hi Atif,
In
Hi Eduardo,
I really appreciate your help but there is a small think that I need to ask
you.
In target-i386/translate.c, there are many variants of mov i.e.
case 0x89: /* mov Gv, Ev */
case 0xc7: /* mov Ev, Iv */
case 0x8b: /* mov Ev, Gv */
case 0x8e: /* mov seg, Gv */
which one do you think
Hi,
Your should create a new helper function in \target-i386\helper.c to perform
whatever you want QEMU to do when movl %eax,%eax is found.
To invoke that function create a new opcode in \target-i386\op.c. That
opcode should only call your helper function.
Finally, modify
Hi All,
Adding another note to my previous email. Is this even possible to do what I
am mentioned in my last email? (See Below)
Regards,
Atif
On 4/3/07, Atif Hashmi [EMAIL PROTECTED] wrote:
Hi All,
I am inserting
movl %eax, %eax
instruction within the assembly code of a program and I am
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