This header shouldn't be in this file and there is already pointer to
dt-bindings/gpio/gpio.h.
Fixes: d2d14383bae4 ("arm64: zynqmp: Add support for DLC21 (Smartlynq+) board")
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-dlc21-revA.dts | 1 -
1 file changed, 1 deletion(-)
diff --git
Hi,
On 15.02.2022 08:41, Michal Simek wrote:
On 2/14/22 21:10, Ricardo Salveti wrote:
This is a bit similar to the issue raised on iMX8-based targets a few
days ago, which is forcing the environment location based on the boot
mode and not allowing the user to use a different option via other
Hi,
On 2/14/22 21:10, Ricardo Salveti wrote:
Hi Michal,
This is a bit similar to the issue raised on iMX8-based targets a few
days ago, which is forcing the environment location based on the boot
mode and not allowing the user to use a different option via other
CONFIG options.
Should we
On Mon, Feb 14, 2022 at 12:33 PM Daniel Klauer wrote:
>
> On 12.02.22 12:50, Ramon Fried wrote:
> > On Wed, Feb 9, 2022 at 5:41 PM Daniel Klauer wrote:
> >>
> >> The miiphy_read/miiphy_write functions return 1 on error, not -errno.
> > Why don't you just fix the miiphy_read/miiphy_write
Hi Bryan.
Am Mo., 14. Feb. 2022 um 23:25 Uhr schrieb Bryan Brattlof :
>
> On this day, February 14, 2022, thus sayeth Christian Gmeiner:
> > Hi Bryan.
> >
> > >
> > > On this day, February 7, 2022, thus sayeth Christian Gmeiner:
> > > > We only want to call bo_board_detect() if
Akashi-san,
> > > > > >
> > > > > > +# Try rejection in reverse order.
> > > > >
> > > > > "Reverse order" of what?
> > > >
> > > > Of the test right above
> > >
> > > Please specify the signature database, I guess "dbx"?
> > >
> > > > >
> > > > > > +
We only want to call do_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
is set. Same as done for am64.
This makes it possible to add a custom am65 based board design to
U-Boot that does not use this board detection mechanism.
Signed-off-by: Christian Gmeiner
---
arch/arm/mach-k3/am6_init.c | 3
On Tue, 15 Feb 2022 at 07:21, AKASHI Takahiro
wrote:
>
> Sughosh,
>
> On Mon, Feb 14, 2022 at 11:12:22AM +0530, Sughosh Ganu wrote:
> > hi Takahiro,
> >
> > On Mon, 14 Feb 2022 at 08:54, AKASHI Takahiro
> > wrote:
> > >
> > > Sughosh,
> > >
> > > On Thu, Feb 10, 2022 at 03:40:00PM +0530, Sughosh
On Mon, Feb 14, 2022 at 11:14:53AM -0800, Dhananjay Phadke wrote:
> On 2/13/2022 5:13 PM, Andrew Jeffery wrote:
>
> We can decouple HW RoT and runtime control on enforcing secure boot
> (requiring one or keys) on FIT image. Conflating two raises lot of
> questions.
I won't claim to be a security
On Tue, 15 Feb 2022, at 13:42, Dhananjay Phadke wrote:
> On 2/14/2022 3:13 PM, Patrick Williams wrote:
>> On Mon, Feb 14, 2022 at 11:14:53AM -0800, Dhananjay Phadke wrote:
>>> There's a key-requirement policy already implemented [1].
>>>
>>> [1]
>>>
On 2/14/2022 3:13 PM, Patrick Williams wrote:
On Mon, Feb 14, 2022 at 11:14:53AM -0800, Dhananjay Phadke wrote:
On 2/13/2022 5:13 PM, Andrew Jeffery wrote:
We can decouple HW RoT and runtime control on enforcing secure boot
(requiring one or keys) on FIT image. Conflating two raises lot of
Enable a periodic timer on NPCM SoCs and implement
the get_count timer ops.
Signed-off-by: Stanley Chu
---
v3:
- use driver data for clock setting on different chips
- remove unnecessary code of zeroing priv variables
- more help description in Kconfig
v2:
- calculate the prescale value,
Sughosh,
On Mon, Feb 14, 2022 at 11:12:22AM +0530, Sughosh Ganu wrote:
> hi Takahiro,
>
> On Mon, 14 Feb 2022 at 08:54, AKASHI Takahiro
> wrote:
> >
> > Sughosh,
> >
> > On Thu, Feb 10, 2022 at 03:40:00PM +0530, Sughosh Ganu wrote:
> > > On Thu, 10 Feb 2022 at 13:28, AKASHI Takahiro
> > >
Hi Marek,
On 2022-02-14 16:25, Marek Vasut wrote:
On 2/14/22 21:51, Angus Ainslie wrote:
Enable the clocks for spi buses 1 through 3
Signed-off-by: Angus Ainslie
---
Changes since v1:
added MXC_CSPI_CLK to ECSPI1_CLK_ROOT mapping
arch/arm/include/asm/arch-imx8m/imx-regs.h | 9 +
On Mon, Feb 14, 2022 at 08:56:07AM +0200, Ilias Apalodimas wrote:
> On Mon, Feb 14, 2022 at 03:36:06PM +0900, AKASHI Takahiro wrote:
> > On Mon, Feb 14, 2022 at 08:18:03AM +0200, Ilias Apalodimas wrote:
> > > On Mon, Feb 14, 2022 at 10:50:08AM +0900, AKASHI Takahiro wrote:
> > > > Ilias,
> > > >
On 2/14/22 21:51, Angus Ainslie wrote:
Enable the clocks for spi buses 1 through 3
Signed-off-by: Angus Ainslie
---
Changes since v1:
added MXC_CSPI_CLK to ECSPI1_CLK_ROOT mapping
arch/arm/include/asm/arch-imx8m/imx-regs.h | 9 +
arch/arm/mach-imx/imx8m/clock_imx8mq.c | 40
On Tue, 15 Feb 2022, at 09:43, Patrick Williams wrote:
> On Mon, Feb 14, 2022 at 11:14:53AM -0800, Dhananjay Phadke wrote:
>> On 2/13/2022 5:13 PM, Andrew Jeffery wrote:
>>
>> We can decouple HW RoT and runtime control on enforcing secure boot
>> (requiring one or keys) on FIT image.
In function build_mem_map() prepares also mapping for CCI-400 and
AP BootROM address space.
A53 AP BootROM by default starts at address 0xfff0 and is 16 kB long.
CCI-400 in new TF-A version starts at address 0xfe00 and is 64 kB long.
Physical addresses are read directly from mvebu
Fix calling build_mem_map() function and extend it to map also
CCI-400 and AP BootROM address space.
With this change it is possible to access A53 AP BootROM on Armada 3720
from U-Boot and e.g. dump it via U-Boot md command:
=> md fff0 1000
Pali Rohár (3):
arm: mvebu: a37xx: Fix calling
Function is named build_mem_map, not a3700_build_mem_map.
Signed-off-by: Pali Rohár
---
arch/arm/mach-mvebu/armada3700/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c
b/arch/arm/mach-mvebu/armada3700/cpu.c
index
Function build_mem_map() modifies global variable mem_map. This variable is
used by the get_page_table_size() function which is called by function
arm_reserve_mmu() (as aliased macro PGTABLE_SIZE). Function
arm_reserve_mmu() is called earlier than enable_caches() which calls
build_mem_map(). So
On Tue, 15 Feb 2022, at 05:44, Dhananjay Phadke wrote:
> On 2/13/2022 5:13 PM, Andrew Jeffery wrote:
>> Right, I think this question is an indication that I could write a more
>> informative commit message, so if we converge on something acceptable
>> I'll update it. Let me provide some more
On Mon, Feb 14, 2022 at 05:56:52PM +0100, Felix Brack wrote:
> The changes from commit 0dba45864b2a ("arm: Init the debug UART")
> prevent the early debug UART from being initialized correctly.
> By adding a new SoC specific early UART initialization function this
> patch provides a generic
On this day, February 14, 2022, thus sayeth Christian Gmeiner:
> Hi Bryan.
>
> >
> > On this day, February 7, 2022, thus sayeth Christian Gmeiner:
> > > We only want to call bo_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
> >
> > s/bo_board_detect/do_board_detect/
>
> Upps..
>
> >
> > > is
Hey all,
It's release day and so here's v2022.04-rc2. Much of what I had hoped
to see come in by now has, but there's still at least one more iMX PR to
go and we'll see where everything is after that. There's a few other
sets of platform updates to come in, and then I think some cleanup
series
Hi Pali,
On Mon, Feb 14, 2022 at 1:58 AM Pali Rohár wrote:
>
> On Sunday 13 February 2022 17:10:26 Tony Dinh wrote:
> > Hi Pali,
> >
> > Please see below.
> >
> > On Sun, Feb 13, 2022 at 4:21 PM Pali Rohár wrote:
> > >
> > > On Sunday 13 February 2022 16:08:51 Tony Dinh wrote:
> > > > Hi Pali,
U-Boot now supports NVMe storage and on the laptop models, the
SPI keyboard. Since we now disable the debug console by default
provide instructions on how the enable the debug console including
a table listing the appropriate UART base address for each of the
supported SoCs.
Signed-off-by: Mark
The address of the debug UART varies differs between the M1 and
the M1 Pro/Max SoCs. So we have to disable it to make a single
U-Boot binary that works on all SoC generations. Leave the
settings for the base address and clock rate of the M1 in place
to make it easier to re-enable the debug UART
Now that we support the M1 Pro/Max SoCs we need to disable the debug
UART as the base address is different on the new SoC. This now
includes an update to the board documentation with details on how
to enable the debug UART.
Mark Kettenis (2):
arm: apple: Disable debug UART
doc: board:
Enable the clocks for spi buses 1 through 3
Signed-off-by: Angus Ainslie
---
Changes since v1:
added MXC_CSPI_CLK to ECSPI1_CLK_ROOT mapping
arch/arm/include/asm/arch-imx8m/imx-regs.h | 9 +
arch/arm/mach-imx/imx8m/clock_imx8mq.c | 40 ++
2 files changed, 49
On Tue, Feb 08, 2022 at 11:38:39AM +0100, Felix Brack wrote:
> The changes introduced with commit 6337d53fdf45 ("arm: dts: sync am33xx
> with Linux 5.9-rc7") prevent the PDU001 from operating correctly.
> This patch fixes the configuration of the pin multiplexer and uart3.
>
> Signed-off-by:
On Tue, Feb 08, 2022 at 12:42:28PM +0300, Nikita Maslov wrote:
> From: Nikita Maslov
> Date: Fri, 14 Jan 2022 00:13:39 +0300
> Subject: [PATCH v2] scripts: setlocalversion: remove quotes around
> localversion from config
>
> After replacing of include/config/auto.conf sourcing with
>
On Mon, Feb 07, 2022 at 11:02:30AM -0500, Detlev Casanova wrote:
> The pstore command tries to create a reserved-memory node but fails if
> it is already present with:
>
> Add 'reserved-memory' node failed: FDT_ERR_EXISTS
>
> This patch creates the node only if it does not exist and adapts
Hi Michal,
This is a bit similar to the issue raised on iMX8-based targets a few
days ago, which is forcing the environment location based on the boot
mode and not allowing the user to use a different option via other
CONFIG options.
Should we really force the env location based on boot mode?
On 2/13/2022 5:13 PM, Andrew Jeffery wrote:
Right, I think this question is an indication that I could write a more
informative commit message, so if we converge on something acceptable
I'll update it. Let me provide some more context:
As mentioned above this is motivated by use with BMCs,
The changes from commit 0dba45864b2a ("arm: Init the debug UART")
prevent the early debug UART from being initialized correctly.
By adding a new SoC specific early UART initialization function this
patch provides a generic location to add the required code. This code
has to be SoC and not board
On 2/14/22 10:52 AM, Tom Rini wrote:
> On Mon, Feb 14, 2022 at 08:04:35PM +0800, Du Huanpeng wrote:
>
>> the %zx format are used in spl from files below:
>> lib/lzma/LzmaTools.c
>> common/malloc_simple.c
>>
>> it results output like "... 0xx", "size=x" output,
>> treat '%z' as '%l' to
On Mon, Feb 14, 2022 at 08:04:35PM +0800, Du Huanpeng wrote:
> the %zx format are used in spl from files below:
> lib/lzma/LzmaTools.c
> common/malloc_simple.c
>
> it results output like "... 0xx", "size=x" output,
> treat '%z' as '%l' to support `ssize_t' type.
>
> Signed-off-by: Du
On 04.01.22 08:42, Patrice Chotard wrote:
> When OF_LIVE flag is enabled on a 64 bits platform, there is an
> issue when dev_read_addr() is called and need to perform an address
> translation using __of_translate_address().
>
> In case of error, __of_translate_address() return's value is
Hi,
On 2/14/22 12:14, Patrick DELAUNAY wrote:
Hi Johann,
On 2/11/22 15:02, Johann Neuhauser wrote:
Hello Patrick, Patrice and other devs,
I'm trying to roll out secure boot with U-Boot v2022.01 only.
The boot flow should be like:
BootROM -(signed STM32 image)-> U-Boot SPL -(signed fit)->
the %zx format are used in spl from files below:
lib/lzma/LzmaTools.c
common/malloc_simple.c
it results output like "... 0xx", "size=x" output,
treat '%z' as '%l' to support `ssize_t' type.
Signed-off-by: Du Huanpeng
---
lib/tiny-printf.c | 2 +-
1 file changed, 1 insertion(+), 1
>From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei.
The fix is to specify those extensions explicitly in
>From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei.
The fix is to specify those extensions explicitly in
>From version 2.38, binutils default to ISA spec version 20191213. This
means that the csr read/write (csrr*/csrw*) instructions and fence.i
instruction has separated from the `I` extension, become two standalone
extensions: Zicsr and Zifencei.
The fix is to specify those extensions explicitly in
Unsubscribe
On Sun, Feb 13, 2022, 12:00 wrote:
> Send U-Boot mailing list submissions to
> u-boot@lists.denx.de
>
> To subscribe or unsubscribe via the World Wide Web, visit
> https://lists.denx.de/listinfo/u-boot
> or, via email, send a message with subject or body 'help' to
>
Hi Christian!
On this day, February 7, 2022, thus sayeth Christian Gmeiner:
> We only want to call bo_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
s/bo_board_detect/do_board_detect/
> is set. Same as done for am64.
>
> Signed-off-by: Christian Gmeiner
> ---
> arch/arm/mach-k3/am6_init.c | 3
On Sun, Feb 13, 2022 at 9:10 PM Marek Vasut wrote:
>
> On 2/14/22 01:05, Adam Ford wrote:
> > On Sat, Feb 12, 2022 at 8:26 AM Adam Ford wrote:
> >>
> >> omap_ehci_hcd_stop appears to be dead code, and omap_ehci_hcd_init
> >> is only called by the probe function, so it can be static to that
> >>
On Thursday 28 October 2021 10:42:27 Robert Marko wrote:
> On Wed, Oct 27, 2021 at 10:34 PM Tom Rini wrote:
> >
> > On Wed, Oct 27, 2021 at 10:11:36PM +0200, Robert Marko wrote:
> > > On Wed, Oct 27, 2021 at 10:07 PM Tom Rini wrote:
> > > >
> > > > On Wed, Oct 27, 2021 at 09:53:24PM +0200,
From: Peng Fan
Add CAAM clock entry in PCC3
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/pcc.h | 1 +
arch/arm/mach-imx/imx8ulp/pcc.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8ulp/pcc.h
From: Peng Fan
Need to drop phy-reset-gpios before booting linux, this property
is legacy property and replaced with reset-gpios.
If provide both, kernel would failed to request the same gpio twice
and cause fec not work.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 25
From: Peng Fan
The extcon is an decrepted property and not used by upstream Linux and
NXP 5.10 kernel, so we remove it before kicking linux in case it is in
dts. Otherwise distro kernel will not able to have usb function.
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
From: Peng Fan
Beside the fused modules on iMX8MP Lite, this part has also fused
GPU3D/2D, LVDS and MIPI DSI.
So we have to disable them for kernel and also disable MIPI DSI
in u-boot DTS for splash screen at runtime.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
From: Peng Fan
Detect i.MX8MP UltraLite in get_cpu_variant_type
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index
From: Peng Fan
- According to S400 API, the fuse bank 25 (Testconfig2) is able to
access. Add it into driver's mapping table.
- According to FSB words list, the reserved 48 words are ahead of
the bank 5 and bank 6. Fix the wrong position.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
From: Ye Li
Enable multiple storages for u-boot env:
MMC or SPI flash or NOWHERE for usb
so u-boot can runtime select the storage flash according to boot device.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 36 +
1 file
From: Ji Luo
The TEE memory should be reserved when TEE is present, so need
to runtime update dram bank and memory information according to
tee present or not.
Signed-off-by: Ji Luo
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/soc.c | 102 +++-
1 file
From: Peng Fan
Introdue i.MX8ULP power entry header
Signed-off-by: Peng Fan
---
include/dt-bindings/power/imx8ulp-power.h | 26 +++
1 file changed, 26 insertions(+)
create mode 100644 include/dt-bindings/power/imx8ulp-power.h
diff --git
From: Peng Fan
When TEE is present, the DRAM maybe split to two parts,
so enlarge CONFIG_NR_DRAM_BANKS
Signed-off-by: Peng Fan
---
configs/imx8ulp_evk_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig
From: Peng Fan
Enable wdog_ad interrupt being triggered by CMC1 to CM33 to let CM33
know A35 reset and reinitialize rpmsg.
Clear wdog_ad and AD_PERIPH reset interrupt after A35 up, otherwise
M33 will always receive interrupt.
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
From: Peng Fan
Dynamic setting mmcdev and mmcroot.
Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2"
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/sys_proto.h | 2 +
board/freescale/common/Makefile | 3 ++
board/freescale/common/mmc.c | 49
From: Peng Fan
Enable the SD/MMC port auto detect.
The mmc relevant env can be reset when auto detect is enabled.
Signed-off-by: Peng Fan
---
board/freescale/imx8ulp_evk/imx8ulp_evk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/freescale/imx8ulp_evk/imx8ulp_evk.c
From: Ye Li
Since ATF power domain will hold the enable counter for each power domain,
We need to power off them before entering kernel to avoid this
power domain can't be really powered off.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
board/freescale/imx8ulp_evk/imx8ulp_evk.c | 30
From: Ye Li
If M33 handshake is successful, TPM and DSI panel MUX setting is
done by M33, no need to set them.
If handshake is failed or M33 is not booted, continue the TPM
and DSI panel MUX setting
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Biwen Li
Signed-off-by: Peng Fan
From: Ye Li
Update DDR PHY settings to support LPDDR4 mode only by adjusting
DQ VREF ctrl, ODT and pads drive strength.
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
board/freescale/imx8ulp_evk/lpddr4_timing.c | 32 ++---
1 file changed, 16
From: Clement Faure
Release the CAAM for the A35 from the SPL.
Signed-off-by: Clement Faure
Signed-off-by: Peng Fan
---
board/freescale/imx8ulp_evk/spl.c | 8
1 file changed, 8 insertions(+)
diff --git a/board/freescale/imx8ulp_evk/spl.c
b/board/freescale/imx8ulp_evk/spl.c
index
From: Ye Li
Add ahab_dump_buffer API to dump AHAB buffer for debug purpose
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/s400_api.h | 3 +-
drivers/misc/imx8ulp/s400_api.c | 34
2 files changed, 36 insertions(+), 1
From: Clement Faure
Add ahab_release_caam() function to the S400 API.
Signed-off-by: Clement Faure
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/s400_api.h | 2 ++
drivers/misc/imx8ulp/s400_api.c | 29
2 files changed, 31 insertions(+)
diff
From: Ye Li
Found the lposc fuse loading having impact to cpu idle in kernel.
Without the loading in dual boot mode, kernel will hang after idle
for a while.
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
board/freescale/imx8ulp_evk/spl.c | 6 ++
1 file changed,
From: Ye Li
Assign the LPAV owner to RTD, and assign LPAV masters and peripherals
to APD. So except the masters and peripherals, other resources
(like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend.
No needs to initialize DDR again after reboot.
Reviewed-by: Peng Fan
From: Ye Li
Since latest S400 firmware has supported to read OEM SRK Hash, add
it to the driver's table
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/misc/imx8ulp/fuse.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/imx8ulp/fuse.c
From: Peng Fan
Enable MU0_B clk by default. When M33 image is loaded by Jlink,
the previous method not enable MU0_B clk and not able to communicate
with M33, so let's enable it by default.
And we not put it under kernel dts, because it conflicts with i.MX8QM
suspend/resume logic which requires
From: Peng Fan
Add a new ddr script, defconfig for ND
Configure the clock for ND mode
changing A35 to 960M for OD mode
Update NIC CLK for the various modes
Introduce clock_init_early/late, late is used after pmic voltage
setting, early is used in the very early stage for upower mu, lpuart and
From: Ye Li
When reset with dual boot mode, the LPAV domain won't power down
due to its master is not assigned to APD. So the NICLPAV keeps the
last setting to use PLL4PFD1. So before SPL initialize the PLL4,
we need to switch NICLPAV to FRO192, otherwise system will hang.
Reviewed-by: Peng Fan
From: Ye Li
When M33 is LPAV owner in dual boot, DDR, PCC5, CGC2 won't be reset
during APD reset. So no need to init DDR again after reboot, but need to
reconfigure the PLL4 PFD/PFDDIV/LPAV NIC etc, because kernel may
change or disable some of them.
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
From: Ye Li
This workaround is not needed on i.MX8ULP proto-1B EVK as board has
fixed the problem. Because we don't support proto-1A any longer,
remove the PMIC settings.
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
board/freescale/imx8ulp_evk/spl.c | 18
From: Clark Wang
Add i3c controller clock enable/disable function for imx8ulp.
Reviewed-by: Ye Li
Signed-off-by: Clark Wang
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8ulp/clock.c | 26 ++
1 file changed, 26 insertions(+)
diff --git
From: Ye Li
Add functions to check if M33 image is booted and handshake with M33
image via MU. A core notifies M33 to start init by FCR F0, then wait
M33 init done signal by checking FSR F0.
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Biwen Li
Signed-off-by: Peng Fan
---
From: Peng Fan
Only including clock.h could simplify header files.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8ulp/clock.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8ulp/clock.h
b/arch/arm/include/asm/arch-imx8ulp/clock.h
index
From: Ye Li
The COUNTER_FREQUENCY is missed in 8ulp configs, it will cause SPL
and u-boot not set the cntfrq_el0. For u-boot, this is ok, because
ATF has set it. But for SPL, it will lead delay and get_timer
not working.
Reviewed-by: Peng Fan
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
From: Peng Fan
This patchset is to upstream NXP downstream i.MX8ULP patches
- Support Nominal/Low Drive clock settings
- Update mem map for TEE
- Release CAAM
- Support Dual boot
- Enable handshake with M33
- Update DDR and PHY settings
- Misc clock update
Clark Wang (1):
imx: imx8ulp:
From: Jan Kiszka
This allows to prefill fdt and config nodes with hash and signature
subnodes. It's just important to place the child nodes last so that
hashes do not come before the data - would be disliked by mkimage.
Signed-off-by: Jan Kiszka
---
tools/binman/etype/fit.py | 4
1 file
The fdt_addr env have meaning only for the current runtime and it depends
on the dtb size or firmware version. If one save the environment to disk
and the loads it on the latter boot, the fdt_addr might change, what
result in passing incorrect dtb address to the kernel. Fix this by always
setting
This change updates all Armada 37xx DTS files to version which is used by
Linux kernel v5.18.
Signed-off-by: Pali Rohár
---
arch/arm/dts/armada-371x.dtsi | 38 +-
arch/arm/dts/armada-3720-db.dts | 224 ---
arch/arm/dts/armada-3720-espressobin.dts | 171 +
Hi Bryan.
>
> On this day, February 7, 2022, thus sayeth Christian Gmeiner:
> > We only want to call bo_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
>
> s/bo_board_detect/do_board_detect/
Upps..
>
> > is set. Same as done for am64.
> >
> > Signed-off-by: Christian Gmeiner
> > ---
> >
Hi Johann,
On 2/11/22 15:02, Johann Neuhauser wrote:
Hello Patrick, Patrice and other devs,
I'm trying to roll out secure boot with U-Boot v2022.01 only.
The boot flow should be like:
BootROM -(signed STM32 image)-> U-Boot SPL -(signed fit)-> U-Boot -(signed
fit)-> Linux
Everything except
On Mon, Feb 14, 2022 at 11:32:53AM +0100, Heinrich Schuchardt wrote:
> On 2/14/22 10:14, Ilias Apalodimas wrote:
> > The general rule of accepting or rejecting an image is
> > 1. Is the sha256 of the image in dbx
> > 2. Is the image signed with a certificate that's found in db and
> > not
Official DT bindings for Espressobin have disabled eMMC node.
As U-Boot requires to have this node enabled by default, do it in
armada-3720-espressobin-u-boot.dtsi DTS file.
Signed-off-by: Pali Rohár
---
arch/arm/dts/armada-3720-espressobin-u-boot.dtsi | 8
1 file changed, 8
In Linux kernel version of armada-37xx.dtsi file sdhci1 pointer refers to
sdhci@d node and sdhci0 pointer to sdhci@d8000 node.
Signed-off-by: Pali Rohár
---
arch/arm/dts/armada-3720-db.dts | 4 ++--
arch/arm/dts/armada-3720-espressobin.dts | 4 ++--
Armada 3720 DTS files in upstream kernel use ethernet nodes named
'ethernet@3' and 'ethernet@4'. U-Boot have them named 'neta@3'
and 'neta@4'. To have Turris Mox U-Boot board code independent of
ethernet node names, find ethernet node via alias.
Signed-off-by: Pali Rohár
---
U-Boot specific changes should be in armada-3720-espressobin-u-boot.dtsi DTS
file.
Signed-off-by: Pali Rohár
---
.../dts/armada-3720-espressobin-u-boot.dtsi | 23 +++
arch/arm/dts/armada-3720-espressobin.dts | 18 ---
2 files changed, 23 insertions(+), 18
Official DT bindings have only one reg property: watchdog address space.
Convert armada-37xx-wdt.c driver to offical DT bindings and access sel_reg
register via MVEBU_REGISTER() macro, as its value (required by U-Boot
driver) is not in DT yet. In later stage can be driver cleaned to not use
it.
In commit d368e1070514 ("phy: marvell: a3700: Convert to official DT
bindings in COMPHY driver") was done update to official DT bindings but
compatible string of official DT bindings was not updated.
Fix it now.
Fixes: d368e1070514 ("phy: marvell: a3700: Convert to official DT bindings in
Fix Armada 3720 drivers and all Armada 3720 boards (DB, uDPU, Mox and
Espressobin) to be compatible with DTS files from upstream Linux kernel
and update all Armada 3720 DTS files to version which is scheduled for
Linux kernel 5.18.
DTS patches scheduled for unreleased Linux kernel version 5.18
Compatible string microchip,mcp7940x is used by Turris Mox DTS file in
Linux kernel and U-Boot ds1307.c driver works fine with it.
Signed-off-by: Pali Rohár
---
drivers/rtc/ds1307.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c
index
Official DT bindings use compatible string marvell,armada-3700-ehci.
Update drivers and DTS files.
Signed-off-by: Pali Rohár
---
arch/arm/dts/armada-37xx.dtsi | 2 +-
drivers/phy/marvell/comphy_a3700.c | 2 +-
drivers/usb/host/ehci-marvell.c| 4 ++--
3 files changed, 4 insertions(+), 4
On 12.02.22 12:50, Ramon Fried wrote:
> On Wed, Feb 9, 2022 at 5:41 PM Daniel Klauer wrote:
>>
>> The miiphy_read/miiphy_write functions return 1 on error, not -errno.
> Why don't you just fix the miiphy_read/miiphy_write functions ?
Other functions from that module do the same, so I assumed
On 2/14/22 10:14, Ilias Apalodimas wrote:
The general rule of accepting or rejecting an image is
1. Is the sha256 of the image in dbx
2. Is the image signed with a certificate that's found in db and
not in dbx
3. The image carries a cert which is signed by a cert in db (and
not
On Sunday 13 February 2022 17:10:26 Tony Dinh wrote:
> Hi Pali,
>
> Please see below.
>
> On Sun, Feb 13, 2022 at 4:21 PM Pali Rohár wrote:
> >
> > On Sunday 13 February 2022 16:08:51 Tony Dinh wrote:
> > > Hi Pali,
> > >
> > > On Sun, Feb 13, 2022 at 3:42 PM Pali Rohár wrote:
> > > >
> > > >
The general rule of accepting or rejecting an image is
1. Is the sha256 of the image in dbx
2. Is the image signed with a certificate that's found in db and
not in dbx
3. The image carries a cert which is signed by a cert in db (and
not in dbx) and the image can be verified against the
On 07.02.22 23:08, Alper Nebi Yasak wrote:
> The binman FIT entry type shares some code with the Section entry type.
> This shared code is bound to grow, since FIT entries are conceptually a
> variation of Section entries.
>
> Make FIT entry type a subclass of Section entry type, simplifying it a
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