Hi Roger,
On 01/06/22 16:18, Roger Quadros wrote:
Neha,
On 01/06/2022 12:48, Neha Malcom Francis wrote:
Hi Roger,
On 01/06/22 14:54, Roger Quadros wrote:
On 01/06/2022 09:02, Neha Malcom Francis wrote:
Hi Roger,
On 31/05/22 14:50, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom
On Wed, 1 Jun 2022 at 16:10, Eddie James wrote:
>
> Set the pinctrl groups for each I2C bus. These are essential to
> I2C operating correctly.
>
> Signed-off-by: Eddie James
Reviewed-by: Joel Stanley
Thanks Eddie.
> ---
> arch/arm/dts/ast2600.dtsi | 33 +
> 1
> The commit b583348ca8c8 ("image: fit: Align hash output buffers") places the
> hash output buffer at the .bss section. However, AST2600 by default executes
> SPL in the NOR flash XIP way. This results in the hash output cannot be
> written
> to the buffer as it is located at the R/X only
> From: Tom Rini
> Sent: Monday, May 30, 2022 12:55 AM
> To: u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH 15/20] ax25-ae350: Move CONFIG_SYS_FDT_BASE to Kconfig
>
> The address where the device tree will be passed in to U-Boot at is now moved
> to the Kconfig file. If
Dear Rasums,
On 5/17/22 08:44, Jaehoon Chung wrote:
> On 5/3/22 17:58, Rasmus Villemoes wrote:
>> These are the i2c addresses of the chips, but that comes from device
>> tree. Having that information duplicated here just adds confusion.
>>
>> Signed-off-by: Rasmus Villemoes
There is a conflict
This patch adds support for the SHA-256 Secure Hash Algorithm for CPUs
that have support for the SHA-256 part of the ARM v8 Crypto Extensions.
It greatly improves sha-256 based operations, about 17x faster on iMX8M
evk board. ~12ms vs ~208ms for a 20MiB kernel sha-256 verification.
asm
sha1 digest size is 5*32-bit => 160-bit. Using 64-bit unsigned long
does not cause issue with the current sha1 implementation, but could
be problematic for vectorized access.
Signed-off-by: Loic Poulain
---
include/u-boot/sha1.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Mark sha1_process as weak to allow hardware specific implementation.
Add parameter to support for multiple blocks processing.
Signed-off-by: Loic Poulain
---
lib/sha1.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/lib/sha1.c b/lib/sha1.c
index
Mark sha256_process as weak to allow hardware specific implementation.
Add parameter for supporting multiple blocks processing.
Signed-off-by: Loic Poulain
---
lib/sha256.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/lib/sha256.c
This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs
that have support for the SHA-1 part of the ARM v8 Crypto Extensions.
It greatly improves sha-1 based operations, about 10x faster on iMX8M
evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification.
asm implementation is
This series adds support for the SHA-1 and SHA-256 Secure Hash Algorithm
for CPUs that have support of the ARM v8 Crypto Extensions. It Improves
speed of integrity & signature checking procedures.
V2:
- Add cover letter & sha256 support.
- Kconfig default 'y' only if SHA1 and SHA256
The GetImageInfo function definitions for the FIT images and raw
images are the same. Use a common function for the both the Firmware
Management Protocol(FMP) instances for raw and FIT images.
Signed-off-by: Sughosh Ganu
---
Changes since V1: None
lib/efi_loader/efi_firmware.c | 80
The OsIndications is a 64 bit variable, and the current code expects
the value of the variable to be 64 bit. Update the documentation to
reflect this fact.
Signed-off-by: Sughosh Ganu
Reviewed-by: Heinrich Schuchardt
Reviewed-by: Ilias Apalodimas
---
Changes since V1: None
The EFI_IGNORE_OSINDICATIONS config symbol was introduced as a
mechanism to have capsule updates work even on platforms where the
SetVariable runtime service was not supported. The current logic
requires the OsIndications variable to have been set to a 64 bit value
even when the
The GetImageInfo function of the Firmware Mangement Protocol(FMP) gets
called initially to query the size of the image descriptor array that
would have to be allocated. During this call, the rest of the function
arguments, specifically pointers might be passed as NULL. Do not
populate the
The following set of patches fix separate issues relating to the
capsule update code.
The first patch moves the setting of the descriptor_count parameter to
the GetImageInfo function after assertion of a non zero image
descriptor buffer.
The second patch enables capsule update to proceed even
Depending on backup register value, U-Boot SPL maintains the debug unit
powered-on for debugging purpose; only BUCK1 is required for powering
the debug unit, so revert the setting for all the other power lanes,
except BUCK3 that has to be always on.
To be functional this patch requires a
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.
Signed-off-by: Eddie James
---
arch/arm/dts/ast2600.dtsi | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index
On Wed, Jun 01, 2022 at 02:50:26PM +, Hawkins, Nick wrote:
>
> > >
> > > The HPE SoC is new to linux. A basic device tree layout with minimum
> > > required for linux to boot including a timer and watchdog support has
> > > been created.
> > >
> > > The dts file is empty at this point but
Fix diacritics in some instances of my name and change my e-mail address
to ka...@kernel.org.
Add corresponding .mailmap entries.
Signed-off-by: Marek Behún
---
.mailmap | 2 ++
MAINTAINERS | 4 ++--
From: Marek Behún
Fix MAINTAINERS files for Turris devices, add missing files and add Pali
as maintainer.
Signed-off-by: Marek Behún
---
MAINTAINERS | 8
board/CZ.NIC/turris_mox/MAINTAINERS | 4 +++-
board/CZ.NIC/turris_omnia/MAINTAINERS | 5 -
3 files
> >
> > The HPE SoC is new to linux. A basic device tree layout with minimum
> > required for linux to boot including a timer and watchdog support has
> > been created.
> >
> > The dts file is empty at this point but will be updated in subsequent
> > updates as board specific features are
On Thu, May 26, 2022 at 01:55:46PM -0500, nick.hawk...@hpe.com wrote:
> From: Nick Hawkins
>
> Add the include file for the gxp soc.
>
> Signed-off-by: Nick Hawkins
[snip]
> +#ifdef CONFIG_TARGET_GXP
> +#ifdef CONFIG_GXP_ECC
> +#define CONFIG_SYS_SDRAM_SIZE 0x0f80
> +#else
> +
On Thu, May 26, 2022 at 01:55:42PM -0500, nick.hawk...@hpe.com wrote:
> From: Nick Hawkins
>
> Add basic support for the HPE GXP SoC. Reset the EHCI controller at
> boot.
>
> Signed-off-by: Nick Hawkins
> ---
> board/hpe/gxp/Kconfig | 47 +++
>
On Thu, May 26, 2022 at 01:55:45PM -0500, nick.hawk...@hpe.com wrote:
> From: Nick Hawkins
>
> The HPE SoC is new to linux. A basic device tree layout with minimum
> required for linux to boot including a timer and watchdog support has
> been created.
>
> The dts file is empty at this point
On Thu, May 26, 2022 at 04:28:07PM +0800, Jincheng Wang wrote:
> Hello u-boot list,
>
> I found the sqfs_readdir() function is vulnerable to Out-of-Bound write,
> which will cause arbitrary code execution.
>
> ```
> int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp)
> {
>
On Thu, Apr 07, 2022 at 11:58:55AM +0200, Pali Rohár wrote:
> On Thursday 07 April 2022 11:54:55 Miquel Raynal wrote:
> > Hi Pali,
> >
> > p...@kernel.org wrote on Thu, 7 Apr 2022 11:41:59 +0200:
> >
> > > On Thursday 07 April 2022 09:54:21 Miquel Raynal wrote:
> > > > Hi Pali,
> > > >
> > > >
Hi,
Am 01.06.2022 um 14:59 schrieb Michal Simek:
On 6/1/22 14:27, Stefan Herbrechtsmeier wrote:
Hi,
Am 01.06.2022 um 13:59 schrieb Michal Simek:
Hi,
first of all subject is not accurate. We are not using null as start
but address 0.
I will replace null with 0.
On 6/1/22 12:55,
From: Dinesh Maniyam
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Dinesh Maniyam
---
v3->v2
- copyright year updated and alignment updated.
v2->v1
- add space in title
---
drivers/ddr/altera/sdram_soc64.c | 5 +++--
1 file
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Friday, 13 May 2022 3:05 pm
> To: u-boot@lists.denx.de
> Cc: Lim, Elly Siew Chin ; Chee, Tien Fong
> ; Hea, Kok Kiang ; Gan,
> Yau Wai ; Kho, Sin Hui ;
> Lokanathan, Raaj ; Maniyam, Dinesh
>
> Subject: [PATCH v2] ddr: altera: soc64:
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Friday, 13 May 2022 10:32 am
> To: u-boot@lists.denx.de
> Cc: Vasut, Marek ; Simon Goldschmidt
> ; Chee, Tien Fong
> ; Hea, Kok Kiang ; Gan,
> Yau Wai ; Kho, Sin Hui ;
> Lokanathan, Raaj ; Maniyam, Dinesh
>
> Subject: [PATCH] arm:
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Friday, 13 May 2022 3:30 pm
> To: u-boot@lists.denx.de
> Cc: Vasut, Marek ; Simon Goldschmidt
> ; Chee, Tien Fong
> ; Hea, Kok Kiang ; Gan,
> Yau Wai ; Kho, Sin Hui ;
> Lokanathan, Raaj ; Maniyam, Dinesh
>
> Subject: [PATCH v2] arm:
From: Dinesh Maniyam
There is hardware bug in NCORE CCU IP and it is causing an issue in the
coherent directory tracking of outstanding cache lines.
The workaround is disabling snoop filter.
Signed-off-by: Dinesh Maniyam
---
drivers/cache/cache-ncore.c | 6 +++---
1 file changed, 3
From: Dinesh Maniyam
Override __udelay() as 'always inlined' function so that PSCI code
run in '__secure' section can call this delay function as well.
Signed-off-by: Chee Hong Ang
Signed-off-by: Dinesh Maniyam
---
arch/arm/mach-socfpga/timer_s10.c | 35 ++-
1
On 6/1/22 14:27, Stefan Herbrechtsmeier wrote:
Hi,
Am 01.06.2022 um 13:59 schrieb Michal Simek:
Hi,
first of all subject is not accurate. We are not using null as start but
address 0.
I will replace null with 0.
On 6/1/22 12:55, Stefan Herbrechtsmeier wrote:
[CAUTION: External
On 6/1/22 5:55 AM, Roger Quadros wrote:
On 01/06/2022 13:42, Neha Malcom Francis wrote:
Hi Roger,
On 01/06/22 14:53, Roger Quadros wrote:
Hi,
On 01/06/2022 09:08, Neha Malcom Francis wrote:
Hi Roger,
On 31/05/22 16:32, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis
Hi,
Am 01.06.2022 um 13:59 schrieb Michal Simek:
Hi,
first of all subject is not accurate. We are not using null as start but
address 0.
I will replace null with 0.
On 6/1/22 12:55, Stefan Herbrechtsmeier wrote:
[CAUTION: External Email]
From: Stefan Herbrechtsmeier
Do not use null
Hi,
first of all subject is not accurate. We are not using null as start but
address 0.
On 6/1/22 12:55, Stefan Herbrechtsmeier wrote:
[CAUTION: External Email]
From: Stefan Herbrechtsmeier
Do not use null as address for memory because of the special meaning for
pointers. Change the spl
From: Stefan Herbrechtsmeier
Do not use null as address for memory because of the special meaning for
pointers. Change the spl bss start address to the second page.
Signed-off-by: Stefan Herbrechtsmeier
---
The problem was discovered with a static char array initialized with an
empty string.
On 01/06/2022 13:42, Neha Malcom Francis wrote:
> Hi Roger,
>
> On 01/06/22 14:53, Roger Quadros wrote:
>> Hi,
>>
>> On 01/06/2022 09:08, Neha Malcom Francis wrote:
>>> Hi Roger,
>>>
>>> On 31/05/22 16:32, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis wrote:
On Wednesday 01 June 2022 12:44:01 Stefan Roese wrote:
> Hi Pali,
>
> On 01.06.22 12:27, Pali Rohár wrote:
> > On Friday 06 May 2022 14:44:48 Pali Rohár wrote:
> > > On Friday 06 May 2022 14:35:55 Stefan Roese wrote:
> > > > While doing this I noticed though, that kwboot UART booting only worked
Neha,
On 01/06/2022 12:48, Neha Malcom Francis wrote:
> Hi Roger,
>
> On 01/06/22 14:54, Roger Quadros wrote:
>>
>>
>> On 01/06/2022 09:02, Neha Malcom Francis wrote:
>>> Hi Roger,
>>>
>>> On 31/05/22 14:50, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis wrote:
Hi Pali,
On 01.06.22 12:27, Pali Rohár wrote:
On Friday 06 May 2022 14:44:48 Pali Rohár wrote:
On Friday 06 May 2022 14:35:55 Stefan Roese wrote:
While doing this I noticed though, that kwboot UART booting only worked
in roughly 1 out of 2 cases. With no progress after this line:
Sending
Hi Roger,
On 01/06/22 14:53, Roger Quadros wrote:
Hi,
On 01/06/2022 09:08, Neha Malcom Francis wrote:
Hi Roger,
On 31/05/22 16:32, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis wrote:
Explicit make commands were earlier used to generate tispl.bin image,
now it is replaced
On Friday 06 May 2022 14:44:48 Pali Rohár wrote:
> On Friday 06 May 2022 14:35:55 Stefan Roese wrote:
> > While doing this I noticed though, that kwboot UART booting only worked
> > in roughly 1 out of 2 cases. With no progress after this line:
> >
> > Sending boot message. Please reboot the
This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs
that have support for the SHA-1 part of the ARM v8 Crypto Extensions.
It greatly improves sha-1 based operations, about 10x faster on iMX8M
evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification.
asm implementation is
sha1 digest size is 5*32-bit => 160-bit. Using 64-bit unsigned long
does not cause issue with the current sha1 implementation, but could
be problematic for vectorized access.
Signed-off-by: Loic Poulain
---
include/u-boot/sha1.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Mark sha1_process as weak to allow hardware specific implementation.
Add parameter to support for multiple blocks processing.
Signed-off-by: Loic Poulain
---
lib/sha1.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/lib/sha1.c b/lib/sha1.c
index
Hi Roger,
On 01/06/22 14:54, Roger Quadros wrote:
On 01/06/2022 09:02, Neha Malcom Francis wrote:
Hi Roger,
On 31/05/22 14:50, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis wrote:
K3 devices x509 certificate added to certain binaries that allows ROM to
what binaries?
On 01/06/2022 08:58, Neha Malcom Francis wrote:
> Hi Roger,
>
> On 31/05/22 14:14, Roger Quadros wrote:
>>
>>
>> On 06/05/2022 07:37, Neha Malcom Francis wrote:
>>> For K3 devices that require a sysfw image, add entry for SYSFW. It can
>>
>> 'can' or 'should'?
>>
>> For binman, 'sysfw' and
On 01/06/2022 09:02, Neha Malcom Francis wrote:
> Hi Roger,
>
> On 31/05/22 14:50, Roger Quadros wrote:
>>
>>
>> On 06/05/2022 07:37, Neha Malcom Francis wrote:
>>> K3 devices x509 certificate added to certain binaries that allows ROM to
>>
>> what binaries?
>>
>>> validate the integrity of
Hi,
On 01/06/2022 09:08, Neha Malcom Francis wrote:
> Hi Roger,
>
> On 31/05/22 16:32, Roger Quadros wrote:
>>
>>
>> On 06/05/2022 07:37, Neha Malcom Francis wrote:
>>> Explicit make commands were earlier used to generate tispl.bin image,
>>> now it is replaced using binman.
>>>
>>> Binman picks
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
drivers/fpga/spartan2.c | 2 +-
drivers/fpga/spartan3.c | 2 +-
drivers/fpga/versalpl.c | 2 +-
drivers/fpga/virtex2.c | 2 +-
From: Adrian Fiergolski
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to handle
loading encrypted bitfiles.
This feature requires encrypted FSBL,as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM or eFUSEs,
as a key source to the AES
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).
Based on solution by Jorge Ramirez-Ortiz
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
boot/Kconfig | 4 ++--
Check whether the FPGA ZynqMP driver supports the given bitstream
image type.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
drivers/fpga/zynqmppl.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
Optimize function code preparing to add secure bitstream types
support.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
drivers/fpga/zynqmppl.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/fpga/zynqmppl.c
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
boot/image-board.c| 4 ++--
cmd/fpga.c| 8
common/spl/spl_fit.c | 6 --
drivers/fpga/fpga.c | 5
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
common/spl/spl_fit.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/common/spl/spl_fit.c
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
drivers/fpga/fpga.c | 2 +-
drivers/fpga/xilinx.c | 2 +-
include/xilinx.h | 2 +-
3 files changed, 3 insertions(+), 3
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
drivers/fpga/fpga.c | 26 ++
include/fpga.h | 1 +
2 files changed, 27 insertions(+)
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
include/versalpl.h | 2 +-
include/xilinx.h | 5 +
It allows using this feature without enabling the "fpga loads"
command.
Signed-off-by: Oleksandr Suvorov
Tested-by: Ricardo Salveti
Co-developed-by: Adrian Fiergolski
Signed-off-by: Adrian Fiergolski
---
(no changes since v1)
cmd/Kconfig | 3 ++-
drivers/fpga/Kconfig| 14
Add a call to convert FPGA "compatible" string to a binary flag.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
drivers/fpga/zynqmppl.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 8ff12bf50a0..0ffcff0c148
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.
Signed-off-by: Oleksandr Suvorov
---
(no changes since v1)
include/xilinx.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git
This patchset introduces support for the authenticated and encrypted
FPGA images on ZynqMP boards, besides that introducing common way to
pass the compatible property to any fpga driver.
It bases on the initial work by Jorge Ramirez-Ortiz
AST2600 supports boot from SPI(mmap), eMMC, and UART.
This patch adds the boot mode detection and return the
corresponding boot device type.
Signed-off-by: Chia-Wei Wang
---
.../arm/include/asm/arch-aspeed/scu_ast2600.h | 3 ++
arch/arm/mach-aspeed/ast2600/spl.c| 30
Hi Simon,
I want to compress a FPGA Image on the fly via binman but this doesn't
work. I have add a bintool implementation for gzip, add gzip support to
comp_util.py and set `compress` and `compression` property in the binman
node of the u-boot dtsi:
fpga-2cg {
compatible =
Changes optee_rng driver to register itself has a OP-TEE service so
that a device is bound for the driver when OP-TEE enumerates the
PTA RNG service.
Cc: Sughosh Ganu
Cc: Patrick Delaunay
Signed-off-by: Etienne Carriere
---
drivers/rng/Kconfig | 1 +
drivers/rng/optee_rng.c | 12
This change defines resources for OP-TEE service drivers to register
themselves for being bound to when OP-TEE firmware reports the related
service is supported. OP-TEE services are discovered during optee
driver probe sequence. Discovery of optee services and binding to
related U-Boot drivers is
Adds random number generator driver using Arm SMCCC TRNG interface to
get entropy bytes from secure monitor. The driver registers as an
Arm SMCCC feature driver to allow PSCI driver to bind a device for
when secure monitor exposes RNG support from Arm SMCCC TRNG interface.
Cc: Sughosh Ganu
Cc:
Fixes ordering of header files inclusion in PSCI firmware driver.
Signed-off-by: Etienne Carriere
---
drivers/firmware/psci.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index 657e7eb5ae..f845ba67f8 100644
---
Use PSCI device to query Arm SMCCC v1.1 support from secure monitor
and if so, bind drivers for the SMCCC features that monitor supports.
Drivers willing to be bound from Arm SMCCC features discovery can use
macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery,
providing target
Defines function IDs ARM_SMCCC_ARCH_FEATURES used to query SMCCC feature
support, applicable from Arm SMCCC v1.1 specification.
Defines macro ARM_SMCCC_RET_NOT_SUPPORTED as generic return identifier
for when a SMCCC feature is not supported.
Signed-off-by: Etienne Carriere
---
On Wed, 1 Jun 2022 at 08:49, Heinrich Schuchardt wrote:
>
> On 5/31/22 09:15, Sughosh Ganu wrote:
> > The GetImageInfo function of the Firmware Mangement Protocol(FMP) gets
> > called initially to query the size of the image descriptor array that
> > would have to be allocated. During this call,
On Wed, 1 Jun 2022 at 09:15, Heinrich Schuchardt wrote:
>
> On 5/31/22 09:15, Sughosh Ganu wrote:
> > The OsIndications is a 64 bit variable, and the current code expects
> > the value of the variable to be 64 bit. Update the documentation to
> > reflect this fact.
> >
> > Signed-off-by: Sughosh
The commit b583348ca8c8 ("image: fit: Align hash output buffers") places
the hash output buffer at the .bss section. However, AST2600 by default
executes SPL in the NOR flash XIP way. This results in the hash output
cannot be written to the buffer as it is located at the R/X only region.
We need
hi Heinrich,
On Wed, 1 Jun 2022 at 11:33, Heinrich Schuchardt wrote:
>
> On 5/31/22 09:15, Sughosh Ganu wrote:
> > The EFI_IGNORE_OSINDICATIONS config symbol was introduced as a
> > mechanism to have capsule updates work even on platforms where the
> > SetVariable runtime service was not
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Friday, 13 May, 2022 10:15 AM
> To: u-boot@lists.denx.de
> Cc: Vasut, Marek ; Simon Goldschmidt
> ; Chee, Tien Fong
> ; Hea, Kok Kiang ;
> Gan, Yau Wai ; Kho, Sin Hui
> ; Lokanathan, Raaj ;
> Maniyam, Dinesh
> Subject: [PATCH] arm:
hello Heinrich,
On Wed, 1 Jun 2022 at 11:11, Heinrich Schuchardt wrote:
>
> Hello Sughosh,
>
> I can't see any difference between efi_firmware_raw_get_image_info() and
> efi_firmware_fit_get_image_info(). Shouldn't we replace them by a single
> function to avoid maintaining duplicate code?
The
Hi Roger,
On 01/06/22 11:28, Neha Malcom Francis wrote:
Hi Roger,
On 31/05/22 14:14, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis wrote:
For K3 devices that require a sysfw image, add entry for SYSFW. It can
'can' or 'should'?
For binman, 'sysfw' and 'dm' (added in
> -Original Message-
> From: Maniyam, Dinesh
> Sent: Tuesday, 31 May, 2022 3:51 PM
> To: u-boot@lists.denx.de
> Cc: Michal Simek ; Chee, Tien Fong
> ; Hea, Kok Kiang ;
> Gan, Yau Wai ; Kho, Sin Hui
> ; Lokanathan, Raaj ;
> Maniyam, Dinesh
> Subject: [PATCH v3] fpga: intel_sdm_mb: Add
On 5/31/22 09:15, Sughosh Ganu wrote:
The OsIndications is a 64 bit variable, and the current code expects
the value of the variable to be 64 bit. Update the documentation to
reflect this fact.
Signed-off-by: Sughosh Ganu
Reviewed-by: Heinrich Schuchardt
---
doc/develop/uefi/uefi.rst |
Hi Roger,
On 31/05/22 16:32, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis wrote:
Explicit make commands were earlier used to generate tispl.bin image,
now it is replaced using binman.
Binman picks up and packages entries according to the description of
entries given in the
On 5/31/22 09:15, Sughosh Ganu wrote:
The EFI_IGNORE_OSINDICATIONS config symbol was introduced as a
mechanism to have capsule updates work even on platforms where the
SetVariable runtime service was not supported. The current logic
requires the OsIndications variable to have been set to a 64
Hi Roger,
On 31/05/22 14:50, Roger Quadros wrote:
On 06/05/2022 07:37, Neha Malcom Francis wrote:
K3 devices x509 certificate added to certain binaries that allows ROM to
what binaries?
validate the integrity of the image. Etype that generates an x509
certificate depending on boot flow
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