Set up mtdparts cmdline argument to be passed to kernel
Signed-off-by: Vignesh Raghavendra
---
include/configs/j721e_evm.h | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index 4371c471e5a9
Faiz,
On 31/01/20 11:44 pm, Simon Glass wrote:
> Hi Vignesh,
>
> On Thu, 30 Jan 2020 at 22:12, Vignesh Raghavendra wrote:
>>
>> Hi Simon,
>>
>> On 31/01/20 7:57 am, Simon Glass wrote:
>>> Hi Faiz,
>>>
>>> On Thu, 30 Jan 2020 at 08:22,
Its possible that k3_avs_priv is NULL because the driver may not have
been probed yet. Therefore check if pointer is valid before
dereferencing it.
Signed-off-by: Vignesh Raghavendra
---
drivers/misc/k3_avs.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/misc/k3_avs.c b
On 17/02/20 9:16 am, Lokesh Vutla wrote:
>
>
> On 13/02/20 7:04 PM, moseschristoph...@gmail.com wrote:
>> From: Moses Christopher Bollavarapu
>>
>> - As tiny printf lib is further optimized, the ability to deal with
>> ethaddr is lost. Hence, in order to handle usb-eth boot from SPL
>>
On 15/02/20 12:03 am, Marek Vasut wrote:
> On 2/14/20 1:23 PM, Vignesh Raghavendra wrote:
>> From: Jean-Jacques Hiblot
>>
>> This fixes potential issues reported by klokworks:
>> Pointer 'req' returned from call to function 'next_request' at line
AD flag for these flashes.
>
> Signed-off-by: Kuldeep Singh
Reviewed-by: Vignesh Raghavendra
> ---
> v2: Reword commit message
>
> drivers/mtd/spi/spi-nor-ids.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/dr
Add DT nodes for main domain I2Cs and its slave devices
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am654-base-board.dts | 48
1 file changed, 48 insertions(+)
diff --git a/arch/arm/dts/k3-am654-base-board.dts
b/arch/arm/dts/k3-am654-base-board.dts
From: Jean-Jacques Hiblot
This fixes potential issues reported by klokworks:
Pointer 'req' returned from call to function 'next_request' at line 531 and
538 may be NULL and will be dereferenced in dwc3_gadget_giveback()
Signed-off-by: Jean-Jacques Hiblot
Signed-off-by: Vignesh Raghavendra
Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: Vignesh Raghavendra
Acked-by: Masahiro Yamada
---
drivers/mtd/nand/raw/denali.c | 35 +++
1 file changed, 3 insertions(+), 32 deletions(-)
diff --git
/denali.c etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate operations, so that drivers need not implement
them locally.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Masahiro Yamada
Reviewed-by: Rick Chen
---
arch/arm/include/asm/dma-mapping.h
Now that arch specific dma mapping APIs take care of cache
flush/invalidate, drop local cache flush operation.
While at that fix dma_unmap_single() call to match new prototype
Signed-off-by: Vignesh Raghavendra
---
drivers/net/macb.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions
Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: Vignesh Raghavendra
Acked-by: Masahiro Yamada
---
drivers/mmc/tmio-common.c | 25 +++--
1 file changed, 3 insertions(+), 22 deletions(-)
diff --git a/drivers/mmc
file so that per driver implementation of these APIs can
be avoided.
travis-ci is green: https://travis-ci.org/r-vignesh/u-boot/builds/637784160
v2:
Fix compilation failure on AM335x etc due to recent U-Boot changes
Collect R-bys
Vignesh Raghavendra (4):
asm: dma-mapping.h: Fix dma mapping
On 16/01/20 2:17 am, Tom Rini wrote:
> On Fri, Nov 15, 2019 at 05:25:02PM +0530, Vignesh Raghavendra wrote:
>
>> Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
>> do dcache flush/invalidate operations as required. For example, see
>> drivers/u
Hi Jagan,
On 19/11/19 3:43 pm, Vignesh Raghavendra wrote:
> First patch moves driver over to spi-mem framework and implement
> spi_mem_ops. This is require to support more SPI Flash opcodes like SFDP
> parsing etc. Series is in prepartion to add Octal mode for support for
> the
Hi,
On 11/19/2019 3:43 PM, Vignesh Raghavendra wrote:
> First patch moves driver over to spi-mem framework and implement
> spi_mem_ops. This is require to support more SPI Flash opcodes like SFDP
> parsing etc. Series is in prepartion to add Octal mode for support for
> the same drive
On 17/01/20 6:21 pm, Simon Goldschmidt wrote:
> On Tue, Nov 19, 2019 at 11:12 AM Vignesh Raghavendra wrote:
>>
>> Add support for Direct Access Controller mode of Cadence QSPI. This
>> allows MMIO access to SPI NOR flash providing better read performance.
>> Di
On 26/02/20 6:25 pm, Pratyush Yadav wrote:
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index 1ed4f0907b..94e99eb99f 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -148,6 +148,32 @@ struct sfdp_header {
> struct
96 (-96)
> Function old new delta
> spi_nor_write388 292 -96
>
> Signed-off-by: Rasmus Villemoes
Acked-by: Vignesh Raghavendra
> ---
> drivers/mtd/spi/spi-nor-core.c | 5 +
> 1 file changed, 1 insertion(+), 4 de
Hi Jagan,
On 20/04/20 5:39 pm, Jagan Teki wrote:
> Some of the SPI controllers have a special set of format
> registers that defines how the transfer initiated to the
> FIFO by means of I/O protocol lines.
>
> Each mode of transfer from slave would be required to configure
> the I/O protocol
On 07/04/20 1:02 pm, Lokesh Vutla wrote:
>
>
> On 02/04/20 6:59 PM, Vignesh Raghavendra wrote:
>> In 1 bit mode OSPI can work at upto 50MHz, this provides before write
>> performance. Therefore increase frequency from 40MHz to 50MHz
>>
>> Signed-off-by
On 16/03/20 12:19 pm, Lokesh Vutla wrote:
> Add all TI specific drivers, include, arch files under ARM TI entry.
> Driver files are added only if there is no entry for the specific
> subsystem in MAINTAINERS file.
>
> Signed-off-by: Lokesh Vutla
> ---
> MAINTAINERS | 24
In 1 bit mode OSPI can work at upto 50MHz, this provides before write
performance. Therefore increase frequency from 40MHz to 50MHz
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am654-base-board.dts| 2 +-
arch/arm/dts/k3-am654-r5-base-board.dts | 2 +-
2 files changed, 2
In 1 bit mode OSPI can work at upto 50MHz, this provides before write
performance. Therefore increase frequency from 40MHz to 50MHz
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 2 +-
arch/arm/dts/k3-j721e-som-p0.dtsi | 2 +-
2 files
On 31/03/20 5:21 am, Alex Nemirovsky wrote:
> Add SPI NAND and NOR support for Cortina Access
> Presidio Engineering Board
>
> Signed-off-by: Alex Nemirovsky
> CC: Jagan Teki
> CC: Vignesh R
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>
On 24/03/20 8:11 pm, Wolfgang Denk wrote:
> Dear Vignesh,
>
> In message <05694b0e-50a1-de5d-25d8-0444a2cae...@ti.com> you wrote:
>>
>> Aim of spi-nor-tiny.c is to have a tiny stack that can be used in
>> SPL/TPL or on resource constraint boards to only support _reading_ from
>> the flash. So
; - Use op->data.nbytes as a measure of whether the data phase exists or
>> not. This fixes data buswidth not being updadted for SR and FSR reads
>> because they keep data buffer as NULL when calling spi_nor_setup_op().
>> - Add support for Micron mt35xu512aba to run in Octal DTR mode.
>
> Any comments on the series? If not, please pull it in.
>
Reviewed-by: Vignesh Raghavendra
On 11/05/20 11:53 pm, Tom Rini wrote:
> On Mon, May 11, 2020 at 06:12:59PM +0530, Lokesh Vutla wrote:
>
>> Hi Tom,
>> Please find the pull request for v2020.07-rc2 containing TI specific
>> changes.
>>
>> Travis-CI build:
>>
On 06/05/20 8:17 pm, Simon Glass wrote:
> Hi Pratyush,
>
> On Tue, 5 May 2020 at 13:47, Pratyush Yadav wrote:
>>
>> Hi Simon,
>>
>> I would be taking up this series and address the comments.
>>
>> On 10/12/19 03:18PM, Simon Glass wrote:
>>> Hi Jean-Jacques,
>>>
>>> On Tue, 5 Nov 2019 at
Hi,
On 17/03/20 1:48 am, Rasmus Villemoes wrote:
> I have a board for which doing "sf erase 0x10 0x8"
> consistently causes the external watchdog circuit to reset the
> board. Make sure to pet the watchdog during slow operations such as
> erasing or writing large areas of a spi nor flash.
On 19/03/20 5:09 pm, Rasmus Villemoes wrote:
> On 19/03/2020 12.25, Vignesh Raghavendra wrote:
>> Hi,
[...]
>>> @@ -399,6 +400,7 @@ static int spi_nor_ready(struct spi_nor *nor)
>>> {
>>> int sr, fsr;
>>>
>>> + WATCHDOG_RESET();
&g
On 19/03/20 6:14 pm, Rasmus Villemoes wrote:
>> Hmm, Watchdog seems to be set to trigger after ~2s of inactivity. Isn't
>> that too small? WATCHDOG_RESET() resets only once per second, so 2
>> second timeout is too close IMO.
>>
>> Typical watchdog timeouts are usually in tens of seconds
>
On 19/03/20 7:20 pm, Rasmus Villemoes wrote:
> On 19/03/2020 14.23, Vignesh Raghavendra wrote:
>>
>
>>> For the read side, it seems that just replacing the UINT_MAX in the two
>>> copies of spi_nor_read_data with some smaller constant should suffice.
>>
Dear Wolfgang,
On 20/03/20 4:48 pm, Wolfgang Denk wrote:
> Dear Vignesh,
>
> In message <20200320101448.10714-1-rasmus.villem...@prevas.dk> Rasmus
> Villemoes wrote:
>> I have a board for which doing "sf erase 0x10 0x8"
>> consistently causes the external watchdog circuit to reset the
It is possible that users of generic_phy_*() APIs may pass a valid
struct phy pointer but phy->dev can be NULL, leading to NULL pointer
deference in phy_dev_ops().
So call generic_phy_valid() to verify that phy and phy->dev are both
valid.
Signed-off-by: Vignesh Raghavendra
---
drivers/p
On 16/05/20 9:05 pm, Faiz Abbas wrote:
> From: Andreas Dannenberg
>
> When the boot of J721E devices using the primary bootmode (configured
> via device pins) fails a boot using the configured backup bootmode is
> attempted. To take advantage of the backup boot mode feature go ahead
> and add
On 9/7/20 12:36 PM, Faiz Abbas wrote:
> Hi Lokesh,
>
> On 07/09/20 12:08 pm, Lokesh Vutla wrote:
>>
>>
>> On 02/09/20 4:48 pm, Faiz Abbas wrote:
>>> Add platform data and a device structure for the spi device
>>> present on am335x-icev2. This requires moving all omap3_spi
>>> platform data
On 9/2/20 4:48 PM, Faiz Abbas wrote:
> Add an ofdata_to_platdata() callback to access dts in U-boot and
> access all platform data in it. This prepares the driver for supporting
> both device tree as well as static platform data structures in SPL.
>
> Signed-off-by: Faiz Abbas
> ---
>
On 9/2/20 4:48 PM, Faiz Abbas wrote:
> Add an ofdata_to_platdata() callback to access dts in U-boot and
> access all platform data in it. This prepares the driver for supporting
> both device tree as well as static platform data structures in SPL.
>
> Signed-off-by: Faiz Abbas
> ---
>
Hi,
On 9/7/20 4:02 PM, Faiz Abbas wrote:
> Hi Vignesh,
>
> On 07/09/20 1:48 pm, Vignesh Raghavendra wrote:
>>
>>
>> On 9/7/20 12:36 PM, Faiz Abbas wrote:
>>> Hi Lokesh,
>>>
>>> On 07/09/20 12:08 pm, Lokesh Vutla wrote:
>>>&g
"ti,dis-chg-det-quirk" property is not part of Linux kernel DT binding
documentation. Therefore drop this and instead use soc_device_match()
to distinguish b/w AM654 SR1.0 and SR2.0 devices similar to Linux kernel
driver.
Signed-off-by: Vignesh Raghavendra
---
drivers/phy/omap-usb2-
Hi Stefan
On 9/17/20 4:53 PM, Vignesh Raghavendra wrote:
> This series adds DMA support to read from memory mapped CFI flashes
>
> First patch reduces noise from DMA APIs
> Second patch adds DMA support for cfi_mtd.
>
> Tested on J721e that has CFI compliant HyperFlash
>
Update detect_enable_hyperflash() to look for "ti,am654-ospi" compatible
to match the upstream DT node.
Signed-off-by: Vignesh Raghavendra
---
board/ti/j721e/evm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index
This enables applying DTBOs at U-Boot prompt before booting to kernel.
Signed-off-by: Vignesh Raghavendra
---
configs/am335x_evm_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 0d814530d4..a44ed286cf 100644
Caller would need gracefully handle failures of dma_get_device(),
therefore reduce pr_err() to pr_debug() when DMA device is not found.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/dma-uclass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/dma
When possible use DMA for reading from CFI flash, this provides upto 5x
improvement in read performance with high speed CFI compliant flashes
like HyperFlash.
Code will gracefully fallback to CPU copy when DMA is unavailable.
Signed-off-by: Vignesh Raghavendra
---
drivers/mtd/cfi_mtd.c | 4
This series adds DMA support to read from memory mapped CFI flashes
First patch reduces noise from DMA APIs
Second patch adds DMA support for cfi_mtd.
Tested on J721e that has CFI compliant HyperFlash
Vignesh Raghavendra (2):
dma: Reduce error level when DMA channel type does not exist
mtd
Reset the channel completely during channel release in order to clear
teardown bit before handing over to next user or jumping to Linux.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/ti/k3
Add MCU NAVSS, UDMA and CPSW2G DT nodes.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 116 ++
1 file changed, 116 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 8ea25dea88
J7200 SoM has Cypress HyperFlash connected to HyperBus interface, add DT
entries for the same.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 27 ++
arch/arm/dts/k3-j7200-som-p0.dtsi | 33 +++
arch/arm/dts/k3-j7200
Enable CPSW2G port to support networking in U-Boot
Signed-off-by: Vignesh Raghavendra
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 15 +++
arch/arm/dts/k3-j7200-common-proc-board.dts | 43 +++
2 files changed, 58 insertions(+)
diff --git a/arch/arm/dts/k3-j7200
and fixup the DT
nodes to select OSPI0 vs HyperFlash
Signed-off-by: Vignesh Raghavendra
---
board/ti/j721e/evm.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 87cdbf9798..66ed3750e3 100644
--- a/board/ti/j721e
Add wkup_gpio0 node required for detecting whether board mux is set
HyperFlash.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-j7200-common-proc-board.dts | 11 +++
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 12
2 files changed, 23 insertions(+)
diff --git
Enable USB, HyperFlasha and CPSW on J7200 SoC
Based on top of https://patchwork.ozlabs.org/project/uboot/list/?series=194305
Vignesh Raghavendra (6):
arm: dts: k3-j7200: Add USB related DT entries
board: ti: j721e: Add support for HyperFlash detection
ARM: dts: k3-j7200: Add wkup gpio node
Add USB related DT entries to enable USB device mode.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 14 +
arch/arm/dts/k3-j7200-common-proc-board.dts | 18 +++
arch/arm/dts/k3-j7200-main.dtsi | 30
Hi
On 27/07/20 3:15 pm, Lokesh Vutla wrote:
> j7200-evm has minor differences with j721e-evm based on the IPs
> available in the SoC. Introduce separate build targets for j7200-evm
> to incorporate the differences.
>
> Signed-off-by: Lokesh Vutla
> ---
> board/ti/j721e/Kconfig | 53
On 27/07/20 3:15 pm, Lokesh Vutla wrote:
Add initial A72 defconfig support.
Signed-off-by: Lokesh Vutla
---
configs/j7200_evm_a72_defconfig | 172
1 file changed, 172 insertions(+)
create mode 100644 configs/j7200_evm_a72_defconfig
diff --git
Hi,
On 26/07/20 8:24 pm, Simon Glass wrote:
Hi Vignesh,
On Mon, 20 Jul 2020 at 00:26, Vignesh Raghavendra wrote:
Hi Simon,
On 19/07/20 9:45 pm, Simon Glass wrote:
The -ENODEV error value in spi_nor_read_id() is incorrect since there
clearly is a device - it just cannot be supported
Add memory mapped address location of U-Boot images in HyperFlash boot
mode.
Signed-off-by: Vignesh Raghavendra
---
include/configs/j721e_evm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index c8a76037ff..a570893378 100644
Enable HyperBus and HyperFlash to support HyperFlash boot.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 28 +
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 40 +++
2 files changed, 68 insertions(+)
diff --git a/arch/arm
HBMC controller on TI K3 SoC provides MMIO access to HyperFlash similar
to legacy Parallel CFI NOR flashes. Therefore alias HyperFlash bootmode
to NOR boot to enable SPL to load next stage using NOR boot flow.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/mach-k3/include/mach/j721e_spl.h | 1
Add support to boot from HyperFlash on J7200 SoC
Vignesh Raghavendra (5):
arm: mach-k3: Add HyperFlash boot mode support
board: ti: j721e: Add support for HyperFlash detection
ARM: dts: k3-j7200-r5-common-proc-board: Enable HyperFlash
configs: j7200_evm_*_defconfig: Enable HyperFlash boot
and fixup the DT
nodes to select OSPI vs HyperFlash
Signed-off-by: Vignesh Raghavendra
---
board/ti/j721e/evm.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index ebaa6faa93..7925b76ab7 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e
Enable configs required to support HyperFlash boot and detection of
onboard mux switch for HyperFlash selection
Signed-off-by: Vignesh Raghavendra
---
configs/j7200_evm_a72_defconfig | 3 +++
configs/j7200_evm_r5_defconfig | 13 +
2 files changed, 16 insertions(+)
diff --git
Hi,
On 05/08/20 3:48 pm, Chee Hong Ang wrote:
If the QSPI clock is not set (read as 0), QSPI driver probe shall fail
and prevent further QSPI access.
Signed-off-by: Chee Hong Ang
---
drivers/spi/cadence_qspi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
On 05/08/20 10:44 pm, Lokesh Vutla wrote:
> +CONFIG_USB_CDNS3_GADGET=y
> +CONFIG_SPL_USB_CDNS3_GADGET=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
You missed updating ID here (19/19
Hi Lokesh,
On 27/07/20 3:15 pm, Lokesh Vutla wrote:
> Add the basic a72 dts for j7200. Following nodes were supported:
> - UART
> - MMC SD
> - I2C
> - TISCI communication
>
> Signed-off-by: Lokesh Vutla
> Signed-off-by: Vignesh Raghavendra
> Signed-off-by: Vi
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e
with updated driver.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/Kconfig | 1 +
drivers/dma/ti/k3-udma.c | 145 +++
2 files changed, 103 insertions(+), 43 deletions(-)
diff --git a/drivers/dma/ti/Kconfig b/drivers
UDMA DT bindings have deviated from kernel's DT for AM654 and J721e.
This series updates UDMA driver and sync DT bindings
Tested OSPI and CPSW on AM654 and J721e after the changes
v2:
Collect R-by
Update patch 2/3 to note about DT incompatibility
Vignesh Raghavendra (3):
dma: ti: Add static
We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.
As a good side effect, all boot stages now use exposed RING mode which
avoid maintaining proxy mode for 32 bit R5 core.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma
In preparation of adding more K3 SoCs, separate soc specific
initialization add a SoC specific initialization hook.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc.c | 49 +--
1 file changed, 40 insertions(+), 9 deletions(-)
diff --git
In K3 UDMA architecture, RX rings are associated with RX flows rather
than RX channels, therefore move the ring pointers to udma_rflow struct
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 52 +---
1 file changed, 28 insertions(+), 24
Encapsulate channel configuration in a separate struct so as to ease
resetting of these fields with memset() and also to increase readability
of the code.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma.c | 197 +--
1 file changed, 108
API users.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc.c | 23 +++
include/linux/soc/ti/k3-navss-ringacc.h | 4
2 files changed, 27 insertions(+)
diff --git a/drivers/soc/ti/k3-navss-ringacc.c
b/drivers/soc/ti/k3-navss-ringacc.c
index
Move the free, occ, windex and rinfex under a struct.
We can use memset to zero them and it will allow a cleaner way to extend
the variables for duplex rings.
Signed-off-by: Vignesh Raghavendra
---
drivers/soc/ti/k3-navss-ringacc.c | 89 ---
1 file changed, 46
Align Ringacc and UDMA driver with kernel updates.
Depends on [1]
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589
Vignesh Raghavendra (6):
soc: ti: k3-ringacc: Move state tracking variables under a struct
soc: ti: k3-ringacc: Add an API to request pair of rings
soc: ti
Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw
Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 74 +--
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 74 +++
2 files changed, 75 insertions(+), 73
Force default thread to be used for RX as ALE is anyways set to Bypass
mode.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index e8fe875e70
MDIO node is not referenced further, therefore drop the dead code.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/ti/am65-cpsw-nuss.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 85f3e49c05..e8fe875e70
Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am65-mcu.dtsi| 84
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 54 +
2 files changed, 85 insertions(+), 53 deletions
Make necessary driver changes to sync DT nodes from kernel.
Depends on [1]
Due to the dependencies, I would like this entire series to be merged via TI
tree.
Tested on AM654 and J721e boards
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=186589
Vignesh Raghavendra (5):
net: ti
with updated driver.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/Kconfig | 1 +
drivers/dma/ti/k3-udma.c | 145 +++
2 files changed, 103 insertions(+), 43 deletions(-)
diff --git a/drivers/dma/ti/Kconfig b/drivers
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii
.
v2:
Collect R-by
Update patch 2/3 to note about DT incompatibility
Vignesh Raghavendra (3):
dma: ti: Add static PSIL endpoint information
dma: ti: k3-udma: Update driver to use static endpoint Data
arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
arch/arm/dts/k3-am65-mcu.dtsi
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e
Hi Jagan,
On 15/06/20 9:21 pm, Pratyush Yadav wrote:
> On 05/06/20 06:14PM, Pratyush Yadav wrote:
>> Hi,
>>
>> This series adds support for octal DTR flashes in the spi-nor framework,
>> and then adds hooks for the Cypress Semper flash which is an xSPI
>> compliant Octal DTR flash.
>>
>> The
On 07/07/20 7:19 pm, Grygorii Strashko wrote:
>
>
> On 06/07/2020 11:06, Vignesh Raghavendra wrote:
>> Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
>>
>> Signed-off-by: Vignesh Raghavendra
>> ---
>> .../k3-j721
On 09/07/20 1:43 pm, Jagan Teki wrote:
> On Tue, Jul 7, 2020 at 7:00 PM Vignesh Raghavendra wrote:
>>
>> Hi Jagan,
>>
>> On 15/06/20 9:21 pm, Pratyush Yadav wrote:
>>> On 05/06/20 06:14PM, Pratyush Yadav wrote:
>>>> Hi,
>>>>
>&g
On 08/07/20 5:26 pm, Jagan Teki wrote:
> On Fri, Jun 5, 2020 at 6:16 PM Pratyush Yadav wrote:
>>
>> Since this flash doesn't have a Profile 1.0 table, the Octal DTR
>> capabilities are enabled in the post SFDP fixup, along with the 8D-8D-8D
>> fast read settings.
>>
>> Enable Octal DTR mode
Hi Jagan,
$subject: s/redundent/redundant
On 09/07/20 4:47 pm, Jagan Teki wrote:
> ---
[...]
> index b09046fec3..44cdb3151d 100644
> --- a/drivers/mtd/spi/sf-uclass.c
> +++ b/drivers/mtd/spi/sf-uclass.c
> @@ -122,7 +122,7 @@ static int spi_flash_std_erase(struct udevice *dev, u32
> offset,
On 09/07/20 4:47 pm, Jagan Teki wrote:
[...]
On 09/07/20 4:47 pm, Jagan Teki wrote:
> diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c
> index e1ee1e0624..9c80440bbb 100644
> --- a/arch/x86/cpu/apollolake/spl.c
> +++ b/arch/x86/cpu/apollolake/spl.c
> @@ -10,6 +10,7 @@
Hi,
On 02/07/20 1:32 pm, Faiz Abbas wrote:
[...]
> int am6_spl_early_init(void)
Can this be static or do you intend to use this outside of this func file?
> +{
> + int ret;
> +#if CONFIG_VAL(SYS_MALLOC_F_LEN)
> +#ifdef CONFIG_MALLOC_F_ADDR
> + gd->malloc_base = CONFIG_MALLOC_F_ADDR;
>
harder to review. Feel free to squash them
while merging or I can repost with 2/3 and 3/3 squashed
Vignesh Raghavendra (3):
dma: ti: Add static PSIL endpoint information
dma: ti: k3-udma: Update driver to use static endpoint Data
arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DT
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e-common-proc-board-u-boot.dtsi
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/Kconfig | 1 +
drivers/dma/ti/k3-udma.c | 145 +++
2 files changed, 103
On 15/06/20 11:49 am, Tero Kristo wrote:
> On 14/06/2020 16:49, Lokesh Vutla wrote:
>> Hi Tero,
>>
>> On 02/06/20 4:49 pm, Tero Kristo wrote:
>>> Hi,
>>>
>>> As there is looming death to OMAP4 Panda board u-boot support, I decided
>>> to take a shot and convert it to device model myself. With
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