Module Name: src
Committed By: jmcneill
Date: Fri Dec 5 11:53:22 UTC 2014
Modified Files:
src/sys/arch/arm/allwinner: awin_intr.h
Log Message:
Add missing A80 intr defs
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/allwinner/awin_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_intr.h
diff -u src/sys/arch/arm/allwinner/awin_intr.h:1.11 src/sys/arch/arm/allwinner/awin_intr.h:1.12
--- src/sys/arch/arm/allwinner/awin_intr.h:1.11 Fri Dec 5 01:13:11 2014
+++ src/sys/arch/arm/allwinner/awin_intr.h Fri Dec 5 11:53:22 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_intr.h,v 1.11 2014/12/05 01:13:11 jmcneill Exp $ */
+/* $NetBSD: awin_intr.h,v 1.12 2014/12/05 11:53:22 jmcneill Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -185,5 +185,70 @@
#define AWIN_A80_IRQ_TWI2 40
#define AWIN_A80_IRQ_TWI3 41
#define AWIN_A80_IRQ_TWI4 42
+#define AWIN_A80_IRQ_PA_EINT 43
+#define AWIN_A80_IRQ_PB_EINT 47
+#define AWIN_A80_IRQ_PE_EINT 48
+#define AWIN_A80_IRQ_PG_EINT 49
+#define AWIN_A80_IRQ_TIMER0 50
+#define AWIN_A80_IRQ_TIMER1 51
+#define AWIN_A80_IRQ_TIMER2 52
+#define AWIN_A80_IRQ_TIMER3 53
+#define AWIN_A80_IRQ_TIMER4 54
+#define AWIN_A80_IRQ_TIMER5 55
+#define AWIN_A80_IRQ_WATCHDOG 56
+#define AWIN_A80_IRQ_KEYADC 62
+#define AWIN_A80_IRQ_NMI 64
+#define AWIN_A80_IRQ_DMA 82
+#define AWIN_A80_IRQ_HSTIMER0 83
+#define AWIN_A80_IRQ_HSTIMER1 84
+#define AWIN_A80_IRQ_HSTIMER2 85
+#define AWIN_A80_IRQ_HSTIMER3 86
+#define AWIN_A80_IRQ_HSTIMER4 87
+#define AWIN_A80_IRQ_SMC 88
+#define AWIN_A80_IRQ_VE 90
+#define AWIN_A80_IRQ_SDMMC0 92
+#define AWIN_A80_IRQ_SDMMC1 93
+#define AWIN_A80_IRQ_SDMMC2 94
+#define AWIN_A80_IRQ_SDMMC3 95
+#define AWIN_A80_IRQ_SPI0 97
+#define AWIN_A80_IRQ_SPI1 98
+#define AWIN_A80_IRQ_SPI2 99
+#define AWIN_A80_IRQ_SPI3 100
+#define AWIN_A80_IRQ_NAND0 102
+#define AWIN_A80_IRQ_USB_DRD 103
+#define AWIN_A80_IRQ_USB_EHCI0 104
+#define AWIN_A80_IRQ_USB_OHCI0 105
+#define AWIN_A80_IRQ_USB_EHCI1 106
+#define AWIN_A80_IRQ_USB_EHCI2 108
+#define AWIN_A80_IRQ_USB_OHCI2 109
+#define AWIN_A80_IRQ_SS 112
+#define AWIN_A80_IRQ_TS 113
+#define AWIN_A80_IRQ_EMAC 114
+#define AWIN_A80_IRQ_MP 115
+#define AWIN_A80_IRQ_CSI0 116
+#define AWIN_A80_IRQ_CSI1 117
+#define AWIN_A80_IRQ_LCD0 118
+#define AWIN_A80_IRQ_LCD1 119
+#define AWIN_A80_IRQ_HDMI 120
+#define AWIN_A80_IRQ_MIPI_DSI 121
+#define AWIN_A80_IRQ_MIPI_CSI 122
+#define AWIN_A80_IRQ_DRC01 123
+#define AWIN_A80_IRQ_DEU01 124
+#define AWIN_A80_IRQ_DE_FE0 125
+#define AWIN_A80_IRQ_DE_FE1 126
+#define AWIN_A80_IRQ_DE_BE0 127
+#define AWIN_A80_IRQ_DE_BE1 128
+#define AWIN_A80_IRQ_GPU 129
+#define AWIN_A80_IRQ_GPU_PWR 130
+#define AWIN_A80_IRQ_FD 140
+#define AWIN_A80_IRQ_GPADC 141
+#define AWIN_A80_IRQ_THS 147
+#define AWIN_A80_IRQ_DE_BE2 148
+#define AWIN_A80_IRQ_DE_FE2 149
+#define AWIN_A80_IRQ_EDP 150
+#define AWIN_A80_IRQ_PH_EINT 152
+#define AWIN_A80_IRQ_CSI0_CCI 154
+#define AWIN_A80_IRQ_CSI1_CCI 155
+#define AWIN_A80_IRQ_CCI_400 156
#endif /* _ARM_ALLWINNER_AWIN_INTR_H_ */
