Module Name:    src
Committed By:   jmcneill
Date:           Fri Dec  5 11:53:43 UTC 2014

Modified Files:
        src/sys/arch/arm/allwinner: awin_gpio.c awin_io.c awin_reg.h awin_wdt.c

Log Message:
A80 gpio and watchdog support


To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/allwinner/awin_gpio.c
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/allwinner/awin_io.c
cvs rdiff -u -r1.58 -r1.59 src/sys/arch/arm/allwinner/awin_reg.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/allwinner/awin_wdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/allwinner/awin_gpio.c
diff -u src/sys/arch/arm/allwinner/awin_gpio.c:1.14 src/sys/arch/arm/allwinner/awin_gpio.c:1.15
--- src/sys/arch/arm/allwinner/awin_gpio.c:1.14	Sun Nov 23 23:04:58 2014
+++ src/sys/arch/arm/allwinner/awin_gpio.c	Fri Dec  5 11:53:43 2014
@@ -35,7 +35,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: awin_gpio.c,v 1.14 2014/11/23 23:04:58 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_gpio.c,v 1.15 2014/12/05 11:53:43 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -448,6 +448,41 @@ awin_gpio_init(void)
 		pin_groups[12].grp_offset = AWIN_A31_CPUPIO_OFFSET +
 					    1 * AWIN_PIO_GRP_SIZE;
 		pin_groups[12].grp_pin_mask = __BIT(AWIN_A31_PIO_PM_PINS) - 1;
+	} else if (awin_chip_id() == AWIN_CHIP_ID_A80) {
+		pin_groups[0].grp_pin_mask = __BIT(AWIN_A80_PIO_PA_PINS) - 1;
+		pin_groups[0].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   0 * AWIN_PIO_GRP_SIZE;
+		pin_groups[1].grp_pin_mask = __BIT(AWIN_A80_PIO_PB_PINS) - 1;
+		pin_groups[1].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   1 * AWIN_PIO_GRP_SIZE;
+		pin_groups[2].grp_pin_mask = __BIT(AWIN_A80_PIO_PC_PINS) - 1;
+		pin_groups[2].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   2 * AWIN_PIO_GRP_SIZE;
+		pin_groups[3].grp_pin_mask = __BIT(AWIN_A80_PIO_PD_PINS) - 1;
+		pin_groups[3].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   3 * AWIN_PIO_GRP_SIZE;
+		pin_groups[4].grp_pin_mask = __BIT(AWIN_A80_PIO_PE_PINS) - 1;
+		pin_groups[4].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   4 * AWIN_PIO_GRP_SIZE;
+		pin_groups[5].grp_pin_mask = __BIT(AWIN_A80_PIO_PF_PINS) - 1;
+		pin_groups[5].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   5 * AWIN_PIO_GRP_SIZE;
+		pin_groups[6].grp_pin_mask = __BIT(AWIN_A80_PIO_PG_PINS) - 1;
+		pin_groups[6].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   6 * AWIN_PIO_GRP_SIZE;
+		pin_groups[7].grp_pin_mask = __BIT(AWIN_A80_PIO_PH_PINS) - 1;
+		pin_groups[7].grp_offset = AWIN_A80_PIO_OFFSET + 
+					   7 * AWIN_PIO_GRP_SIZE;
+		pin_groups[8].grp_offset = 0;		/* PI */
+		pin_groups[8].grp_pin_mask = 0;		/* PI */
+		pin_groups[9].grp_offset = 0;		/* PJ */
+		pin_groups[9].grp_pin_mask = 0;		/* PJ */
+		pin_groups[10].grp_offset = 0;		/* PK */
+		pin_groups[10].grp_pin_mask = 0;	/* PK */
+		pin_groups[11].grp_offset = 0;		/* PL */
+		pin_groups[11].grp_pin_mask = 0;	/* PL */
+		pin_groups[12].grp_offset = 0;		/* PM */
+		pin_groups[12].grp_pin_mask = 0;	/* PM */
 	}
 
 	for (u_int i = 0; i < __arraycount(pin_groups); i++) {

Index: src/sys/arch/arm/allwinner/awin_io.c
diff -u src/sys/arch/arm/allwinner/awin_io.c:1.30 src/sys/arch/arm/allwinner/awin_io.c:1.31
--- src/sys/arch/arm/allwinner/awin_io.c:1.30	Fri Dec  5 01:13:11 2014
+++ src/sys/arch/arm/allwinner/awin_io.c	Fri Dec  5 11:53:43 2014
@@ -31,7 +31,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.30 2014/12/05 01:13:11 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.31 2014/12/05 11:53:43 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -94,7 +94,8 @@ awinio_print(void *aux, const char *pnp)
 
 static const struct awin_locators awin_locators[] = {
 	{ "awinicu", OFFANDSIZE(INTC), NOPORT, NOINTR, A10|REQ },
-	{ "awingpio", OFFANDSIZE(PIO), NOPORT, NOINTR, AANY|REQ },
+	{ "awingpio", OFFANDSIZE(PIO), NOPORT, NOINTR, A10|A20|A31|REQ },
+	{ "awingpio", OFFANDSIZE(A80_PIO), NOPORT, NOINTR, A80|REQ },
 	{ "awindma", OFFANDSIZE(DMA), NOPORT, AWIN_IRQ_DMA, A10|A20 },
 	{ "awindma", OFFANDSIZE(DMA), NOPORT, AWIN_A31_IRQ_DMA, A31 },
 	{ "awintmr", OFFANDSIZE(TMR), NOPORT, AWIN_IRQ_TMR0, A10 },
@@ -118,6 +119,7 @@ static const struct awin_locators awin_l
 	{ "awinhdmi", OFFANDSIZE(HDMI), NOPORT, AWIN_IRQ_HDMI0, A20 },
 	{ "awinhdmi", OFFANDSIZE(HDMI), NOPORT, AWIN_A31_IRQ_HDMI, A31 },
 	{ "awinwdt", OFFANDSIZE(TMR), NOPORT, NOINTR, A10|A20|A31 },
+	{ "awinwdt", OFFANDSIZE(A80_TIMER), NOPORT, NOINTR, A80 },
 	{ "awinrtc", OFFANDSIZE(TMR), NOPORT, NOINTR, A10|A20 },
 	{ "awinrtc", OFFANDSIZE(A31_RTC), NOPORT, NOINTR, A31 },
 	{ "awinusb", OFFANDSIZE(USB1), 0, NOINTR, A10|A20 },
@@ -135,6 +137,10 @@ static const struct awin_locators awin_l
 	{ "awinmmc", OFFANDSIZE(SDMMC1), 1, AWIN_A31_IRQ_SDMMC1, A31 },
 	{ "awinmmc", OFFANDSIZE(SDMMC2), 2, AWIN_A31_IRQ_SDMMC2, A31 },
 	{ "awinmmc", OFFANDSIZE(SDMMC3), 3, AWIN_A31_IRQ_SDMMC3, A31 },
+	{ "awinmmc", OFFANDSIZE(SDMMC0), 0, AWIN_A80_IRQ_SDMMC0, A80 },
+	{ "awinmmc", OFFANDSIZE(SDMMC1), 1, AWIN_A80_IRQ_SDMMC1, A80 },
+	{ "awinmmc", OFFANDSIZE(SDMMC2), 2, AWIN_A80_IRQ_SDMMC2, A80 },
+	{ "awinmmc", OFFANDSIZE(SDMMC3), 3, AWIN_A80_IRQ_SDMMC3, A80 },
 	{ "ahcisata", OFFANDSIZE(SATA), NOPORT, AWIN_IRQ_SATA, A10|A20 },
 	{ "awiniic", OFFANDSIZE(TWI0), 0, AWIN_IRQ_TWI0, A10|A20 },
 	{ "awiniic", OFFANDSIZE(TWI1), 1, AWIN_IRQ_TWI1, A10|A20 },

Index: src/sys/arch/arm/allwinner/awin_reg.h
diff -u src/sys/arch/arm/allwinner/awin_reg.h:1.58 src/sys/arch/arm/allwinner/awin_reg.h:1.59
--- src/sys/arch/arm/allwinner/awin_reg.h:1.58	Fri Dec  5 01:13:11 2014
+++ src/sys/arch/arm/allwinner/awin_reg.h	Fri Dec  5 11:53:43 2014
@@ -2684,4 +2684,13 @@ struct awin_a31_dma_desc {
 #define AWIN_A80_CCU_PLL_FACTOR_N	__BITS(15,8)
 #define AWIN_A80_CCU_PLL_POSTDIV_M	__BITS(1,0)
 
+#define AWIN_A80_PIO_PA_PINS		18
+#define AWIN_A80_PIO_PB_PINS		20
+#define AWIN_A80_PIO_PC_PINS		20
+#define AWIN_A80_PIO_PD_PINS		28
+#define AWIN_A80_PIO_PE_PINS		21
+#define AWIN_A80_PIO_PF_PINS		6
+#define AWIN_A80_PIO_PG_PINS		16
+#define AWIN_A80_PIO_PH_PINS		22
+
 #endif /* _ARM_ALLWINNER_AWIN_REG_H_ */

Index: src/sys/arch/arm/allwinner/awin_wdt.c
diff -u src/sys/arch/arm/allwinner/awin_wdt.c:1.5 src/sys/arch/arm/allwinner/awin_wdt.c:1.6
--- src/sys/arch/arm/allwinner/awin_wdt.c:1.5	Tue Nov 25 00:06:32 2014
+++ src/sys/arch/arm/allwinner/awin_wdt.c	Fri Dec  5 11:53:43 2014
@@ -33,7 +33,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: awin_wdt.c,v 1.5 2014/11/25 00:06:32 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_wdt.c,v 1.6 2014/12/05 11:53:43 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -132,12 +132,16 @@ awin_wdt_setmode(struct sysmon_wdog *smw
 	const uint8_t *map;
 	size_t mapsize;
 
-	if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+	switch (awin_chip_id()) {
+	case AWIN_CHIP_ID_A31:
+	case AWIN_CHIP_ID_A80:
 		map = period_map_a31;
 		mapsize = __arraycount(period_map_a31);
-	} else {
+		break;
+	default:
 		map = period_map;
 		mapsize = __arraycount(period_map);
+		break;
 	}
 
 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
@@ -148,7 +152,8 @@ awin_wdt_setmode(struct sysmon_wdog *smw
 	}
 
 	if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) {
-		if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+		if (awin_chip_id() == AWIN_CHIP_ID_A31 ||
+		    awin_chip_id() == AWIN_CHIP_ID_A80) {
 			bus_space_write_4(sc->sc_bst, sc->sc_bsh,
 			    AWIN_A31_WDOG1_CFG_REG,
 			    __SHIFTIN(AWIN_A31_WDOG_CFG_CONFIG_SYS,
@@ -172,7 +177,8 @@ awin_wdt_setmode(struct sysmon_wdog *smw
  		sc->sc_wdog_mode |= AWIN_WDOG_MODE_RST_EN;
 	}
 
-	if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+	if (awin_chip_id() == AWIN_CHIP_ID_A31 ||
+	    awin_chip_id() == AWIN_CHIP_ID_A80) {
 		bus_space_write_4(sc->sc_bst, sc->sc_bsh,
 		    AWIN_A31_WDOG1_CFG_REG,
 		    __SHIFTIN(AWIN_A31_WDOG_CFG_CONFIG_SYS,
@@ -216,12 +222,16 @@ awin_wdt_attach(device_t parent, device_
 	sc->sc_dev = self;
 	sc->sc_wdog_armed = (device_cfdata(self)->cf_flags & 1) != 0;
 
-	if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+	switch (awin_chip_id()) {
+	case AWIN_CHIP_ID_A31:
+	case AWIN_CHIP_ID_A80:
 		sc->sc_ctrl_reg = AWIN_A31_WDOG1_CTRL_REG;
 		sc->sc_mode_reg = AWIN_A31_WDOG1_MODE_REG;
-	} else {
+		break;
+	default:
 		sc->sc_ctrl_reg = AWIN_WDOG_CTRL_REG;
 		sc->sc_mode_reg = AWIN_WDOG_MODE_REG;
+		break;
 	}
 
 	sc->sc_bst = aio->aio_core_bst;
@@ -255,19 +265,28 @@ awin_wdt_attach(device_t parent, device_
 void
 awin_wdog_reset(void)
 {
+	bus_size_t off;
+
 	cpsid(I32_bit|F32_bit);
-	if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+
+	switch (awin_chip_id()) {
+	case AWIN_CHIP_ID_A31:
+	case AWIN_CHIP_ID_A80:
+		off = awin_chip_id() == AWIN_CHIP_ID_A80 ?
+		    AWIN_A80_TIMER_OFFSET : AWIN_TMR_OFFSET;
 		bus_space_write_4(&awin_bs_tag, awin_core_bsh,
-		    AWIN_TMR_OFFSET + AWIN_A31_WDOG1_CFG_REG,
+		    off + AWIN_A31_WDOG1_CFG_REG,
 		    __SHIFTIN(AWIN_A31_WDOG_CFG_CONFIG_SYS,
 			      AWIN_A31_WDOG_CFG_CONFIG));
 		bus_space_write_4(&awin_bs_tag, awin_core_bsh,
-		    AWIN_TMR_OFFSET + AWIN_A31_WDOG1_MODE_REG,
+		    off + AWIN_A31_WDOG1_MODE_REG,
 		    AWIN_A31_WDOG_MODE_EN);
-	} else {
+		break;
+	default:
 		bus_space_write_4(&awin_bs_tag, awin_core_bsh,
 		    AWIN_TMR_OFFSET + AWIN_WDOG_MODE_REG,
 		    AWIN_WDOG_MODE_EN | AWIN_WDOG_MODE_RST_EN);
+		break;
 	}
 	for (;;) {
 		__asm("wfi");

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