CVS commit: src/sys/arch/arm/allwinner

[Jared D. McNeill]

Module Name:    src
Committed By:   jmcneill
Date:           Thu Dec  4 02:12:07 UTC 2014

Modified Files:
        src/sys/arch/arm/allwinner: awin_board.c

Log Message:
for A31, when enabling pll, wait for pll to become stable before returning


To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/allwinner/awin_board.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/arm/allwinner/awin_board.c
diff -u src/sys/arch/arm/allwinner/awin_board.c:1.28 src/sys/arch/arm/allwinner/awin_board.c:1.29
--- src/sys/arch/arm/allwinner/awin_board.c:1.28	Wed Nov 12 21:27:48 2014
+++ src/sys/arch/arm/allwinner/awin_board.c	Thu Dec  4 02:12:07 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: awin_board.c,v 1.28 2014/11/12 21:27:48 jmcneill Exp $	*/
+/*	$NetBSD: awin_board.c,v 1.29 2014/12/04 02:12:07 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -36,7 +36,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.28 2014/11/12 21:27:48 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.29 2014/12/04 02:12:07 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -345,6 +345,13 @@ awin_pll6_enable(void)
 	if (ncfg != ocfg) {
 		bus_space_write_4(bst, bsh,
 		    AWIN_CCM_OFFSET + AWIN_PLL6_CFG_REG, ncfg);
+
+		if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+			do {
+				ncfg = bus_space_read_4(bst, bsh,
+				    AWIN_CCM_OFFSET + AWIN_PLL6_CFG_REG);
+			} while ((ncfg & AWIN_A31_PLL6_CFG_LOCK) == 0);
+		}
 	}
 #if 0
 	printf(" [pll6=%#x->%#x:n=%ju k=%ju m=%ju] ",
@@ -390,6 +397,13 @@ awin_pll2_enable(void)
 	if (ncfg != ocfg) {
 		bus_space_write_4(bst, bsh,
 		    AWIN_CCM_OFFSET + AWIN_PLL2_CFG_REG, ncfg);
+
+		if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+			do {
+				ncfg = bus_space_read_4(bst, bsh,
+				    AWIN_CCM_OFFSET + AWIN_PLL2_CFG_REG);
+			} while ((ncfg & AWIN_A31_PLL2_CFG_LOCK) == 0);
+		}
 	}
 }
 
@@ -459,6 +473,13 @@ awin_pll7_enable(void)
 	if (ncfg != ocfg) {
 		bus_space_write_4(bst, bsh,
 		    AWIN_CCM_OFFSET + AWIN_PLL7_CFG_REG, ncfg);
+
+		if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+			do {
+				ncfg = bus_space_read_4(bst, bsh,
+				    AWIN_CCM_OFFSET + AWIN_PLL7_CFG_REG);
+			} while ((ncfg & AWIN_A31_PLL7_CFG_LOCK) == 0);
+		}
 	}
 }