The example showed a prose constant following the abend-causing code. Original Message From: Tony Thigpen Sent: Sunday, May 14, 2017 07:06 To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Reply To: IBM Mainframe Assembler List Subject: Re: Quick error termination of an assembler routine (Was: Performance of Decimal Floating Point Instruction)
But, is 2 bytes "wasting the i-cache" in today's boxes? Tony Thigpen Charles Mills wrote on 05/14/2017 01:19 AM: > Well, in reality you are right of course (who cares about the i-cache?) but > in theory one is branching around and NOT crashing, so not wasting the > i-cache is a desirable goal. > > Charles > > > Gary Weinhold Senior Application Architect DATAKINETICS | Data Performance & Optimization Phone +1.613.523.5500 x216 Email: weinh...@dkl.com Visit us online at www.DKL.com E-mail Notification: The information contained in this email and any attachments is confidential and may be subject to copyright or other intellectual property protection. If you are not the intended recipient, you are not authorized to use or disclose this information, and we request that you notify us by reply mail or telephone and delete the original message from your mail system. -----Original Message----- > From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] > On Behalf Of Tony Thigpen > Sent: Saturday, May 13, 2017 7:20 PM > To: ASSEMBLER-LIST@LISTSERV.UGA.EDU > Subject: Re: Quick error termination of an assembler routine (Was: > Performance of Decimal Floating Point Instruction) > > Who cares about the Instruction Cache? You are crashing the program. > > Especially with just a one byte error code. We are talking about "it should > never get there" code, or test code to abend. > > Tony Thigpen > > Keven Hall wrote on 05/12/2017 06:53 PM: >> Regarding code like: >>> BZ NOERROR (If RC==0.) >>> DC X'00',C'You shouldn'ta done that.' >> >> I'd suggest documenting the error in source code rather than the > instruction cache (or using a 1-byte numeric error code. >> >> Possibly I'm being pedantic. For sure I'm dragging this thread ever > further from its original subject. >> >> Keven >> >>> On May 12, 2017, at 11:57, Paul Gilmartin > <00000014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote: >>> >>>> On 2017-05-12, at 09:56, somitcw wrote: >>>> >>>> My favourite was to branch to an odd address. >>>> >>>> S0C1 and S0C7 ABENDs are common, but any S0C6 abend was mine. >>>> If an operator called at 2:00AM, I would know who caused 3 pair of > socks. >>>> >>> Unfortunately, IIRC the exception occurs after the branch is taken so >>> the PSW provides no ready indication of the point of error. >>> >>>> Coding so that the assembler didn't flag it was needed but easy. >>>> Something like: >>>> >>>> BNE ERRLABEL-CSECT-1(BASEREG) >>>> >>> I suppose that could be doctored so the PSW points near either the >>> point at which the error was detected or to an error message. >>> >>> I think of: >>> BZ NOERROR (If RC==0.) >>> DC X'00',C'You shouldn'ta done that.' >>> NOERROR DS 0X >>> >>> -- gil >> >> > >
