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commit 94b7968c89d90daeaf4503de4fb4a5a3bbbd12d1 Author: raiden00pl <[email protected]> AuthorDate: Tue Aug 25 14:59:06 2026 +0200 arch/arm/stm32: Generalize Cortex-M33 core support Rename the U3/U5 idle, NVIC, and SysTick sources to the Cortex-M33 v1 naming convention: stm32_idle_m33_v1.c, stm32_irq_m33_v1.c, and stm32_timerisr_m33_v1.c, and move them into their own Make and CMake block, still selected by the direct U3/U5 family condition. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- arch/arm/src/common/stm32/CMakeLists.txt | 10 ++++++---- arch/arm/src/common/stm32/Make.defs | 10 +++++++--- .../stm32/{stm32_idle_m33_u3u5.c => stm32_idle_m33_v1.c} | 2 +- .../common/stm32/{stm32_irq_m33_u3u5.c => stm32_irq_m33_v1.c} | 2 +- .../{stm32_timerisr_m33_u3u5.c => stm32_timerisr_m33_v1.c} | 2 +- 5 files changed, 16 insertions(+), 10 deletions(-) diff --git a/arch/arm/src/common/stm32/CMakeLists.txt b/arch/arm/src/common/stm32/CMakeLists.txt index 97141455eaf..1095822cfe5 100644 --- a/arch/arm/src/common/stm32/CMakeLists.txt +++ b/arch/arm/src/common/stm32/CMakeLists.txt @@ -46,14 +46,16 @@ if(CONFIG_ARCH_CHIP_STM32U3 OR CONFIG_ARCH_CHIP_STM32U5) stm32_allocateheap_m33_u3u5.c stm32_exti_gpio_m33_u3u5.c stm32_gpio_m33_u3u5.c - stm32_irq_m33_u3u5.c stm32_lowputc_m33_u3u5.c stm32_serial_m33_u3u5.c - stm32_start_m33_u3u5.c - stm32_timerisr_m33_u3u5.c) + stm32_start_m33_u3u5.c) +endif() + +if(CONFIG_ARCH_CHIP_STM32U3 OR CONFIG_ARCH_CHIP_STM32U5) + list(APPEND SRCS stm32_irq_m33_v1.c stm32_timerisr_m33_v1.c) if(NOT CONFIG_ARCH_IDLE_CUSTOM) - list(APPEND SRCS stm32_idle_m33_u3u5.c) + list(APPEND SRCS stm32_idle_m33_v1.c) endif() endif() diff --git a/arch/arm/src/common/stm32/Make.defs b/arch/arm/src/common/stm32/Make.defs index f2a32fc60a4..c9a0feaaa12 100644 --- a/arch/arm/src/common/stm32/Make.defs +++ b/arch/arm/src/common/stm32/Make.defs @@ -54,13 +54,17 @@ ifneq ($(filter y,$(CONFIG_ARCH_CHIP_STM32U3) \ CHIP_CSRCS += stm32_allocateheap_m33_u3u5.c CHIP_CSRCS += stm32_exti_gpio_m33_u3u5.c CHIP_CSRCS += stm32_gpio_m33_u3u5.c -CHIP_CSRCS += stm32_irq_m33_u3u5.c CHIP_CSRCS += stm32_lowputc_m33_u3u5.c CHIP_CSRCS += stm32_serial_m33_u3u5.c CHIP_CSRCS += stm32_start_m33_u3u5.c -CHIP_CSRCS += stm32_timerisr_m33_u3u5.c +endif + +ifneq ($(filter y,$(CONFIG_ARCH_CHIP_STM32U3) \ + $(CONFIG_ARCH_CHIP_STM32U5)),) +CHIP_CSRCS += stm32_irq_m33_v1.c +CHIP_CSRCS += stm32_timerisr_m33_v1.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) -CHIP_CSRCS += stm32_idle_m33_u3u5.c +CHIP_CSRCS += stm32_idle_m33_v1.c endif endif diff --git a/arch/arm/src/common/stm32/stm32_idle_m33_u3u5.c b/arch/arm/src/common/stm32/stm32_idle_m33_v1.c similarity index 98% rename from arch/arm/src/common/stm32/stm32_idle_m33_u3u5.c rename to arch/arm/src/common/stm32/stm32_idle_m33_v1.c index d1264d6f22b..8a6722a87ef 100644 --- a/arch/arm/src/common/stm32/stm32_idle_m33_u3u5.c +++ b/arch/arm/src/common/stm32/stm32_idle_m33_v1.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/common/stm32/stm32_idle_m33_u3u5.c + * arch/arm/src/common/stm32/stm32_idle_m33_v1.c * * SPDX-License-Identifier: Apache-2.0 * diff --git a/arch/arm/src/common/stm32/stm32_irq_m33_u3u5.c b/arch/arm/src/common/stm32/stm32_irq_m33_v1.c similarity index 99% rename from arch/arm/src/common/stm32/stm32_irq_m33_u3u5.c rename to arch/arm/src/common/stm32/stm32_irq_m33_v1.c index 829d190766f..e91a2a61fc4 100644 --- a/arch/arm/src/common/stm32/stm32_irq_m33_u3u5.c +++ b/arch/arm/src/common/stm32/stm32_irq_m33_v1.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/common/stm32/stm32_irq_m33_u3u5.c + * arch/arm/src/common/stm32/stm32_irq_m33_v1.c * * SPDX-License-Identifier: Apache-2.0 * diff --git a/arch/arm/src/common/stm32/stm32_timerisr_m33_u3u5.c b/arch/arm/src/common/stm32/stm32_timerisr_m33_v1.c similarity index 98% rename from arch/arm/src/common/stm32/stm32_timerisr_m33_u3u5.c rename to arch/arm/src/common/stm32/stm32_timerisr_m33_v1.c index 15f2f01d59c..0c5bb9fbafb 100644 --- a/arch/arm/src/common/stm32/stm32_timerisr_m33_u3u5.c +++ b/arch/arm/src/common/stm32/stm32_timerisr_m33_v1.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/common/stm32/stm32_timerisr_m33_u3u5.c + * arch/arm/src/common/stm32/stm32_timerisr_m33_v1.c * * SPDX-License-Identifier: Apache-2.0 *
