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commit 7d0ad175ac5e073d082284642ae98e48c305a7fa Author: raiden00pl <[email protected]> AuthorDate: Mon Aug 24 11:01:34 2026 +0200 arch/arm/stm32: Unify Cortex-M33 RCC include names Rename the U3 and U5 family-local Cortex-M33 RCC headers to stm32_rcc_m33.h and dispatch to that private name for the two families in the common RCC header. This lets the shared M33 USART implementation use one include name while RCC registers and clock definitions remain family-local. Extend the stm32_ports.rst naming rules with the M33 header, source, and Kconfig symbol conventions. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- Documentation/guides/stm32_ports.rst | 9 +++++++-- arch/arm/src/common/stm32/stm32_rcc.h | 11 ++++------- arch/arm/src/stm32u3/{stm32_rcc_m33_u3.h => stm32_rcc_m33.h} | 10 +++++----- .../stm32/stm32_rcc_m33_u5.h => stm32u5/stm32_rcc_m33.h} | 10 +++++----- 4 files changed, 21 insertions(+), 19 deletions(-) diff --git a/Documentation/guides/stm32_ports.rst b/Documentation/guides/stm32_ports.rst index 264bf426e9a..da517a15341 100644 --- a/Documentation/guides/stm32_ports.rst +++ b/Documentation/guides/stm32_ports.rst @@ -47,7 +47,6 @@ STM32WL5 Cortex-M0+ unsupported none STM32WLE Cortex-M4 unsupported none ============ ================ =========== =========================== - Migration to NuttX 13.0 ======================= @@ -918,12 +917,15 @@ of a peripheral on a given core is ``V1``. - Facade headers: ``stm32_<periph>.h`` — dispatch on Kconfig IP symbols - M0-core variants: ``stm32_<periph>_m0_v1.h`` - M3/M4-core variants: ``stm32_<periph>_m3m4_v1.h``, ``stm32_<periph>_m3m4_v2.h`` +- M33-core variants: ``stm32_<periph>_m33_v1.h``, ``stm32_<periph>_m33_v3.h`` - Combined variants: ``stm32_<periph>_m3m4_v1v2.h``, ``stm32_<periph>_m3m4_v1v2v3.h`` **Source file naming** (``.c`` files): - Follow the same convention as headers: ``stm32_gpio_m3m4_v1v2.c``, - ``stm32_adc_m0_v1.c``, ``stm32_tim_m0_v1.c``, ``stm32_pwm_m3m4_v1v2v3.c`` + ``stm32_adc_m0_v1.c``, ``stm32_gpio_m33_v1.c``, + ``stm32_serial_m33_v3.c``, ``stm32_tim_m0_v1.c``, and + ``stm32_pwm_m3m4_v1v2v3.c`` **Kconfig symbol naming** (``CONFIG_STM32_HAVE_IP_<PERIPH>_<CORE>_<VERSION>``): @@ -932,6 +934,9 @@ of a peripheral on a given core is ``V1``. ``CONFIG_STM32_HAVE_IP_ADC_M3M4_V1``, ``CONFIG_STM32_HAVE_IP_ADC_M3M4_V2``, ``CONFIG_STM32_HAVE_IP_TIMERS_M3M4_V1``, ``CONFIG_STM32_HAVE_IP_TIMERS_M3M4_V2``, ``CONFIG_STM32_HAVE_IP_TIMERS_M3M4_V3`` +- M33: ``CONFIG_STM32_HAVE_IP_GPIO_M33_V1``, + ``CONFIG_STM32_HAVE_IP_EXTI_M33_V1``, and + ``CONFIG_STM32_HAVE_IP_USART_M33_V3`` Note that in the future the core prefix may be dropped and a single version number space used across all cores. For now the core prefix is diff --git a/arch/arm/src/common/stm32/stm32_rcc.h b/arch/arm/src/common/stm32/stm32_rcc.h index e91c77e3216..cc54a0079e0 100644 --- a/arch/arm/src/common/stm32/stm32_rcc.h +++ b/arch/arm/src/common/stm32/stm32_rcc.h @@ -27,13 +27,10 @@ * Included Files ****************************************************************************/ -#if defined(CONFIG_ARCH_CHIP_STM32U3) +#if defined(CONFIG_ARCH_CHIP_STM32U3) || \ + defined(CONFIG_ARCH_CHIP_STM32U5) -# include "stm32_rcc_m33_u3.h" - -#elif defined(CONFIG_ARCH_CHIP_STM32U5) - -# include "stm32_rcc_m33_u5.h" +# include "stm32_rcc_m33.h" #else @@ -234,5 +231,5 @@ void stm32_rcc_disablelsi(void); #endif #endif /* __ASSEMBLY__ */ -#endif /* CONFIG_ARCH_CHIP_STM32U5 */ +#endif /* STM32U3 || STM32U5 */ #endif /* __ARCH_ARM_SRC_COMMON_STM32_STM32_RCC_H */ diff --git a/arch/arm/src/stm32u3/stm32_rcc_m33_u3.h b/arch/arm/src/stm32u3/stm32_rcc_m33.h similarity index 92% rename from arch/arm/src/stm32u3/stm32_rcc_m33_u3.h rename to arch/arm/src/stm32u3/stm32_rcc_m33.h index d0285e4e85f..a2d5af1a072 100644 --- a/arch/arm/src/stm32u3/stm32_rcc_m33_u3.h +++ b/arch/arm/src/stm32u3/stm32_rcc_m33.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32u3/stm32_rcc_m33_u3.h + * arch/arm/src/stm32u3/stm32_rcc_m33.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32U3_STM32_RCC_M33_U3_H -#define __ARCH_ARM_SRC_STM32U3_STM32_RCC_M33_U3_H +#ifndef __ARCH_ARM_SRC_STM32U3_STM32_RCC_M33_H +#define __ARCH_ARM_SRC_STM32U3_STM32_RCC_M33_H /**************************************************************************** * Included Files @@ -35,7 +35,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* Common Cortex-M33 USART driver contract */ +/* USART clock and RCC definitions */ #define STM32_LPUART1_FREQUENCY STM32_PCLK3_FREQUENCY #define STM32_LPUART1_RCC_REG STM32_RCC_APB3ENR @@ -96,4 +96,4 @@ void stm32_rcc_enableperipherals(void); #endif #endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_STM32U3_STM32_RCC_M33_U3_H */ +#endif /* __ARCH_ARM_SRC_STM32U3_STM32_RCC_M33_H */ diff --git a/arch/arm/src/common/stm32/stm32_rcc_m33_u5.h b/arch/arm/src/stm32u5/stm32_rcc_m33.h similarity index 96% rename from arch/arm/src/common/stm32/stm32_rcc_m33_u5.h rename to arch/arm/src/stm32u5/stm32_rcc_m33.h index e0f69cb2a4e..0bee3e56f1c 100644 --- a/arch/arm/src/common/stm32/stm32_rcc_m33_u5.h +++ b/arch/arm/src/stm32u5/stm32_rcc_m33.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/common/stm32/stm32_rcc_m33_u5.h + * arch/arm/src/stm32u5/stm32_rcc_m33.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_COMMON_STM32_STM32_RCC_M33_U5_H -#define __ARCH_ARM_SRC_COMMON_STM32_STM32_RCC_M33_U5_H +#ifndef __ARCH_ARM_SRC_STM32U5_STM32_RCC_M33_H +#define __ARCH_ARM_SRC_STM32U5_STM32_RCC_M33_H /**************************************************************************** * Included Files @@ -42,7 +42,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* Common Cortex-M33 USART driver contract */ +/* USART clock and RCC definitions */ #define STM32_LPUART1_FREQUENCY STM32_PCLK3_FREQUENCY #define STM32_LPUART1_RCC_REG STM32_RCC_APB3ENR @@ -247,4 +247,4 @@ void stm32_rcc_enableperipherals(void); } #endif #endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_COMMON_STM32_STM32_RCC_M33_U5_H */ +#endif /* __ARCH_ARM_SRC_STM32U5_STM32_RCC_M33_H */
