Felix Kühling wrote:
Yes it is, because we went back to using vertexes instead of individual arrays, but forgot to reset this max value. I've committed the fix.On Wed, 05 Feb 2003 16:25:27 -0700 Keith Whitwell <[EMAIL PROTECTED]> wrote:Felix Kühling wrote:Mesa should respect ctx->Const.MaxArrayVertices, which should be being set in radeon_context.c --- it may be that this code is disabled - can you check that & try turning it back on.I attached a patch that fixes the problem. It introduces a new TCL_FALLBACK if there are too many vertices to fit into one DMA buffer. Looks kind of hackish to me. Does anyone have a better idea? Comments?
Found it: radeon_context.c around line 375: /* ctx->Const.MaxArrayLockSize = */ /* MIN2( ctx->Const.MaxArrayLockSize, */ /* RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE ); */ And then there is the definition of RADEON_MAX_TCL_VERTSIZE in radeon_tcl.h which is (4*4). However, I saw vertex_size==24! Maybe the real MAX_TCL_VERTSIZE is even bigger?
Keith
-------------------------------------------------------
This SF.NET email is sponsored by:
SourceForge Enterprise Edition + IBM + LinuxWorld = Something 2 See!
http://www.vasoftware.com
_______________________________________________
Dri-devel mailing list
[EMAIL PROTECTED]
https://lists.sourceforge.net/lists/listinfo/dri-devel