On Thu, 21 Jul 2011, Steve Stallings wrote: > Date: Thu, 21 Jul 2011 10:46:13 -0500 > From: Steve Stallings <steve...@newsguy.com> > Reply-To: EMC developers <emc-developers@lists.sourceforge.net> > To: 'EMC developers' <emc-developers@lists.sourceforge.net> > Subject: Re: [Emc-developers] Preempt-RT ... where to put the patches ? > > Peter, > > Good point about interrupt jitter mattering less if > the actual sample time does not jitter. Unfortunately > the current RTAI setup requires that the interrupt > comes from the host interrupt timers. If we could > get to a system model where the hardware could > sample the data at the same time that it also > requests an interrupt, then the actual interrupt > latency would be much less critical. The PC system > design does not bring out the interrupt request > anywhere, so syncing with it in hardware is not > possible, nor can RTAI (as best I know) accept an > interrupt from external hardware as the system timer.
What I was thinking about is living with the jitter, that is changing the math so that jitter is compensated for. This mostly means that any time the constant thread time is used in a PID/stepgen/motion calculations, the actual thread actuation time is used (jitter and all). That is if we can measure the jitter (we have a low overhead high resolution timer to read) we can compensate for it. For servo systems (or pseudo servo systems like hardware stepgens) jitter should really only cause second order errors ( commanded accell errors not velocity errors) As it is (without actual thread time factored in) even in an unaccelerated portion of a motion profile, a 10% jitter (say the D510s 100 Usec at a 1 KHz thread time) will cause the PID loop to see a 10 % velocity error (when in fact there may be no error at all). > > I wonder if Preempt-RT may be more flexible. > > Steve Stallings (unrepentant top poster) > > -----Original Message----- > From: Peter C. Wallace [mailto:p...@mesanet.com] > Sent: Thursday, July 21, 2011 9:34 AM > To: EMC developers > Subject: Re: [Emc-developers] Preempt-RT ... where to put the patches ? > > On Wed, 20 Jul 2011, Jon Elson wrote: > >> Date: Wed, 20 Jul 2011 20:41:44 -0500 >> From: Jon Elson <el...@pico-systems.com> >> Reply-To: EMC developers <emc-developers@lists.sourceforge.net> >> To: EMC developers <emc-developers@lists.sourceforge.net> >> Subject: Re: [Emc-developers] Preempt-RT ... where to put the patches ? >> >> Viesturs Lcis wrote: >> Out of curiosity I tried to find results for D510 and D525 boards - >> they both are mentioned in the list of tested systems. >> >> This is D510: >> > https://www.osadl.org/Latency-plot-of-system-in-rack-1-slot.qa-latencyplot-r > 1s4.0.html?latencies=&showno=&slider=228 >> >> This is D525: >> > https://www.osadl.org/Latency-plot-of-system-in-rack-4-slot.qa-latencyplot-r > 4s7.0.html?latencies=&showno=&slider=228 >> >> >> Where did they get 4 cores? From hyperthreading? Do I understand >> correctly that disabling hyperthreading should improve latency >> figures? >> Yup, the D510 is a CATASTROPHE, the D525 is just really bad. You could >> probably run a servo machine > > Well 100 uSec of jitter should be perfectly acceptable _if_ the PID > (or hardware stepgen) corrections were based on actual time instead of > thread > invocation time, heck even 500 uSec jitter might be OK. > > >> on the D525, but it isn't real good. Yes, I think the extra "CPUs" are >> from hyperthreading, and disabling >> it should help. >> >> Jon > > ---------------------------------------------------------------------------- > -- > 5 Ways to Improve & Secure Unified Communications > Unified Communications promises greater efficiencies for business. UC can > improve internal communications as well as offer faster, more efficient ways > to interact with customers and streamline customer service. Learn more! > http://www.accelacomm.com/jaw/sfnl/114/51426253/ > _______________________________________________ > Emc-developers mailing list > Emc-developers@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-developers > > Peter Wallace > Mesa Electronics > > (\__/) > (='.'=) This is Bunny. Copy and paste bunny into your > (")_(") signature to help him gain world domination. > > > ------------------------------------------------------------------------------ > 5 Ways to Improve & Secure Unified Communications > Unified Communications promises greater efficiencies for business. UC can > improve internal communications as well as offer faster, more efficient ways > to interact with customers and streamline customer service. Learn more! > http://www.accelacomm.com/jaw/sfnl/114/51426253/ > _______________________________________________ > Emc-developers mailing list > Emc-developers@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-developers > Peter Wallace Mesa Electronics (\__/) (='.'=) This is Bunny. Copy and paste bunny into your (")_(") signature to help him gain world domination. ------------------------------------------------------------------------------ 5 Ways to Improve & Secure Unified Communications Unified Communications promises greater efficiencies for business. UC can improve internal communications as well as offer faster, more efficient ways to interact with customers and streamline customer service. Learn more! http://www.accelacomm.com/jaw/sfnl/114/51426253/ _______________________________________________ Emc-developers mailing list Emc-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-developers
