Amund,

I have encountered similar problems with similarly designed boards.  In one
interesting case, I was able to get 30 dB reduction in radiated EMI by
adding a series resistor to a (fairly short) low-frequency clock line. Due
to use of modern devices, its rise and fall times were less than a
nanosecond. The resistor limits current in the trace, reducing also the
power required of the clock driver, and slows the slew rate. Improving
power distribution also made a large difference; power and ground planes
were added to the board and also improved signal integrity.

But I prefer to first attack problems such as yours with better decoupling.
One all-nighter long ago resulted in my soldering SMD capacitors directly
across pins on a device package, 1208 for the pins farther from grounds,
and 805's for ones closer to grounds. This made a considerable difference
but was greeted by my boss with, "YOU DID WHAT?!"  It DID open him up to
the possibility of less drastic measures previously ruled out.

The suggestions you've been given about power routing are on target. If you
distribute power and its return as a transmission line themselves, you can
at least control where noise on it goes, reducing THAT loop size, and
filters on this line may be expected to work predictably. However, do
remember that once you put noise on silicon, it gets onto everything else.
You must satisfy the need for current at each device: enough capacitance,
able to supply current quickly enough, at enough power and ground pin
pairs. If you allow device Vcc/ground to be periodically modulated by
device switching current, the noise produced will be present on every trace
leaving the device and you will not make it go away. That's why I first
look for good decoupling when doing schematic and layout reviews. THEN I
look for routing missteps and inadvertent loops.  Others may prefer to
approach things in a different order; that's just my preference. But it
works for me.

Good luck!


Cortland Richmond

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