On 18 August 2011 20:27, John Prentice <j...@castlewd.freeserve.co.uk> wrote:
> I suspect there could be a coding problem in 3pwmgen. The documentation and > the loaded component have "fault" as an output pin. All the description of > it suggests it should be an input (e.g. it disables the generator, the > invert pin alters it being active high/low etc.) It's been a while since I looked, but I think it was correct. There is a physical pin that the 7i39 uses to indicate that it has faulted, and a HAL pin to echo that status, IIRC. The physical pin is an input to the FPGA 3pwmgen, the "fault" HAL bit is an output. > Finally, just a clarification; I presume one nets the 5i20 GPIO pins defined > in the 7i39 manual to the "hall" inputs of the bldc component. Yes, indeed. They are just input pins, so don't get given a special status by the driver. (In fact, you could use them for something else if you had a different form of motor feedback, and simply use the 7i39 for signal conditioning) -- atp "Torque wrenches are for the obedience of fools and the guidance of wise men" ------------------------------------------------------------------------------ Get a FREE DOWNLOAD! and learn more about uberSVN rich system, user administration capabilities and model configuration. Take the hassle out of deploying and managing Subversion and the tools developers use with it. http://p.sf.net/sfu/wandisco-d2d-2 _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
