Hi All,

I did not see Mr. Lomax's post until after I sent mine to Richard but I agree
with his assessment for the characteristics and reasons he describes.

Unfortunately I feel we have gotten off the track of the original post.

I feel that The rules definition system  needs major help and Really would like
Geoff Harlands "rules generator" be at least considered.

As it is now when you load a  2.8 file into SE it knows enough to ask you
if you want many rules to be created, so at least part of the mechanism is
already there.

I just see enormous potential in an auto generator based on the Items
you would select on the board. It would ease the amount of time in setting
up rules and you could modify them based on selection.

If I am missing something Im sure I will be corrected,

As I see it if you assign gnd to three layers you can not selectively
choose which connections are made to which plane. This is where
Geoffs point is well taken that ANY given pad should be able to
be defined from thermal to blowout to direct hit to mask expansion
(both  + and -)  to layer assignment, etc. and done globally by the
drill or net or whatever.
This is where the auto generator would come in most handy. At least
that is my thought at this time but who knows what future uses may
present themselves.


Abd ul-Rahman Lomax wrote:

> That's an interesting workaround. I'd think of using component classes to
> determine the connection type and then I'd place blowout pads to disconnect
> the appropriate pads according to layer. These blowout pads could be part
> of the footprints for this customer. I'd probably make them 12 mils radial
> oversize beyond the hole size. (Pads can be placed on the inner plane layers.)

If I understand, this works for through hole comps (which should work I never
considered it) but what about the vias? Even if I use a free pad I don't have the
control I need. I really don't want to add extra pins to a lib part in the case
of a SMT component.

The editing of plane hits needs to be done at board level. I have a lib part
that is say, an soic16. Ground isn't always on the same pin so I need the
flexibility in the interconnect stage (actually this affects the footprint for the

thru hole described above as well).

> That the board work might mean that all this effort is *harmless*. But it
> is expensive to add two layers.

I try so save the customer dollars in Fab by reducing layers etc. that is part of
my value. But this has been discussed and they are adamant that the removal of
the additional gnd layers is not an option.

> If I were working for the client here, I'd suggest that they have a board
> fabbed both ways, one as described and the other without manipulation: the
> vias connect to all layers, as do the bypass caps and other parts. One
> experiment is worth a thousand engineers theorizing until their heads hurt.

I get the point but I don't work for that many customers with pockets
That deep.

Thanks for all the input.

Regards,

Jim McGrath
Cad Connections, Inc.


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