Terry wrote:
> Well w.................Stretch that a bit further and you could argue the
extra two
> planes are not buying you anything.
>
Terry,
I would have to disagree with you, Since you don't know the application
nor the design. Several possibities could exist for requiring multiple
planes.
Consider a 10-12 layer mutilayer design with requirements not exceeding
.060 overall thickness. You would have to drop inner plane layers to .05
oz instead of using a conventional stackup of 1 oz for internal planes.
Now add BGAS , high density QPFs, etc. and chop the plane up into little
pieces with fan out parts and 4000 vias. Fanout these parts our and you
may have conductor paths of less than 10 mils in many areas with .5 oz
copper trying to feed an FPGA capable of sucking down 3 amps. It doesn't
work well without producing allot of drop on the planes, resulting in noise.
Multiple planes can work to your advantage to reduce noise by supplying
cleaner power.
Also consider a design possible like Mr. McGrath is designing. Dirty Power
is supplied thu his internal planes. If they were using voltage sensors to
trip a comparator , the input must be precisely controlled and it must
precisely sense at the point of interest, not any drop somewhere else on the
plane. The more I thought about his requirements, I realized his customer
might know precisely what they are doing.
I could probably come up with about three more applications why this could
be a good practice. A good way to isolate/ connect analog to power gnd
planes, etc. Maybe there is real need for Protel to consider this
capability. It could be added in the design rules to plane clearance (by
layer). Mr. Mcgrath thank you for the insight for cleaner design.
Mike Reagan
EDSI
Frederick MD
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