This is a 45nm Xeon that I ran on. It also has a large cache. That
would only be relevant for the large FFT sized problems. The SSE 4.1
wouldn't be relevant, as we don't use it.

However the improvements to the cycle timing and frontside bus I can
believe would affect the scores.

It would be very nice to have timings on the same machine. Of course
it is 64 bit Core 2 linux and Windows that we are interested in.

Bill.

2009/3/3 Jeff Gilchrist <jeff.gilchr...@gmail.com>:
>
> On Tue, Mar 3, 2009 at 10:32 AM, Cactus <rieman...@googlemail.com> wrote:
>
>> My machine is a Dell M65 portable as follows:
>>
>> Intel Mobile Core 2 Duo T7400 running at 2.16GHz
>> Merom at 65nm, family 6, model F, stepping 6
>>
>> L1 2 x 32 KBytes data
>> L1 2 x 3 2KBytes instructions
>> L2 4096 KBytes
>
> Hmm, a Mobile Core 2 might also contains some difference as well.
> Here are the details of the 65nm and 45nm desktop Core2 versions I
> have.
>
> Intel Core 2 Duo E6600 (MMX, SSE, SSE2, SSE3, SSSE3, EM64T)
> Conroe at 65nm, family 6, model F, stepping 6
> L1 Data 2 x 32 KBytes
> L1 Instruc 2 x 32 KBytes
> L2 4096 KBytes
>
> Intel Core 2 Quad Q9550 (MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, EM64T)
> Yorkfield at 45nm, family 6, model 7, stepping 7
> L1 Data 4 x 32 KBytes
> L1 Instruc 4 x 32 KBytes
> L2 2 x 6144 KBytes
>
> Major difference difference between 65nm and 45nm Core2 is the
> addition of SSE4.1 instructions, plus I think they were able to
> optimize some things to improve cycle times.
>
> The FSB speeds are also different between Xeon, Desktop ,and
> especially Mobile Core2's which would also have an impact on the
> benchmark scores would it not?  Your mobile FSB is 667 MHz, the E6600
> runs at 1066 MHz, and the Q9550 runs at 1333 MHz.
>
> Jeff.
> - Show quoted text -
> >
>

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