Missing review: 3 and 5 Since v5: - Rebased - Swap temporaries during store (rth) - Bswap d0 and d1 in ST.D (rth)
Since v4: - No algorithm change - Split to ease review Philippe Mathieu-Daudé (6): target/mips: Expand TRANS_DF_iv() macro for MSA Load/Store target/mips: Convert MSA LD/ST.B (Byte Vector) target/mips: Convert MSA LD/ST.H (Halfword Vector) target/mips: Convert MSA LD/ST.W (Word Vector) target/mips: Convert MSA LD/ST.D (Doubleword Vector) accel/tcg: Remove non-explicit endian cpu_ld/st*_data*() helpers docs/devel/loads-stores.rst | 18 +-- include/accel/tcg/cpu-ldst.h | 48 -------- target/mips/tcg/msa_helper.h.inc | 9 -- target/mips/tcg/msa_helper.c | 186 ------------------------------- target/mips/tcg/msa_translate.c | 106 ++++++++++++++++-- 5 files changed, 103 insertions(+), 264 deletions(-) -- 2.55.0
