Re: [U-Boot] [PATCH] MIPS: fix endianess handling
On 12/4/11 9:02 PM, Daniel Schwierzeck wrote: diff --git a/boards.cfg b/boards.cfg index c83d861..2cd917e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -324,13 +324,13 @@ dbau1000 mipsmips32 dbau1x00- dbau1100 mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1100 dbau1500 mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1500 dbau1550 mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1550 -dbau1550_el mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1550 +dbau1550_el mipsmips32 dbau1x00- au1x00 dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN This looks Ok. gth2 mipsmips32 - - au1x00 incaip mipsmips32 incaip - incaip incaip_100MHzmipsmips32 incaip - incaip incaip:CPU_CLOCK_RATE=1 incaip_133MHzmipsmips32 incaip - incaip incaip:CPU_CLOCK_RATE=13300 incaip_150MHzmipsmips32 incaip - incaip incaip:CPU_CLOCK_RATE=15000 -pb1000 mipsmips32 pb1x00 - au1x00 pb1x00:PB1000 +pb1000 mipsmips32 pb1x00 - au1x00 pb1x00:PB1000,SYS_LITTLE_ENDIAN qemu_mipsmipsmips32 qemu-mips - - qemu-mips tb0229 mipsmips32 vct_premium mipsmips32 vct micronas - vct:VCT_PREMIUM But I don't see any reason CONFIG_SYS_LITTLE_ENDIAN is specified in boards.cfg. Just putting it in configs/pb1000.h is enough, isn't it? Shinya, do you have an opinion about this? No, if it works for you, I'm fine. Thanks for tackling this issue. Does anyone disagree with this change? If not, I'll pick this up. diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index e23865b..eab23b4 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -88,6 +88,10 @@ endif CFLAGS_NTR := $(call cc-option,-fno-toplevel-reorder) CFLAGS += $(CFLAGS_NTR) +# Pass through endianess settings in LDFLAGS to LD s/endianess/endianness/ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] mips32: fix wrong loop bound in flush_cache()
Hi, On 08/10/2011 04:11 PM, Yao Cheng wrote: > The issue is found when calling flush_cache() with zero "size" argument. > The bound of loop is miscalculated in this case and flush_cache() enters a > wrong flushing loop. > To fix this issue I skipped the operations when "size" is found to be zero. It feels like the last sentence is somewhat redundant (the diff output speaks for itself), so omitted. Other than that, the patch is ok and queued up to u-boot-mips/master. If no MIPS patches come up within a couple of weeks, I'll make a pull request. Thanks for your report, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] MIPS patche
Hi Wolfgang, please pull the following patch from Yao, thanks in advance. The following changes since commit a1118d60423c1fe25afc9df9015f72739f96fd67: MPC8xx: fix build problem for ETX094 board (2011-08-31 22:38:20 +0200) are available in the git repository at: git://git.denx.de/u-boot-mips.git master Yao Cheng (1): MIPS: mips32: fix wrong loop bound in flush_cache() arch/mips/cpu/mips32/cpu.c |4 1 files changed, 4 insertions(+), 0 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] MIPS: tb0229 build error caused by reference
Hi Komiya-san, Since the commit below, tb0229 target has been broken for months because and can not be easily included as used to by MIPS ports any more. > commit b36df561154bdd0a41bb77e09c5575ca2cf48013 > Author: Stefan Roese > Date: Thu Sep 9 19:18:00 2010 +0200 > > ppc4xx: Move ppc4xx headers to powerpc include directory > > This patch moves some ppc4xx related headers from the common include > directory (include/) to the powerpc specific one > (arch/powerpc/include/asm/). This way to common include directory is not > so cluttered with files. > > Signed-off-by: Stefan Roese $ ./MAKEALL tb0229 [...] flash.c:27: fatal error: asm/ppc4xx.h: No such file or directory make[1]: *** [flash.o] Error 1 I can not come up with a reasonble workaround at this moment. Could you take a look please? And let us know what we do next, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/5] MIPS: Refactoring and cleanup of CPU and SoC code
On 03/29/2011 01:33 AM, daniel.schwierz...@googlemail.com wrote: > This patch series refactors the Mips CPU directory and put all current > code into an own mips32 subdirectory. Furthermore the SoC specific code > of IncaIP and Au1x00 is moved to separate SoC subdirectories. > The support for Purple is dropped because not actively maintained > anymore. > > Changes since RFC/v1: > - drop Purple supported as agreed with Wolfgang Denk > - use MIPS rather than Mips in patch subject > - fixed Cc lines in all patches > > Changes since v2: > - reverted patch for endianess flag setup > - always use -march=mips32r2 as default CPU optimization for > all MIPS32 CPU cores > > Daniel Schwierzeck (5): > MIPS: Purple: Remove Purple support > MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32 > MIPS: Optimize the setup of CPU optimization flags > MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory > MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory I've reviewed and build tested, all patches look good. Applied and queued to u-boot-mips tree along with several s/Mips/MIPS/ keyword cleanups in the git commitlogs. Will make a pull-request once v2011.03 gets released. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] MIPS patches
Hi,
Please pull the MIPS updates, thanks in advance.
--- 8< ---
The following changes since commit 67a490d60d70f2b01d55976440ba30154af96965:
atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN (2011-04-01 14:49:08
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-mips.git master
Daniel Schwierzeck (5):
MIPS: Purple: Remove Purple support
MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32
MIPS: Optimize the setup of CPU optimization flags
MIPS: IncaIP: Move all IncaIP specific code to separate subdirectory
MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectory
MAINTAINERS|1 -
MAKEALL|4 +-
arch/mips/cpu/{ => mips32}/Makefile|5 -
.../mips/cpu/mips32/au1x00}/Makefile | 15 +-
arch/mips/cpu/{ => mips32/au1x00}/au1x00_eth.c |0
arch/mips/cpu/{ => mips32/au1x00}/au1x00_serial.c |0
.../mips/cpu/{ => mips32/au1x00}/au1x00_usb_ohci.c |0
.../mips/cpu/{ => mips32/au1x00}/au1x00_usb_ohci.h |0
.../mips/cpu/mips32/au1x00}/config.mk | 12 +-
arch/mips/cpu/{ => mips32}/cache.S |4 -
arch/mips/cpu/{ => mips32}/config.mk | 15 +-
arch/mips/cpu/{ => mips32}/cpu.c |0
.../mips/cpu/mips32/incaip}/Makefile | 16 +-
arch/mips/cpu/{ => mips32/incaip}/asc_serial.c | 83 ---
arch/mips/cpu/{ => mips32/incaip}/asc_serial.h |0
.../mips/cpu/mips32/incaip}/config.mk | 12 +-
arch/mips/cpu/{ => mips32/incaip}/incaip_clock.c |0
arch/mips/cpu/{ => mips32/incaip}/incaip_wdt.S |0
arch/mips/cpu/{ => mips32}/interrupts.c|0
arch/mips/cpu/{ => mips32}/start.S | 32 -
arch/mips/include/asm/inca-ip.h| 10 -
arch/mips/lib/board.c | 10 -
board/purple/flash.c | 595
board/purple/lowlevel_init.S | 36 --
board/purple/purple.c | 284 --
board/purple/sconsole.c| 125
board/purple/sconsole.h| 46 --
board/purple/u-boot.lds| 75 ---
boards.cfg | 51 +-
doc/README.Purple | 84 ---
include/configs/purple.h | 173 --
31 files changed, 53 insertions(+), 1635 deletions(-)
rename arch/mips/cpu/{ => mips32}/Makefile (87%)
copy {board/purple => arch/mips/cpu/mips32/au1x00}/Makefile (83%)
rename arch/mips/cpu/{ => mips32/au1x00}/au1x00_eth.c (100%)
rename arch/mips/cpu/{ => mips32/au1x00}/au1x00_serial.c (100%)
rename arch/mips/cpu/{ => mips32/au1x00}/au1x00_usb_ohci.c (100%)
rename arch/mips/cpu/{ => mips32/au1x00}/au1x00_usb_ohci.h (100%)
copy {board/purple => arch/mips/cpu/mips32/au1x00}/config.mk (83%)
rename arch/mips/cpu/{ => mips32}/cache.S (98%)
rename arch/mips/cpu/{ => mips32}/config.mk (83%)
rename arch/mips/cpu/{ => mips32}/cpu.c (100%)
rename {board/purple => arch/mips/cpu/mips32/incaip}/Makefile (83%)
rename arch/mips/cpu/{ => mips32/incaip}/asc_serial.c (77%)
rename arch/mips/cpu/{ => mips32/incaip}/asc_serial.h (100%)
rename {board/purple => arch/mips/cpu/mips32/incaip}/config.mk (83%)
rename arch/mips/cpu/{ => mips32/incaip}/incaip_clock.c (100%)
rename arch/mips/cpu/{ => mips32/incaip}/incaip_wdt.S (100%)
rename arch/mips/cpu/{ => mips32}/interrupts.c (100%)
rename arch/mips/cpu/{ => mips32}/start.S (92%)
delete mode 100644 board/purple/flash.c
delete mode 100644 board/purple/lowlevel_init.S
delete mode 100644 board/purple/purple.c
delete mode 100644 board/purple/sconsole.c
delete mode 100644 board/purple/sconsole.h
delete mode 100644 board/purple/u-boot.lds
delete mode 100644 doc/README.Purple
delete mode 100644 include/configs/purple.h
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[U-Boot] [MIPS 0/2] Trivial cleanups
Two boring patches for common MIPS area. Build tested on gth2, and verified no logical changes are incorporated. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] MIPS: Remove mips_cache_lock() feature
As requested in commit e1390801a3c1a2b6d12fa90be368efc19f5b9bfd ([MIPS] Request for the 'mips_cache_lock()' removal), such feature is no longer needed for current MIPS implementation of U-Boot, and no one in the tree use it for years. Signed-off-by: Shinya Kuribayashi --- arch/mips/cpu/mips32/cache.S | 93 -- arch/mips/cpu/mips32/start.S |7 --- 2 files changed, 0 insertions(+), 100 deletions(-) diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index 2965938..edc0674 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -51,75 +51,6 @@ .setpop .endm -/* - * cacheop macro to automate cache operations - * first some helpers... - */ -#define _mincache(size, maxsize) \ - bltu size,maxsize,9f ; \ - move size,maxsize ;\ -9: - -#define _align(minaddr, maxaddr, linesize) \ - .set noat ; \ - subu AT,linesize,1 ; \ - not AT ;\ - and minaddr,AT ; \ - addu maxaddr,-1 ; \ - and maxaddr,AT ; \ - .set at - -/* general operations */ -#define doop1(op1) \ - cache op1,0(a0) -#define doop2(op1, op2) \ - cache op1,0(a0) ;\ - nop ; \ - cache op2,0(a0) - -/* specials for cache initialisation */ -#define doop1lw(op1) \ - lw zero,0(a0) -#define doop1lw1(op1) \ - cache op1,0(a0) ;\ - lw zero,0(a0) ; \ - cache op1,0(a0) -#define doop121(op1,op2) \ - cache op1,0(a0) ;\ - nop; \ - cache op2,0(a0) ;\ - nop; \ - cache op1,0(a0) - -#define _oploopn(minaddr, maxaddr, linesize, tag, ops) \ - .set noreorder ;\ -10: doop##tag##ops ; \ - bne minaddr,maxaddr,10b ; \ - add minaddr,linesize ; \ - .set reorder - -/* finally the cache operation macros */ -#define vcacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \ - blez n,11f ;\ - addu n,kva ;\ - _align(kva, n, cacheLineSize) ; \ - _oploopn(kva, n, cacheLineSize, tag, ops) ; \ -11: - -#define icacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \ - _mincache(n, cacheSize); \ - blez n,11f ;\ - addu n,kva ;\ - _align(kva, n, cacheLineSize) ; \ - _oploopn(kva, n, cacheLineSize, tag, ops) ; \ -11: - -#define vcacheop(kva, n, cacheSize, cacheLineSize, op) \ - vcacheopn(kva, n, cacheSize, cacheLineSize, 1, (op)) - -#define icacheop(kva, n, cacheSize, cacheLineSize, op) \ - icacheopn(kva, n, cacheSize, cacheLineSize, 1, (op)) - .macro f_fill64 dst, offset, val LONG_S \val, (\offset + 0 * LONGSIZE)(\dst) LONG_S \val, (\offset + 1 * LONGSIZE)(\dst) @@ -302,27 +233,3 @@ LEAF(dcache_enable) mtc0t0, CP0_CONFIG jr ra END(dcache_enable) - -#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS -/*** -* -* mips_cache_lock - lock RAM area pointed to by a0 in cache. -* -* RETURNS: N/A -* -*/ -# define CACHE_LOCK_SIZE (CONFIG_SYS_DCACHE_SIZE) - .globl mips_cache_lock - .entmips_cache_lock -mips_cache_lock: - li a1, CKSEG0 - CACHE_LOCK_SIZE - addua0, a1 - li a2, CACHE_LOCK_SIZE - li a3, CONFIG_SYS_CACHELINE_SIZE - movea1, a2 - icacheop(a0,a1,a2,a3,0x1d) - - jr ra - - .endmips_cache_lock -#endif /* CONFIG_SYS_INIT_RAM_LOCK_MIPS */ diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index e661d46..0a9d9d5 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -252,13 +252,6 @@ reset: /* Set up temporary stack. */ -#ifdef CONFIG_SYS_INIT_RAM_LOCK_MIPS - li a0, CONFIG_SYS_INIT_SP_OFFSET - la t9, mips_cache_lock - jalrt9 - nop -#endif - li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET la sp, 0(t0) -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] MIPS: Coding style cleanups on common assembly files
Fix style issues and alignments globally. No logical changes. - Replace C comments with AS line comments where possible - Use ifndef where possible, rather than if !defined for simplicity - An instruction executed in a delay slot is now indicated by a leading space, not by C comment Signed-off-by: Shinya Kuribayashi --- arch/mips/cpu/mips32/cache.S | 81 ++--- arch/mips/cpu/mips32/start.S | 117 +++-- 2 files changed, 92 insertions(+), 106 deletions(-) diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index edc0674..5ce0ec4 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -76,8 +76,8 @@ * mips_init_icache(uint PRId, ulong icache_size, unchar icache_linesz) */ LEAF(mips_init_icache) - bleza1, 9f - mtc0zero, CP0_TAGLO + bleza1, 9f + mtc0zero, CP0_TAGLO /* clear tag to invalidate */ PTR_LI t0, INDEX_BASE PTR_ADDUt1, t0, a1 @@ -94,15 +94,15 @@ LEAF(mips_init_icache) 1: cache_opIndex_Store_Tag_I t0 PTR_ADDUt0, a2 bne t0, t1, 1b -9: jr ra +9: jr ra END(mips_init_icache) /* * mips_init_dcache(uint PRId, ulong dcache_size, unchar dcache_linesz) */ LEAF(mips_init_dcache) - bleza1, 9f - mtc0zero, CP0_TAGLO + bleza1, 9f + mtc0zero, CP0_TAGLO /* clear all tags */ PTR_LI t0, INDEX_BASE PTR_ADDUt1, t0, a1 @@ -119,25 +119,23 @@ LEAF(mips_init_dcache) 1: cache_opIndex_Store_Tag_D t0 PTR_ADDUt0, a2 bne t0, t1, 1b -9: jr ra +9: jr ra END(mips_init_dcache) -/*** -* -* mips_cache_reset - low level initialisation of the primary caches -* -* This routine initialises the primary caches to ensure that they -* have good parity. It must be called by the ROM before any cached locations -* are used to prevent the possibility of data with bad parity being written to -* memory. -* To initialise the instruction cache it is essential that a source of data -* with good parity is available. This routine -* will initialise an area of memory starting at location zero to be used as -* a source of parity. -* -* RETURNS: N/A -* -*/ +/* + * mips_cache_reset - low level initialisation of the primary caches + * + * This routine initialises the primary caches to ensure that they have good + * parity. It must be called by the ROM before any cached locations are used + * to prevent the possibility of data with bad parity being written to memory. + * + * To initialise the instruction cache it is essential that a source of data + * with good parity is available. This routine will initialise an area of + * memory starting at location zero to be used as a source of parity. + * + * RETURNS: N/A + * + */ NESTED(mips_cache_reset, 0, ra) moveRA, ra li t2, CONFIG_SYS_ICACHE_SIZE @@ -185,13 +183,12 @@ NESTED(mips_cache_reset, 0, ra) jr RA END(mips_cache_reset) -/*** -* -* dcache_status - get cache status -* -* RETURNS: 0 - cache disabled; 1 - cache enabled -* -*/ +/* + * dcache_status - get cache status + * + * RETURNS: 0 - cache disabled; 1 - cache enabled + * + */ LEAF(dcache_status) mfc0t0, CP0_CONFIG li t1, CONF_CM_UNCACHED @@ -202,13 +199,12 @@ LEAF(dcache_status) 2: jr ra END(dcache_status) -/*** -* -* dcache_disable - disable cache -* -* RETURNS: N/A -* -*/ +/* + * dcache_disable - disable cache + * + * RETURNS: N/A + * + */ LEAF(dcache_disable) mfc0t0, CP0_CONFIG li t1, -8 @@ -218,13 +214,12 @@ LEAF(dcache_disable) jr ra END(dcache_disable) -/*** -* -* dcache_enable - enable cache -* -* RETURNS: N/A -* -*/ +/* + * dcache_enable - enable cache + * + * RETURNS: N/A + * + */ LEAF(dcache_enable) mfc0t0, CP0_CONFIG ori t0, CONF_CM_CMASK diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index 0a9d9d5..f1e3447 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -62,11 +62,11 @@ .globl _start .text _start: - RVECENT(reset,0)/* U-boot entry point */ - RVECENT(reset,1)/* software reboot */ -#if defined(CONFIG_INCA_IP) - .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ - .word 0x /* phase of the flash*/ + RVECENT(reset,0
Re: [U-Boot] [PATCH 2/2] MIPS: Coding style cleanups on common assembly files
On 04/12/2011 12:35 AM, Daniel Schwierzeck wrote: >> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S >> index 0a9d9d5..f1e3447 100644 >> --- a/arch/mips/cpu/mips32/start.S >> +++ b/arch/mips/cpu/mips32/start.S >> @@ -62,11 +62,11 @@ >>.globl _start >>.text >> _start: >> - RVECENT(reset,0)/* U-boot entry point */ >> - RVECENT(reset,1)/* software reboot */ >> -#if defined(CONFIG_INCA_IP) >> - .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting >> */ >> - .word 0x /* phase of the flash >> */ >> + RVECENT(reset,0)# U-boot entry point >> + RVECENT(reset,1)# software reboot >> +#ifdef CONFIG_INCA_IP >> + .word INFINEON_EBU_BOOTCFG # EBU init code, fetched >> during >> + .word 0x# booting phase of the flash >> #else >>RVECENT(romReserved,2) >> #endif > > can we use #ifdef INFINEON_EBU_BOOTCFG instead? This would help me > with other SOCs which uses this feature too. I don't see any problem with that plan, although I'm not sure what EBU stands for and whether it could be generalized for other SoCs or not at this moment. Anyway patches are welcome. But that's out of the scope of this clean- up patch, so should be prepared separately. > you missed that line: > XVECENT(romExcHandle,0x380) /* bfc00380: R4000 general vector */ Thanks, now fixed. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MIPS: Introduce --gc-sections for MIPS
On 04/16/2011 12:16 AM, daniel.schwierz...@googlemail.com wrote: > All architectures but MIPS are using --gc-sections on final linking. > This patch introduces that feature for MIPS to reduce the memory and > flash footprint. > > Signed-off-by: Daniel Schwierzeck > Cc: Shinya Kuribayashi > Cc: Wolfgang Denk > Cc: Stefan Roese > Cc: Thomas Lange > Cc: Vlad Lungu > --- > Tested with ELDK-4.1 and self-built gcc-4.3.3/binutils-2.19.1 on my > boards. I could not test the other boards so I would appreciate it if > the maintainers in CC could do a quick test on their boards. > > arch/mips/config.mk |2 ++ > board/dbau1x00/u-boot.lds | 10 +- > board/gth2/u-boot.lds | 10 +- > board/incaip/u-boot.lds | 10 +- > board/micronas/vct/u-boot.lds | 10 +- > board/pb1x00/u-boot.lds | 10 +- > board/qemu-mips/u-boot.lds| 10 +- > board/tb0229/u-boot.lds | 10 +- > examples/standalone/mips.lds | 10 +- > 9 files changed, 42 insertions(+), 40 deletions(-) Basically, changes made look good. I'm going to apply after a couple of weeks (or a month) of interval, even without reports from the maintainers. As the patch has been proposed in the last minutes during the merge window, we'll make it in the v2011.06 release, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MIPS: Move timer code to arch/mips/cpu/$(CPU)/
Current timer routines (arch/mips/lib/timer.c) are implemented assuming
that MIPS32 coprocessor (CP0) resources, Counter and Compare registers
in this case, are available. But this doesn't always work.
We need to make sure that all MIPS-based systems don't necessarily use
CP0 counter/compare registers as time keeping resources. And some MIPS
variant processors might come with different hardware specs with genuine
MIPS32 CP0 registers.
This patch makes each $(CPU) can have its own timer code.
Signed-off-by: Shinya Kuribayashi
---
arch/mips/cpu/mips32/Makefile|2 +-
arch/mips/{lib => cpu/mips32}/time.c |0
arch/mips/lib/Makefile |1 -
3 files changed, 1 insertions(+), 2 deletions(-)
rename arch/mips/{lib => cpu/mips32}/time.c (100%)
diff --git a/arch/mips/cpu/mips32/Makefile b/arch/mips/cpu/mips32/Makefile
index e315c1b..eb8e005 100644
--- a/arch/mips/cpu/mips32/Makefile
+++ b/arch/mips/cpu/mips32/Makefile
@@ -27,7 +27,7 @@ LIB = $(obj)lib$(CPU).o
START = start.o
SOBJS-y= cache.o
-COBJS-y= cpu.o interrupts.o
+COBJS-y= cpu.o interrupts.o time.o
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/arch/mips/lib/time.c b/arch/mips/cpu/mips32/time.c
similarity index 100%
rename from arch/mips/lib/time.c
rename to arch/mips/cpu/mips32/time.c
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 4e90704..9244f31 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -33,7 +33,6 @@ COBJS-y += bootm_qemu_mips.o
else
COBJS-y+= bootm.o
endif
-COBJS-y+= time.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
--
1.7.4.5
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[U-Boot] [GIT PULL] MIPS patches
Hi,
Please pull the MIPS updates, thanks in advance.
--- 8< ---
The following changes since commit 96d04c3150ae9284500aef48803d7d132968f2b2:
IDE: fix compiler warnings (2011-04-30 23:29:55 +0200)
are available in the git repository at:
ssh://gu-m...@git.denx.de/u-boot-mips.git master
Daniel Schwierzeck (1):
MIPS: Introduce --gc-sections for MIPS
Shinya Kuribayashi (3):
MIPS: Remove mips_cache_lock() feature
MIPS: Coding style cleanups on common assembly files
MIPS: Move timer code to arch/mips/cpu/$(CPU)/
arch/mips/config.mk |2 +
arch/mips/cpu/mips32/Makefile|2 +-
arch/mips/cpu/mips32/cache.S | 174 --
arch/mips/cpu/mips32/start.S | 124 +++--
arch/mips/{lib => cpu/mips32}/time.c |0
arch/mips/lib/Makefile |1 -
board/dbau1x00/u-boot.lds| 10 +-
board/gth2/u-boot.lds| 10 +-
board/incaip/u-boot.lds | 10 +-
board/micronas/vct/u-boot.lds| 10 +-
board/pb1x00/u-boot.lds | 10 +-
board/qemu-mips/u-boot.lds | 10 +-
board/tb0229/u-boot.lds | 10 +-
examples/standalone/mips.lds | 10 +-
14 files changed, 135 insertions(+), 248 deletions(-)
rename arch/mips/{lib => cpu/mips32}/time.c (100%)
diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index 318d34b..6ab8acd 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -50,3 +50,5 @@ PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic
PLATFORM_CPPFLAGS += -msoft-float
PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib
+PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
+LDFLAGS_FINAL += --gc-sections
diff --git a/arch/mips/cpu/mips32/Makefile b/arch/mips/cpu/mips32/Makefile
index e315c1b..eb8e005 100644
--- a/arch/mips/cpu/mips32/Makefile
+++ b/arch/mips/cpu/mips32/Makefile
@@ -27,7 +27,7 @@ LIB = $(obj)lib$(CPU).o
START = start.o
SOBJS-y= cache.o
-COBJS-y= cpu.o interrupts.o
+COBJS-y= cpu.o interrupts.o time.o
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S
index 2965938..5ce0ec4 100644
--- a/arch/mips/cpu/mips32/cache.S
+++ b/arch/mips/cpu/mips32/cache.S
@@ -51,75 +51,6 @@
.setpop
.endm
-/*
- * cacheop macro to automate cache operations
- * first some helpers...
- */
-#define _mincache(size, maxsize) \
- bltu size,maxsize,9f ; \
- move size,maxsize ;\
-9:
-
-#define _align(minaddr, maxaddr, linesize) \
- .set noat ; \
- subu AT,linesize,1 ; \
- not AT ;\
- and minaddr,AT ; \
- addu maxaddr,-1 ; \
- and maxaddr,AT ; \
- .set at
-
-/* general operations */
-#define doop1(op1) \
- cache op1,0(a0)
-#define doop2(op1, op2) \
- cache op1,0(a0) ;\
- nop ; \
- cache op2,0(a0)
-
-/* specials for cache initialisation */
-#define doop1lw(op1) \
- lw zero,0(a0)
-#define doop1lw1(op1) \
- cache op1,0(a0) ;\
- lw zero,0(a0) ; \
- cache op1,0(a0)
-#define doop121(op1,op2) \
- cache op1,0(a0) ;\
- nop; \
- cache op2,0(a0) ;\
- nop; \
- cache op1,0(a0)
-
-#define _oploopn(minaddr, maxaddr, linesize, tag, ops) \
- .set noreorder ;\
-10: doop##tag##ops ; \
- bne minaddr,maxaddr,10b ; \
- add minaddr,linesize ; \
- .set reorder
-
-/* finally the cache operation macros */
-#define vcacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \
- blez n,11f ;\
- addu n,kva ;\
- _align(kva, n, cacheLineSize) ; \
- _oploopn(kva, n, cacheLineSize, tag, ops) ; \
-11:
-
-#define icacheopn(kva, n, cacheSize, cacheLineSize, tag, ops) \
- _mincache(n, cacheSize); \
- blez n,11f ;\
- addu n,kva ;\
- _align(kva, n, cacheLineSize) ; \
- _oploopn(kva, n, cacheLineSize, tag, ops) ; \
-11:
-
-#define vcacheop(kva, n, cacheSize, cacheLineSize, op) \
- vcacheopn(kva, n, cacheSize, cacheLineSize, 1, (op))
-
-#define icacheop(kva, n, cacheSize, cacheLineSize, op) \
- icacheopn(kva, n, cacheSize, cacheLineSize, 1, (op))
-
.macro f_fill64 dst, offset, val
LONG_S \val, (\offset + 0 * LONGSIZE)(\dst)
LONG_S \val, (\offset + 1 * LONGSIZE)(\dst)
@@ -145,8 +76,8 @@
* mips_init_icache(uint PRId, ulong icache_size, unchar icache_linesz)
*/
LEAF(mips_init_icache)
- bleza1, 9f
- mtc0zero, CP0_TAGLO
+ bleza1, 9f
+ mtc0zero, CP0_TAGLO
/* clear tag to invalidate */
PTR_LI t0, INDEX_BASE
PTR_ADDUt1, t0, a1
@@ -163,15 +94,15 @@ LEAF(mips_init_icache)
1: cache_opIndex_Store
Re: [U-Boot] [PATCH] MIPS: Introduce --gc-sections for MIPS
Hi Daniel, On 04/16/2011 12:16 AM, daniel.schwierz...@googlemail.com wrote: > All architectures but MIPS are using --gc-sections on final linking. > This patch introduces that feature for MIPS to reduce the memory and > flash footprint. > > Signed-off-by: Daniel Schwierzeck > Cc: Shinya Kuribayashi > Cc: Wolfgang Denk > Cc: Stefan Roese > Cc: Thomas Lange > Cc: Vlad Lungu > --- > Tested with ELDK-4.1 and self-built gcc-4.3.3/binutils-2.19.1 on my > boards. I could not test the other boards so I would appreciate it if > the maintainers in CC could do a quick test on their boards. > > arch/mips/config.mk |2 ++ > board/dbau1x00/u-boot.lds | 10 +- > board/gth2/u-boot.lds | 10 +- > board/incaip/u-boot.lds | 10 +- > board/micronas/vct/u-boot.lds | 10 +- > board/pb1x00/u-boot.lds | 10 +- > board/qemu-mips/u-boot.lds| 10 +- > board/tb0229/u-boot.lds | 10 +- > examples/standalone/mips.lds | 10 +- > 9 files changed, 42 insertions(+), 40 deletions(-) Thanks for the work, now pushed to u-boot-mips/master. By the way, would you do me a favor. In your mail header, > From: daniel.schwierz...@googlemail.com Please provide this in the form of, From: Your Name This helps patch maintainer(s) to avoid manually fixing Author: field, which is wrongly set when importing patches from E-mails using git-am. I noticed this when we got patches from you for the first time around this February or March and fixed manually at that time, but forgot to tell about that. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Interrupt handler in U-Boot for MIPS based platform
On 5/27/11 2:44 AM, Pandurang Kale wrote: >Has any one implemented it for MIPS based platform? If not, any hint to > get it working. https://www.ibm.com/developerworks/mydeveloperworks/blogs/ddou/entry/implementing_mips_interrupts_for_u_boot28?lang=en ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MIPS: Add initial support for EMMA3SL/LP
On Sun, Apr 1, 2012 at 4:40 AM, Marek Vasut wrote: >> This patch adds initial support for EMMA3SL/LP board. >> Network and USB support will be added as follow up patches. >> >> Signed-off-by: Serge Ziryukin > > Would you care to resubmit updated version of this patch please? Or shall I > discard it? This was posted by mistake, he was not allowed to make it public. Also we (Renesas) have no intention of mainlining it at the moment. Please discard it. I would give an official NACK, if necessary. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] MIPS: fixes for 2012.04-rc1
>> this series collects the bugfix patches from the open patches at patchwork >> delegated to you. Only these patches should be merged for the release. >> The other patches are superseeded for now. >> >> The series is rebased against v2012.04-rc1 and needs your patch >> http://patchwork.ozlabs.org/patch/149924/ to run MAKEALL -a mips. > > Shinya-san, you ok with these patches hitting .04? Suggestions/comments from Mike to the last submission are not reflected in [PATCH 2/3] (MIPS: fix inconsistency in config option for cache operation mode), but other than that these three patches are Ok with me. > I'll roll then through my -staging if it's fine. Thanks in advance, I don't have enough bandwidth to catch up with the latest tree/discussion, nor doing build tests and/or boot tests. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] MIPS: fix inconsistency in config option for cache operation mode
On Wed, Apr 4, 2012 at 1:09 AM, Marek Vasut wrote: >> I only changed start.S and forgot to change this code part too. That is why >> I created this patch to fix this inconsistency. > > I see ... so this fixes some other commit. What was Shinya-san's concern, that > you only changed this file? On Wed, Apr 4, 2012 at 5:33 AM, Mike Frysinger wrote: > On Tuesday 03 April 2012 09:40:08 Marek Vasut wrote: >> Mike, there was some issue with this patch? > > i had feedback on the endian flags last time Daniel posted it, but i don't > think i ever gave feedback on this ... i certainly don't know mips asm beyond > the extreme basics ;). Apologies for confusing, I intended to refer to PATCH 3/3, not 2/3. If everybody is Ok with 3/3 as-is, I'm fine. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/11] MIPS: add sleep handler for slave CPUs in multi-processor systems
On 11/24/11 10:57 PM, Daniel Schwierzeck wrote: diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index 9c1b2f7..b6cb4be 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -224,6 +224,14 @@ reset: setup_c0_status_reset + /* Set all slave CPUs in sleep mode */ +#ifdef CONFIG_SYS_MPS_SLAVE_CPU_SLEEP + mfc0k0, CP0_EBASE + and k0, EBASEF_CPUNUM + bne k0, zero, slave_cpu_sleep +nop +#endif + /* Init Timer */ mtc0zero, CP0_COUNT mtc0zero, CP0_COMPARE Just wondered, why is this conditionally selected? To save text size, or other reason? The change looks Ok with s/MPS/MIPS/ typo fixed as pointed by Andrew. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/11] MIPS: add additional reserved vectors for MIPS24K and MIPS34K cores
On 11/24/11 10:57 PM, Daniel Schwierzeck wrote: @@ -206,11 +206,28 @@ _start: RVECENT(romReserved,125) RVECENT(romReserved,126) RVECENT(romReserved,127) + XVECENT(romExcHandle,0x400); + RVECENT(romReserved,129); + RVECENT(romReserved,130); + RVECENT(romReserved,131); + RVECENT(romReserved,132); + RVECENT(romReserved,133); + RVECENT(romReserved,134); + RVECENT(romReserved,135); + RVECENT(romReserved,136); + RVECENT(romReserved,137); + RVECENT(romReserved,138); + RVECENT(romReserved,139); + RVECENT(romReserved,140); + RVECENT(romReserved,141); + RVECENT(romReserved,142); + RVECENT(romReserved,143); + XVECENT(romExcHandle,0x480);# bfc00480: EJTAG debug exception /* * We hope there are no more reserved vectors! -* 128 * 8 == 1024 == 0x400 -* so this is address R_VEC+0x400 == 0xbfc00400 +* 144 * 8 == 1152 == 0x480 +* so this is address R_VEC+0x480 == 0xbfc00480 */ .align 4 reset: IIUC those exception vectors of +0x400/+0x480 have nothing to do with 24K processor core nor 34K either. The change itself is Ok, and any other version taking Marek's comment into account is also welcome. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] MIPS: make config options more generic
On 07/28/2011 05:14 PM, thomas.lan...@lantiq.com wrote: > Hi Daniel, > > Daniel Schwierzeck wrote on 2011-07-27: > >> This patch series contains cleanups and enhancements to consolidate >> the INCA-IP related config options and to make them more generic. >> Additionally, the cache operation mode is now configurable. >> All changes are needed to prepare the support of newer MIPS >> based Lantiq XWAY SoCs. >> > > my ack to the complete series: > > Acked-by: Thomas Langer Thanks for the patches, looks good. Will push shortly. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] MIPS patches
Hi,
Please pull the patches from Daniel, which tries to clean up INCA-IP
dependent code in more generic way, preparing for upcoming new Lantiq
SoC support. Also consolidate MIPS generic area (cache and README).
Patches are within less than a week, but the changes are simple, clean
and well-documented, and also reviewed by Thomas and me. No need to
hold on any longer.
Thanks in advance,
--- 8< ---
The following changes since commit dd620b26332eb1e9fc0216760909c4046ba09745:
Merge branch 'master' of /home/wd/git/u-boot/custodians (2011-07-30 01:39:14
+0200)
are available in the git repository at:
git://git.denx.de/u-boot-mips.git master
Daniel Schwierzeck (4):
MIPS: INCA-IP: rename inca-swap-bytes host tool
MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
MIPS: make cache operation mode configurable
README: update MIPS related informations
README | 35 +++-
arch/mips/cpu/mips32/start.S | 19 ++---
include/configs/incaip.h |4 ++-
tools/Makefile |8 +++---
tools/{inca-swap-bytes.c => xway-swap-bytes.c} |0
5 files changed, 56 insertions(+), 10 deletions(-)
rename tools/{inca-swap-bytes.c => xway-swap-bytes.c} (100%)
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Re: [U-Boot] Is it necessary that uboot(mips) should read status register($12) before setting it
On 09/28/2011 06:09 PM, RdrouterUboot Router wrote: > 2.Is it right?I can delete this code "mfc0 $10,$12" from uboot. You can delete that MFC0 instruction in this case and save one word. Presumably the original code used to update the Status register value in read-modify-write manner, and at some point someone modified into current shape. By the way, since the first MIPS implementation of U-Boot was merged into the tree (by wdenk), we've been using k0($26) or t0($8) register as a scratch pad when modifying the Status register, while your example code uses t2($10). So it would be a custom U-Boot we don't know of. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 0/3] those series patches for add ben nanonote board
Hi, Here's seventh patchset for Ben NanoNote initial support. I've been working with Xiangfu past six months to polish v6 patches. We have addressed all comments from Wolfgang and Scott so far, drop nand_spl and USB_boot functions to make the initial bring-up minimum and simple. I think the patchset is now in good shape, so will merge and make a pull-request during this merge window. Please give it a final review and if something to fix, please let us know. Scott and Wolfgang, I know NAND land changes should go through Scott's tree, but the NAND driver is part of the initial support. May I take it through MIPS tree? Hope it's Ok with you. Changes since v6 patchset are described in each patch. Shinya --- 8< --- Boilerplate from Xiangfu Liu: those patches are for add xburst jz4740 base file and Ben NanoNote (codename qi_lb60) to U-Boot some info about xburst jz4740: the xburst jz4740 is recently added to linux 2.6.36 and it's support the device Ben NanoNote out of box, this xburst jz4740 cpu have one feature is Boot From USB, there is a small rom in jz4740, but LOW some PIN, the cpu will boot to this small rom, then init cpu and USB module, then we can send 8KB bin file to the cpu by USB(by using 'xbboot' or 'usbboot'[1]). which means if your bootloader is borken,(the first few KBs in NAND) you can always boot the device from usb, then reflash the nand. in OpenMoko FreeRunner, there are NOR and NAND. when people broken the nand bootloader, it's must boot from NOR, reflash the bootloader back when people broken the NAND and NOR, he(she) must reflash by using JTAG but in Ben NanoNote, we just need boot from usb. flash the nand again :) BTW:there are a lot of PMP, Audio device in China use the Xburst cpu, but I think they are all base on u-boot 1.1.6. by working on Ben NanoNote (http://en.qi-hardware.com) one year, we try to update the u-boot to last version and send it to upstream. :) for more info about Ingenic Xburst JZ4740 http://www.ingenic.cn/eng/default.aspx http://www.linux-mips.org/wiki/Ingenic Xiangfu Liu (3): MIPS: Ingenic XBurst Jz4740 processor support MIPS: Jz4740: Add NAND driver MIPS: JZ4740: Add qi_lb60 board support MAINTAINERS |4 + MAKEALL |4 +- README |1 + arch/mips/cpu/xburst/Makefile | 49 ++ arch/mips/cpu/xburst/config.mk | 24 + arch/mips/cpu/xburst/cpu.c | 152 + arch/mips/cpu/xburst/jz4740.c | 248 arch/mips/cpu/xburst/jz_serial.c| 114 arch/mips/cpu/xburst/start.S| 171 ++ arch/mips/cpu/xburst/timer.c| 169 ++ arch/mips/include/asm/global_data.h | 11 + arch/mips/include/asm/jz4740.h | 1115 +++ board/qi/qi_lb60/Makefile | 45 ++ board/qi/qi_lb60/config.mk | 31 + board/qi/qi_lb60/qi_lb60.c | 104 board/qi/qi_lb60/u-boot.lds | 61 ++ boards.cfg |1 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/jz4740_nand.c | 261 include/configs/qi_lb60.h | 210 +++ 20 files changed, 2775 insertions(+), 1 deletions(-) create mode 100644 arch/mips/cpu/xburst/Makefile create mode 100644 arch/mips/cpu/xburst/config.mk create mode 100644 arch/mips/cpu/xburst/cpu.c create mode 100644 arch/mips/cpu/xburst/jz4740.c create mode 100644 arch/mips/cpu/xburst/jz_serial.c create mode 100644 arch/mips/cpu/xburst/start.S create mode 100644 arch/mips/cpu/xburst/timer.c create mode 100644 arch/mips/include/asm/jz4740.h create mode 100644 board/qi/qi_lb60/Makefile create mode 100644 board/qi/qi_lb60/config.mk create mode 100644 board/qi/qi_lb60/qi_lb60.c create mode 100644 board/qi/qi_lb60/u-boot.lds create mode 100644 drivers/mtd/nand/jz4740_nand.c create mode 100644 include/configs/qi_lb60.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 2/3] MIPS: Jz4740: Add NAND driver
From: Xiangfu Liu
Date: Fri, 19 Aug 2011 14:35:29 +0800
Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices
nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.
Signed-off-by: Xiangfu Liu
Acked-by: Daniel
Signed-off-by: Shinya Kuribayashi
---
Changes since v6:
* Remove NAND-boot stuff. Those bits will be submitted as a nand-spl
support once this Jz4740 base support is merged.
* All previous comments from Scott are fixed.
* Bunch of coding style issues fixed.
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/jz4740_nand.c | 261
2 files changed, 262 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/jz4740_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index b6a7886..c257128 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -44,6 +44,7 @@ COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
new file mode 100644
index 000..db50da3
--- /dev/null
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -0,0 +1,261 @@
+/*
+ * Platform independend driver for JZ4740.
+ *
+ * Copyright (c) 2007 Ingenic Semiconductor Inc.
+ * Author:
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+#include
+
+#include
+#include
+#include
+
+#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB800)
+#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
+#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x1)
+
+#define BIT(x) (1 << (x))
+#define JZ_NAND_ECC_CTRL_ENCODING BIT(3)
+#define JZ_NAND_ECC_CTRL_RSBIT(2)
+#define JZ_NAND_ECC_CTRL_RESET BIT(1)
+#define JZ_NAND_ECC_CTRL_ENABLEBIT(0)
+
+#define EMC_SMCR1_OPT_NAND 0x094c4400
+/* Optimize the timing of nand */
+
+static struct jz4740_emc * emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
+
+static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
+ .eccbytes = 72,
+ .eccpos = {
+ 12, 13, 14, 15, 16, 17, 18, 19,
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 34, 35,
+ 36, 37, 38, 39, 40, 41, 42, 43,
+ 44, 45, 46, 47, 48, 49, 50, 51,
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ 68, 69, 70, 71, 72, 73, 74, 75,
+ 76, 77, 78, 79, 80, 81, 82, 83 },
+ .oobfree = {
+ {.offset = 2,
+.length = 10 },
+ {.offset = 84,
+.length = 44 } }
+};
+
+static int is_reading;
+
+static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+ struct nand_chip *this = mtd->priv;
+ uint32_t reg;
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ if (ctrl & NAND_ALE)
+ this->IO_ADDR_W = JZ_NAND_ADDR_ADDR;
+ else if (ctrl & NAND_CLE)
+ this->IO_ADDR_W = JZ_NAND_CMD_ADDR;
+ else
+ this->IO_ADDR_W = JZ_NAND_DATA_ADDR;
+
+ reg = readl(&emc->nfcsr);
+ if (ctrl & NAND_NCE)
+ reg |= EMC_NFCSR_NFCE1;
+ else
+ reg &= ~EMC_NFCSR_NFCE1;
+ writel(reg, &emc->nfcsr);
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this->IO_ADDR_W);
+}
+
+static int jz_nand_device_ready(struct mtd_info *mtd)
+{
+ return (readl(GPIO_PXPIN(2)) & 0x4000) ? 1 : 0;
+}
+
+void board_nand_select_device(struct nand_chip *nand, int chip)
+{
+ /*
+* Don't use "chip" to address the NAND device,
+* generate the cs from the address where it is encoded.
+*/
+}
+
+static int jz_nand_rs_calculate_ecc(struct mtd_info* mtd, const u_char* dat,
+ u_char* ecc_code)
+{
+ uint32_t status;
+ int i;
+
+ if (is_reading)
+ return 0;
+
+ do {
+ status = readl(&emc->nfints);
+ } while (!(status & EMC_NFINTS_ENCF));
+
+ /* disable ecc */
+ writel(readl(&emc->nfecr) &
[U-Boot] [PATCH v7 3/3] MIPS: JZ4740: Add qi_lb60 board support
From: Xiangfu Liu Date: Fri, 19 Aug 2011 14:35:29 +0800 Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware: http://en.qi-hardware.com/wiki/Ben_NanoNote http://en.qi-hardware.com/wiki/Main_Page http://en.wikipedia.org/wiki/Qi_hardware This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x8010. About USB boot tool --- Jz4740 is one of the XBurst processors with USB boot functionality supported. The CPU can boot from a small ROM in the LSI, initialize CPU and USB module, then wait for USB commands from the USB host. We can send 8 KB binary data to the CPU cache using USB boot tool. USB boot tool is available to the public at Ingenic website. Also there is an alternative Debian package named xburst-tools. Signed-off-by: Xiangfu Liu Acked-by: Daniel Signed-off-by: Shinya Kuribayashi --- Changes since v6: * config files is folded into * Following configs are deleted: CONFIG_SYS_64BIT_VSPRINTF CONFIG_NANDBOOT_CFG CONFIG_QI_LB60 MAINTAINERS |4 + MAKEALL |4 +- board/qi/qi_lb60/Makefile | 45 + board/qi/qi_lb60/config.mk | 31 +++ board/qi/qi_lb60/qi_lb60.c | 104 + board/qi/qi_lb60/u-boot.lds | 61 + boards.cfg |1 + include/configs/qi_lb60.h | 210 +++ 8 files changed, 459 insertions(+), 1 deletions(-) create mode 100644 board/qi/qi_lb60/Makefile create mode 100644 board/qi/qi_lb60/config.mk create mode 100644 board/qi/qi_lb60/qi_lb60.c create mode 100644 board/qi/qi_lb60/u-boot.lds create mode 100644 include/configs/qi_lb60.h diff --git a/MAINTAINERS b/MAINTAINERS index 3ab38fa..bb95e6d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -928,6 +928,10 @@ Stefan Roese vct_xxx MIPS32 4Kc +Xiangfu Liu + + qi_lb60 MIPS32 (XBurst Jz4740 SoC) + # # Nios-II Systems: # # # diff --git a/MAKEALL b/MAKEALL index 4d18c11..f57d47d 100755 --- a/MAKEALL +++ b/MAKEALL @@ -400,7 +400,9 @@ LIST_mips=" \ ## MIPS Systems(little endian) # -LIST_mips4kc_el="" +LIST_mips4kc_el=" \ + qi_lb60 \ +" LIST_mips5kc_el="" diff --git a/board/qi/qi_lb60/Makefile b/board/qi/qi_lb60/Makefile new file mode 100644 index 000..2f5b4be --- /dev/null +++ b/board/qi/qi_lb60/Makefile @@ -0,0 +1,45 @@ +# +# (C) Copyright 2006 +# Ingenic Semiconductor, +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/qi/qi_lb60/config.mk b/board/qi/qi_lb60/config.mk new file mode 100644 index 000..858e6a2 --- /dev/null +++ b/board/qi/qi_lb60/config.mk @@ -0,0 +1,31 @@ +# +# (C) Copyright 2006 Qi Hardware, Inc. +# Author: Xiangfu Liu +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +#
[U-Boot] [PATCH v8 0/3] those series patches for add ben nanonote board
Hi, v8 -- Fix all checkpatch errors/warnings except for known false positives. I'll make a pull-request shortly. > total: 0 errors, 0 warnings, 2105 lines checked > > jz4740-v8/0001-MIPS-Ingenic-XBurst-Jz4740-processor-support.patch has no > obvious style problems and is ready for submission. > WARNING: Use #include instead of > #69: FILE: drivers/mtd/nand/jz4740_nand.c:15: > +#include > > total: 0 errors, 1 warnings, 268 lines checked > > jz4740-v8/0002-MIPS-Jz4740-Add-NAND-driver.patch has style problems, please > review. > > If any of these errors are false positives, please report > them to the maintainer, see CHECKPATCH in MAINTAINERS. > WARNING: Use #include instead of > #194: FILE: board/qi/qi_lb60/qi_lb60.c:11: > +#include > > WARNING: line over 80 characters > #407: FILE: include/configs/qi_lb60.h:35: > +#define CONFIG_BOOTARGS "mem=32M console=tty0 > console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait" > > total: 0 errors, 2 warnings, 479 lines checked > > jz4740-v8/0003-MIPS-Jz4740-Add-qi_lb60-board-support.patch has style > problems, please review. > > If any of these errors are false positives, please report > them to the maintainer, see CHECKPATCH in MAINTAINERS. v7 -- Here's seventh patchset for Ben NanoNote initial support. I've been working with Xiangfu past six months to polish v6 patches. We have addressed all comments from Wolfgang and Scott so far, drop nand_spl and USB_boot functions to make the initial bring-up minimum and simple. I think the patchset is now in good shape, so will merge and make a pull-request during this merge window. Please give it a final review and if something to fix, please let us know. Scott and Wolfgang, I know NAND land changes should go through Scott's tree, but the NAND driver is part of the initial support. May I take it through MIPS tree? Hope it's Ok with you. Changes since v6 patchset are described in each patch. Shinya --- 8< --- Boilerplate from Xiangfu Liu: those patches are for add xburst jz4740 base file and Ben NanoNote (codename qi_lb60) to U-Boot some info about xburst jz4740: the xburst jz4740 is recently added to linux 2.6.36 and it's support the device Ben NanoNote out of box, this xburst jz4740 cpu have one feature is Boot From USB, there is a small rom in jz4740, but LOW some PIN, the cpu will boot to this small rom, then init cpu and USB module, then we can send 8KB bin file to the cpu by USB(by using 'xbboot' or 'usbboot'[1]). which means if your bootloader is borken,(the first few KBs in NAND) you can always boot the device from usb, then reflash the nand. in OpenMoko FreeRunner, there are NOR and NAND. when people broken the nand bootloader, it's must boot from NOR, reflash the bootloader back when people broken the NAND and NOR, he(she) must reflash by using JTAG but in Ben NanoNote, we just need boot from usb. flash the nand again :) BTW:there are a lot of PMP, Audio device in China use the Xburst cpu, but I think they are all base on u-boot 1.1.6. by working on Ben NanoNote (http://en.qi-hardware.com) one year, we try to update the u-boot to last version and send it to upstream. :) for more info about Ingenic Xburst JZ4740 http://www.ingenic.cn/eng/default.aspx http://www.linux-mips.org/wiki/Ingenic Xiangfu Liu (3): MIPS: Ingenic XBurst Jz4740 processor support MIPS: Jz4740: Add NAND driver MIPS: Jz4740: Add qi_lb60 board support MAINTAINERS |4 + MAKEALL |4 +- README |1 + arch/mips/cpu/xburst/Makefile | 49 ++ arch/mips/cpu/xburst/config.mk | 24 + arch/mips/cpu/xburst/cpu.c | 152 + arch/mips/cpu/xburst/jz4740.c | 248 arch/mips/cpu/xburst/jz_serial.c| 114 arch/mips/cpu/xburst/start.S| 171 ++ arch/mips/cpu/xburst/timer.c| 162 + arch/mips/include/asm/global_data.h | 11 + arch/mips/include/asm/jz4740.h | 1150 +++ board/qi/qi_lb60/Makefile | 45 ++ board/qi/qi_lb60/config.mk | 31 + board/qi/qi_lb60/qi_lb60.c | 104 board/qi/qi_lb60/u-boot.lds | 61 ++ boards.cfg |1 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/jz4740_nand.c | 261 include/configs/qi_lb60.h | 211 +++ 20 files changed, 2804 insertions(+), 1 deletions(-) create mode 100644 arch/mips/cpu/xburst/Makefile create mode 100644 arch/mips/cpu/xburst/config.mk create mode 100644 arch/mips/cpu/xburst/cpu.c create mode 100644 arch/mips/cpu/xburst/jz4740.c create mode 100644 arch/mips/cpu/xburst/jz_serial.c create mode 100644 arch/mips/cpu/xburst/start.S create mode 100644 arch/mips/cpu/xburst/timer.c create mode 100644 arch/mips/include/asm/jz4740.h create mode 100644 board/qi/qi_
[U-Boot] [PATCH v8 2/3] MIPS: Jz4740: Add NAND driver
From: Xiangfu Liu
Date: Wed, 12 Oct 2011 12:24:06 +0800
Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices
nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.
Signed-off-by: Xiangfu Liu
Acked-by: Daniel
Signed-off-by: Shinya Kuribayashi
---
Changes since v7:
* Fix checkpatch errors/warnings
Changes since v6:
* Remove NAND-boot stuff. Those bits will be submitted as a nand-spl
support once this Jz4740 base support is merged.
* All previous comments from Scott are fixed.
* Bunch of coding style issues fixed.
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/jz4740_nand.c | 261
2 files changed, 262 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/jz4740_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index dae2442..1eeba5c 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -45,6 +45,7 @@ COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
new file mode 100644
index 000..3ec34f3
--- /dev/null
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -0,0 +1,261 @@
+/*
+ * Platform independend driver for JZ4740.
+ *
+ * Copyright (c) 2007 Ingenic Semiconductor Inc.
+ * Author:
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+#include
+
+#include
+#include
+#include
+
+#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB800)
+#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
+#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x1)
+
+#define BIT(x) (1 << (x))
+#define JZ_NAND_ECC_CTRL_ENCODING BIT(3)
+#define JZ_NAND_ECC_CTRL_RSBIT(2)
+#define JZ_NAND_ECC_CTRL_RESET BIT(1)
+#define JZ_NAND_ECC_CTRL_ENABLEBIT(0)
+
+#define EMC_SMCR1_OPT_NAND 0x094c4400
+/* Optimize the timing of nand */
+
+static struct jz4740_emc * emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
+
+static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
+ .eccbytes = 72,
+ .eccpos = {
+ 12, 13, 14, 15, 16, 17, 18, 19,
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 34, 35,
+ 36, 37, 38, 39, 40, 41, 42, 43,
+ 44, 45, 46, 47, 48, 49, 50, 51,
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ 68, 69, 70, 71, 72, 73, 74, 75,
+ 76, 77, 78, 79, 80, 81, 82, 83 },
+ .oobfree = {
+ {.offset = 2,
+.length = 10 },
+ {.offset = 84,
+.length = 44 } }
+};
+
+static int is_reading;
+
+static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+ struct nand_chip *this = mtd->priv;
+ uint32_t reg;
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ if (ctrl & NAND_ALE)
+ this->IO_ADDR_W = JZ_NAND_ADDR_ADDR;
+ else if (ctrl & NAND_CLE)
+ this->IO_ADDR_W = JZ_NAND_CMD_ADDR;
+ else
+ this->IO_ADDR_W = JZ_NAND_DATA_ADDR;
+
+ reg = readl(&emc->nfcsr);
+ if (ctrl & NAND_NCE)
+ reg |= EMC_NFCSR_NFCE1;
+ else
+ reg &= ~EMC_NFCSR_NFCE1;
+ writel(reg, &emc->nfcsr);
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this->IO_ADDR_W);
+}
+
+static int jz_nand_device_ready(struct mtd_info *mtd)
+{
+ return (readl(GPIO_PXPIN(2)) & 0x4000) ? 1 : 0;
+}
+
+void board_nand_select_device(struct nand_chip *nand, int chip)
+{
+ /*
+* Don't use "chip" to address the NAND device,
+* generate the cs from the address where it is encoded.
+*/
+}
+
+static int jz_nand_rs_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+ u_char *ecc_code)
+{
+ uint32_t status;
+ int i;
+
+ if (is_reading)
+ return 0;
+
+ do {
+ status = readl(&emc->nfints);
+ } while (!(status & EMC_NFINTS_ENCF));
+
+ /* disable
[U-Boot] [PATCH v8 3/3] MIPS: Jz4740: Add qi_lb60 board support
From: Xiangfu Liu Date: Wed, 12 Oct 2011 12:24:06 +0800 Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware: http://en.qi-hardware.com/wiki/Ben_NanoNote http://en.qi-hardware.com/wiki/Main_Page http://en.wikipedia.org/wiki/Qi_hardware This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x8010. About USB boot tool --- Jz4740 is one of the XBurst processors with USB boot functionality supported. The CPU can boot from a small ROM in the LSI, initialize CPU and USB module, then wait for USB commands from the USB host. We can send 8 KB binary data to the CPU cache using USB boot tool. USB boot tool is available to the public at Ingenic website. Also there is an alternative Debian package named xburst-tools. Signed-off-by: Xiangfu Liu Acked-by: Daniel Signed-off-by: Shinya Kuribayashi --- Changes since v7: * Fix checkpatch errors/warnings Changes since v6: * config files is folded into * Following configs are deleted: CONFIG_SYS_64BIT_VSPRINTF CONFIG_NANDBOOT_CFG CONFIG_QI_LB60 MAINTAINERS |4 + MAKEALL |4 +- board/qi/qi_lb60/Makefile | 45 + board/qi/qi_lb60/config.mk | 31 +++ board/qi/qi_lb60/qi_lb60.c | 104 + board/qi/qi_lb60/u-boot.lds | 61 + boards.cfg |1 + include/configs/qi_lb60.h | 211 +++ 8 files changed, 460 insertions(+), 1 deletions(-) create mode 100644 board/qi/qi_lb60/Makefile create mode 100644 board/qi/qi_lb60/config.mk create mode 100644 board/qi/qi_lb60/qi_lb60.c create mode 100644 board/qi/qi_lb60/u-boot.lds create mode 100644 include/configs/qi_lb60.h diff --git a/MAINTAINERS b/MAINTAINERS index 3ab38fa..bb95e6d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -928,6 +928,10 @@ Stefan Roese vct_xxx MIPS32 4Kc +Xiangfu Liu + + qi_lb60 MIPS32 (XBurst Jz4740 SoC) + # # Nios-II Systems: # # # diff --git a/MAKEALL b/MAKEALL index 52bc355..f582f8b 100755 --- a/MAKEALL +++ b/MAKEALL @@ -400,7 +400,9 @@ LIST_mips=" \ ## MIPS Systems(little endian) # -LIST_mips4kc_el="" +LIST_mips4kc_el=" \ + qi_lb60 \ +" LIST_mips5kc_el="" diff --git a/board/qi/qi_lb60/Makefile b/board/qi/qi_lb60/Makefile new file mode 100644 index 000..2f5b4be --- /dev/null +++ b/board/qi/qi_lb60/Makefile @@ -0,0 +1,45 @@ +# +# (C) Copyright 2006 +# Ingenic Semiconductor, +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/qi/qi_lb60/config.mk b/board/qi/qi_lb60/config.mk new file mode 100644 index 000..858e6a2 --- /dev/null +++ b/board/qi/qi_lb60/config.mk @@ -0,0 +1,31 @@ +# +# (C) Copyright 2006 Qi Hardware, Inc. +# Author: Xiangfu Liu +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See th
[U-Boot] [GIT PULL] MIPS patch
Hi Wolfgang, please pull the following patchset from Xiangfu introducing NanoNote initial support. The device is one of most easy-to-get MIPS devices and active people and communities are there in the world. The Linux kernel also has been supporting it since v2.6.36. It's about time to support in U-Boot. Shinya The following changes since commit 0841ca90f22d73b0ea4642ef1ce33d879bb2f3ff: arm920t/s3c24x0/usb_ohci.c: fix warning: variable ... set but not used (2011-10-09 23:24:50 +0200) are available in the git repository at: git://git.denx.de/u-boot-mips.git master Xiangfu Liu (3): MIPS: Ingenic XBurst Jz4740 processor support MIPS: Jz4740: Add NAND driver MIPS: Jz4740: Add qi_lb60 board support MAINTAINERS |4 + MAKEALL |4 +- README |1 + arch/mips/cpu/xburst/Makefile | 49 ++ arch/mips/cpu/xburst/config.mk | 24 + arch/mips/cpu/xburst/cpu.c | 152 + arch/mips/cpu/xburst/jz4740.c | 248 arch/mips/cpu/xburst/jz_serial.c| 114 arch/mips/cpu/xburst/start.S| 171 ++ arch/mips/cpu/xburst/timer.c| 162 + arch/mips/include/asm/global_data.h | 11 + arch/mips/include/asm/jz4740.h | 1150 +++ board/qi/qi_lb60/Makefile | 45 ++ board/qi/qi_lb60/config.mk | 31 + board/qi/qi_lb60/qi_lb60.c | 104 board/qi/qi_lb60/u-boot.lds | 61 ++ boards.cfg |1 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/jz4740_nand.c | 261 include/configs/qi_lb60.h | 211 +++ 20 files changed, 2804 insertions(+), 1 deletions(-) create mode 100644 arch/mips/cpu/xburst/Makefile create mode 100644 arch/mips/cpu/xburst/config.mk create mode 100644 arch/mips/cpu/xburst/cpu.c create mode 100644 arch/mips/cpu/xburst/jz4740.c create mode 100644 arch/mips/cpu/xburst/jz_serial.c create mode 100644 arch/mips/cpu/xburst/start.S create mode 100644 arch/mips/cpu/xburst/timer.c create mode 100644 arch/mips/include/asm/jz4740.h create mode 100644 board/qi/qi_lb60/Makefile create mode 100644 board/qi/qi_lb60/config.mk create mode 100644 board/qi/qi_lb60/qi_lb60.c create mode 100644 board/qi/qi_lb60/u-boot.lds create mode 100644 drivers/mtd/nand/jz4740_nand.c create mode 100644 include/configs/qi_lb60.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing
make -C lib_generic/ zlib.c:31:27: error: asm/unaligned.h: No such file or directory zlib.c: In function 'inflate_fast': zlib.c:641: warning: implicit declaration of function 'get_unaligned' make[1]: *** [zlib.o] Error 1 make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic' make: *** [lib_generic/libgeneric.a] Error 2 Import relevant header file from LMO tree (slightly modified to U-Boot). Reported-by: Himanshu Chauhan Signed-off-by: Shinya Kuribayashi --- Himanshu Chauhan wrote: > I see that in include directory asm points to asm-mips. Inside asm-mips > there is another link arch->arch-mips which is a dead link. THere is no > directory named arch-mips there. This is another topic, let's ignore here. > Whats the problem here? Should I pull only the MIPS custodian tree? I confirmed that this patch fixes the build error, but not sure it works or not. Just build tested. And note that there there's nothing interesting in the u-boot-mips tree, sorry. include/asm-mips/unaligned.h | 26 ++ 1 files changed, 26 insertions(+), 0 deletions(-) create mode 100644 include/asm-mips/unaligned.h diff --git a/include/asm-mips/unaligned.h b/include/asm-mips/unaligned.h new file mode 100644 index 000..da6a347 --- /dev/null +++ b/include/asm-mips/unaligned.h @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2007 Ralf Baechle (r...@linux-mips.org) + */ +#ifndef _ASM_MIPS_UNALIGNED_H +#define _ASM_MIPS_UNALIGNED_H + +#include +#if defined(__MIPSEB__) +# define get_unaligned __get_unaligned_be +# define put_unaligned __put_unaligned_be +#elif defined(__MIPSEL__) +# define get_unaligned __get_unaligned_le +# define put_unaligned __put_unaligned_le +#else +# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" +#endif + +# include +# include +# include + +#endif /* _ASM_MIPS_UNALIGNED_H */ -- 1.6.5.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing
Stefan Roese wrote: > On Friday 18 December 2009 13:04:59 Himanshu Chauhan wrote: Import relevant header file from LMO tree (slightly modified to U-Boot). >>> Why don't you import this file from the Linux tree? This should work >>> without modifications. And that's what we've done for PPC and ARM as >>> well. [...] >> I think thats what it is. Both are same. > > No, not exactly. They're nearly identical. But there are differences. Not > sure > if these differences are important though. Hm, the original header is (lmo = linux-mips.org): http://git.kernel.org/?p=linux/kernel/git/ralf/linux.git;a=blob;f=arch/mips/include/asm/unaligned.h;h=42f66c311473abb98fe7a845e360e365ccfed837;hb=master Are you referring to another one? > Don't get me wrong. I'm not NACK'ing the patch. I'm just pointing out that > it's different from the Linux version. I'm afraid 'LMO' needlessly makes you confused. Or am I missing something? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing
Himanshu Chauhan wrote: >> Himanshu Chauhan wrote: >>> I see that in include directory asm points to asm-mips. Inside >>> asm-mips there is another link arch->arch-mips which is a dead link. >>> THere is no directory named arch-mips there. >> This is another topic, let's ignore here. > > Is arch-mips scheduled to be added? Not at the moment. I'm not sure how it works, in the first place. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][RESEND]: Fix for U-Boot build failure with CONFIG_SYS_NO_FLASH defined for qemu-mips.
Hi,
On 12/19/09 3:57 PM, Himanshu Chauhan wrote:
> U-Boot hangs with qemu-system-mips with ##unknown flash error.
Do you have any idea what's the root cause of that unknown flash
error? Is this U-Boot CFI driver issue, or Qemu-side problem?
Using CONFIG_SYS_NO_FLASH is a quick, enough workaround for your
trial, but does not fix anything. Could you sort out the issue?
I don't think I can help regarding debugging Qemu (sorry!), but
u-boot/doc/README.qemu_mips and U-Boot/Qemu community will help.
> Disabling flash using CONFIG_SYS_NO_FLASH breaks the build.
> This patch fixes the issue. Don't know if its okay.
>
> Signed-off-by: Himanshu Chauhan
Heh, let's use git-format-patch when preparing patches.
$ git format-patch HEAD^..
$ git format-patch --no-thread HEAD^^..
$ mkdir foo && git format-patch -o foo/ HEAD~3..
and so on.
> diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
> index efd6aec..5bd3af0 100644
> --- a/common/cmd_bootm.c
> +++ b/common/cmd_bootm.c
> @@ -76,7 +76,7 @@ extern void bz_internal_error(int);
> static int image_info (unsigned long addr);
> #endif
>
> -#if defined(CONFIG_CMD_IMLS)
> +#if !defined(CONFIG_SYS_NO_FLASH)&& defined(CONFIG_CMD_IMLS)
> #include
> extern flash_info_t flash_info[]; /* info for FLASH chips */
> static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
> @@ -1153,7 +1153,7 @@ U_BOOT_CMD(
> /***/
> /* imls - list all images found in flash */
> /***/
> -#if defined(CONFIG_CMD_IMLS)
> +#if !defined(CONFIG_SYS_NO_FLASH)&& defined(CONFIG_CMD_IMLS)
> int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> {
> flash_info_t *info;
Disabling IMLS command in configs/qemu_mips.h?
> diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
> index 24eb33f..06c7271 100644
> --- a/drivers/mtd/cfi_flash.c
> +++ b/drivers/mtd/cfi_flash.c
> @@ -41,6 +41,7 @@
> #include
> #include
>
> +#ifndef CONFIG_SYS_NO_FLASH
> /*
>* This file implements a Common Flash Interface (CFI) driver for
>* U-Boot.
> @@ -2020,3 +2021,5 @@ unsigned long flash_init (void)
>
> return (size);
> }
> +
> +#endif
Removing CONFIG_CFI_DRIVER from configs/qemu_mips.h?
> diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
> index cbacdf9..49a1a1c 100644
> --- a/include/configs/qemu-mips.h
> +++ b/include/configs/qemu-mips.h
> :q
> @@ -142,6 +142,7 @@
> #define CONFIG_SYS_INIT_SP_OFFSET 0x40
>
> /* We boot from this flash, selected with dip switch */
> +#define CONFIG_SYS_NO_FLASH
> #define CONFIG_SYS_FLASH_BASE 0xbfc0
> #define CONFIG_SYS_MAX_FLASH_BANKS 1
> #define CONFIG_SYS_MAX_FLASH_SECT 128
> @@ -149,7 +150,8 @@
> #define CONFIG_FLASH_CFI_DRIVER 1
> #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
>
> -#define CONFIG_ENV_IS_IN_FLASH 1
> +#define CONFIG_ENV_IS_IN_FLASH 0
> +#define CONFIG_ENV_IS_NOWHERE
> #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE +
> CONFIG_SYS_MONITOR_LEN)
>
> /* Address and size of Primary Environment Sector */
[...]
> diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
> index 2aa6911..2229ddf 100644
> --- a/include/mtd/cfi_flash.h
> +++ b/include/mtd/cfi_flash.h
> @@ -151,7 +151,8 @@ struct cfi_pri_hdr {
> u8 minor_version;
> } __attribute__((packed));
>
> -void flash_write_cmd(flash_info_t * info, flash_sect_t sect,
> - uint offset, u32 cmd);
> +#ifndef CONFIG_SYS_NO_FLASH
> +void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset,
> u32 cmd);
> +#endif
>
> #endif /* __CFI_FLASH_H__ */
Removing CONFIG_CFI_DRIVER from configs/qemu_mips.h?
Anyway, I'd like to leave this issue as-is for now, and look
forward to the read bug fix.
Shinya
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Re: [U-Boot] [PATCH] MIPS: qemu_mips: Fix a build failure caused by missing
On 12/18/09 10:06 PM, Stefan Roese wrote: >>> Don't get me wrong. I'm not NACK'ing the patch. I'm just pointing out >>> that it's different from the Linux version. >> >> I'm afraid 'LMO' needlessly makes you confused. Or am I missing >> something? > > Yes, "LMO" was confusing me. Sorry for that, and thanks for trying to check the diff. I'll respin the patch during the merge window, with proper words. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][RESEND]: Fix for U-Boot build failure with CONFIG_SYS_NO_FLASH defined for qemu-mips.
Himanshu Chauhan wrote:
> May be I really want that CONFIG_SYS_NO_FLASH defined then build should at
> least not break. Isn't it?
Correct, it should build even with CONFIG_SYS_NO_FLASH.
>>> diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
>>> index efd6aec..5bd3af0 100644
>>> --- a/common/cmd_bootm.c
>>> +++ b/common/cmd_bootm.c
>>> @@ -76,7 +76,7 @@ extern void bz_internal_error(int);
>>> static int image_info (unsigned long addr);
>>> #endif
>>>
>>> -#if defined(CONFIG_CMD_IMLS)
>>> +#if !defined(CONFIG_SYS_NO_FLASH)&& defined(CONFIG_CMD_IMLS)
>>> #include
>>> extern flash_info_t flash_info[]; /* info for FLASH chips */
>>> static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char
>>> *argv[]);
>>> @@ -1153,7 +1153,7 @@ U_BOOT_CMD(
>>> /***/
>>> /* imls - list all images found in flash */
>>> /***/
>>> -#if defined(CONFIG_CMD_IMLS)
>>> +#if !defined(CONFIG_SYS_NO_FLASH)&& defined(CONFIG_CMD_IMLS)
>>> int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
>>> {
>>> flash_info_t *info;
>> Disabling IMLS command in configs/qemu_mips.h?
> This should have been disabled anyways if this patch was applied:
> http://www.mail-archive.com/u-boot@lists.denx.de/msg07407.html
The patch is applied.
|diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
|index cbacdf9..49a1a1c 100644
|--- a/include/configs/qemu-mips.h
|+++ b/include/configs/qemu-mips.h
|:q
|@@ -142,6 +142,7 @@
| #define CONFIG_SYS_INIT_SP_OFFSET 0x40
|
| /* We boot from this flash, selected with dip switch */
|+#define CONFIG_SYS_NO_FLASH
| #define CONFIG_SYS_FLASH_BASE 0xbfc0
| #define CONFIG_SYS_MAX_FLASH_BANKS1
| #define CONFIG_SYS_MAX_FLASH_SECT 128
FWIW, how about putting CONFIG_SYS_NO_FLASH prior to ?
>>> diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
>>> index 24eb33f..06c7271 100644
>>> --- a/drivers/mtd/cfi_flash.c
>>> +++ b/drivers/mtd/cfi_flash.c
>>> @@ -41,6 +41,7 @@
>>> #include
>>> #include
>>>
>>> +#ifndef CONFIG_SYS_NO_FLASH
>>> /*
>>>* This file implements a Common Flash Interface (CFI) driver for
>>>* U-Boot.
>>> @@ -2020,3 +2021,5 @@ unsigned long flash_init (void)
>>>
>>> return (size);
>>> }
>>> +
>>> +#endif
>> Removing CONFIG_CFI_DRIVER from configs/qemu_mips.h?
> If CONFIG_SYS_NO_FLASH is defined should it be compiled?
No. In U-Boot, in general, drivers should be predefined through
configs/.h. If we don't use CFI driver, just disable
it in top-level board config file. This is to avoid #ifdef mess,
and prevent the drivers from being clobbered.
--
Shinya Kuribayashi
NEC Electronics
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[U-Boot] [PATCH 1/2] MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernel
with a few adjustments for U-Boot. This fixes the following build error: make -C lib_generic/ zlib.c:31:27: error: asm/unaligned.h: No such file or directory zlib.c: In function 'inflate_fast': zlib.c:641: warning: implicit declaration of function 'get_unaligned' make[1]: *** [zlib.o] Error 1 make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic' make: *** [lib_generic/libgeneric.a] Error 2 Reported-by: Himanshu Chauhan Signed-off-by: Shinya Kuribayashi --- include/asm-mips/unaligned.h | 26 ++ 1 files changed, 26 insertions(+), 0 deletions(-) create mode 100644 include/asm-mips/unaligned.h diff --git a/include/asm-mips/unaligned.h b/include/asm-mips/unaligned.h new file mode 100644 index 000..da6a347 --- /dev/null +++ b/include/asm-mips/unaligned.h @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2007 Ralf Baechle (r...@linux-mips.org) + */ +#ifndef _ASM_MIPS_UNALIGNED_H +#define _ASM_MIPS_UNALIGNED_H + +#include +#if defined(__MIPSEB__) +# define get_unaligned __get_unaligned_be +# define put_unaligned __put_unaligned_be +#elif defined(__MIPSEL__) +# define get_unaligned __get_unaligned_le +# define put_unaligned __put_unaligned_le +#else +# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" +#endif + +# include +# include +# include + +#endif /* _ASM_MIPS_UNALIGNED_H */ -- 1.6.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] MIPS: lib_mips/board.c: Fix undefined "getenv_IPaddr" build error
In the commit 6ac59c55 (net: pull CONFIG checks out of source and into
makefile), net/net.o is changed to be built-in only when CONFIG_CMD_NET
is enabled, while lib_mips/board.c has a reference to "getenv_IPaddr()
left as-is.
And now Micronas VCT Platinum AVC board builds (vct_platinumavc*_config)
failed as follows, because they don't have ethernet support and disable
CONFIG_CMD_NET option:
lib_mips/libmips.a(board.o): In function `board_init_r':
board.c:(.text+0x2e4): undefined reference to `getenv_IPaddr'
make: *** [u-boot] Error 1
VCT Platinum AVC is the only MIPS target who doesn't have CONFIG_CMD_NET
and suffer from this issue at this moment.
Signed-off-by: Shinya Kuribayashi
---
Note that arm/avr32/i386/m68k/nios/nios2/ppc/sparc have the same issue,
while blackfin/microblaze/sh don't.
lib_mips/board.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/lib_mips/board.c b/lib_mips/board.c
index b2d113e..5c35884 100644
--- a/lib_mips/board.c
+++ b/lib_mips/board.c
@@ -370,8 +370,10 @@ void board_init_r (gd_t *id, ulong dest_addr)
/* relocate environment function pointers etc. */
env_relocate();
+#ifdef CONFIG_CMD_NET
/* IP Address */
bd->bi_ip_addr = getenv_IPaddr("ipaddr");
+#endif
#if defined(CONFIG_PCI)
/*
--
1.6.6
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[U-Boot] Flex-OneNAND related build breakage (was Re: MIPS: build status (2010.01))
Hi Rohit, Amul, and Kyungmin (Samsung people),
Shinya Kuribayashi wrote:
> Build warnings / errors could be categorized into five groups:
>
> 3) env_onenand.c: CONFIG_ENV_{ADDR,SIZE}_FLEX undeclared build error
In the following commit, Flex-OneNAND support was introduced:
commit c758e947aa7d39a2be607ecdedd818ad300807b2
Author: Amul Kumar Saha
Date: Wed Nov 4 10:38:46 2009 +0530
ENV Variable support for Flex-OneNAND
Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX
for storing environment variables.
Signed-off-by: Rohit Hagargundgi
Signed-off-by: Amul Kumar Saha
However, it breaks the existing 'normal' OneNAND user's builds like this:
LOG/vct_platinum_onenand.ERR
-
env_onenand.c: In function 'env_relocate_spec':
env_onenand.c:70: error: 'CONFIG_ENV_ADDR_FLEX' undeclared (first use in this
function)
env_onenand.c:70: error: (Each undeclared identifier is reported only once
env_onenand.c:70: error: for each function it appears in.)
env_onenand.c: In function 'saveenv':
env_onenand.c:106: error: 'CONFIG_ENV_ADDR_FLEX' undeclared (first use in this
function)
env_onenand.c:107: error: 'CONFIG_ENV_SIZE_FLEX' undeclared (first use in this
function)
make[1]: *** [env_onenand.o] Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [common/libcommon.a] Error 2
Affected (MIPS) targets:
- MIPS Micronas VCT Premium/Platinum/Platinum AVC (vct_*_onenand_config).
- I'm not sure about other OneNAND users in mainline.
Having a look at the code, and from CONFIG_ENV_{ADDR,SIZE}_FLEX names,
they're apparently Flex-OneNAND specific configurations, right? If so
'normal' OneNAND users don't want to have, I'm afraid.
Any comments on how, and where supposed to be fixed?
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[U-Boot] MIPS: build status (2010.01)
Hi,
here's a build summary of the latest git with GCC 4.4.1:
$ ./MAKEALL mips mips_el
- SUMMARY
Boards compiled: 23
Boards with warnings or errors: 11 ( qemu_mips vct_platinum_onenand
vct_platinum_onenand_small vct_platinumavc_onenand
vct_platinumavc_onenand_small vct_premium_onenand
vct_premium_onenand_small dbau1000 dbau1100 dbau1500 gth2 )
--
Build warnings / errors could be categorized into five groups:
1) zlib.c: missing build error
2) lib_mips/board.c: undefined reference to `getenv_IPaddr' build error
3) env_onenand.c: CONFIG_ENV_{ADDR,SIZE}_FLEX undeclared build error
4) cmd_ide.c: dbuf strict-aliasing warning
5) dlmalloc.c: strict-aliasing warning
I'll post two patches to fix #1 and #2. As for #3, I'll reply to this
mail with build logs to remind appropriate people of these issues.
Per #4, it would be better to upgrade the byteorder/swab headers first,
rather than fixing occasional strict-aliasing reports. Since they are
only reported by GCC 4.4, I'd like to leave this issue as-is for now.
With regard to #5, I've checked the mail archives and found that this
is one of the known issues, I will ignore it.
$ mips-linux-gnu-gcc --version
mips-linux-gnu-gcc (Sourcery G++ Lite 4.4-57) 4.4.1
Copyright (C) 2009 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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Re: [U-Boot] Flex-OneNAND related build breakage (was Re: MIPS: build status (2010.01))
On 1/11/10 1:09 PM, AMIT KUMARSHARMA wrote: > HI Shinya, > > Please go thorugh below link , issue is already resolved, Ah, thanks. I missed that. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] MIPS: lib_mips/board.c: Fix undefined "getenv_IPaddr" build error
On 1/11/10 11:00 AM, Shinya Kuribayashi wrote: > In the commit 6ac59c55 (net: pull CONFIG checks out of source and into > makefile), net/net.o is changed to be built-in only when CONFIG_CMD_NET > is enabled, while lib_mips/board.c has a reference to "getenv_IPaddr() > left as-is. > > And now Micronas VCT Platinum AVC board builds (vct_platinumavc*_config) > failed as follows, because they don't have ethernet support and disable > CONFIG_CMD_NET option: > > lib_mips/libmips.a(board.o): In function `board_init_r': > board.c:(.text+0x2e4): undefined reference to `getenv_IPaddr' > make: *** [u-boot] Error 1 And I missed that this one will be fixed soon in a different way. Please ignore this patch, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] MIPS updates
Hi, please pull the following unaligned.h patch required by zlib.c. Thanks in advance, Shinya --- The following changes since commit 50ef25ef24eccd8e69d2c1ccc97b3f7e30109f51: Michal Simek (1): microblaze: zlib needs asm/unaligned.h are available in the git repository at: git://git.denx.de/u-boot-mips.git master Shinya Kuribayashi (1): MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernel include/asm-mips/unaligned.h | 26 ++ 1 files changed, 26 insertions(+), 0 deletions(-) create mode 100644 include/asm-mips/unaligned.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MIPS: VCT: Remove read_spareram reference
The commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove unused read_spareram and add unlock_all as kernel does) forgot to fixup a local reference to read_spareram in board/micronas/vct/ebi_onenand.c, which causes the following build failure when configured with OneNAND: ebi_onenand.c: In function 'onenand_board_init': ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 'read_spareram' make[1]: *** [ebi_onenand.o] Error 1 make[1]: *** Waiting for unfinished jobs make: *** [board/micronas/vct/libvct.a] Error 2 Signed-off-by: Shinya Kuribayashi Cc: Signed-off-by: Stefan Roese Cc: Signed-off-by: Kyungmin Park --- Wolfgang, once approved by a board maintainer, please apply directly. Thanks in advance, board/micronas/vct/ebi_onenand.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/board/micronas/vct/ebi_onenand.c b/board/micronas/vct/ebi_onenand.c index 522b88f..1e8afa6 100644 --- a/board/micronas/vct/ebi_onenand.c +++ b/board/micronas/vct/ebi_onenand.c @@ -193,6 +193,5 @@ void onenand_board_init(struct mtd_info *mtd) chip->write_word = ebi_nand_write_word; chip->read_bufferram = ebi_read_bufferram; - chip->read_spareram = ebi_read_bufferram; chip->write_bufferram = ebi_write_bufferram; } ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] MIPS: VCT: Remove read_spareram reference
The commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove unused read_spareram and add unlock_all as kernel does) forgot to remove a local reference to read_spareram in board/micronas/vct/ebi_onenand.c, which causes the following build failure when configured with OneNAND: ebi_onenand.c: In function 'onenand_board_init': ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 'read_spareram' make[1]: *** [ebi_onenand.o] Error 1 make[1]: *** Waiting for unfinished jobs make: *** [board/micronas/vct/libvct.a] Error 2 Signed-off-by: Shinya Kuribayashi Acked-by: Stefan Roese Cc: Kyungmin Park --- v2: - Cc: lines are corrected! - Add Acked-by: from Stefan. board/micronas/vct/ebi_onenand.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/board/micronas/vct/ebi_onenand.c b/board/micronas/vct/ebi_onenand.c index 522b88f..1e8afa6 100644 --- a/board/micronas/vct/ebi_onenand.c +++ b/board/micronas/vct/ebi_onenand.c @@ -193,6 +193,5 @@ void onenand_board_init(struct mtd_info *mtd) chip->write_word = ebi_nand_write_word; chip->read_bufferram = ebi_read_bufferram; - chip->read_spareram = ebi_read_bufferram; chip->write_bufferram = ebi_write_bufferram; } ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] qemu_mips: Fix CONFIG_NET_MULTI build warning
eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please update to use CONFIG_NET_MULTI Signed-off-by: Shinya Kuribayashi --- I have a few concerns about this fix: First. I'm not sure why CONFIG_NET_MULTI is "undef"ed for qemu_mips, while CONFIG_DRIVER_NE2000 has been enabled for qemu_mips at an early stage. I don't follow recent changes around eth.c and CONFIG_NET_MULTI, but it's probably CONFIG_NET_MULTI used to be used strictly for multi ports, isn't it? Next. As far as looking at drivers/net/ne2000*.[ch], NE2000 driver doesn't seem to require board_eth_init() or cpu_eth_init(). Right? Therefore I've not added a corresponding hook in board/qemu_mips/ qemu_mips.c. If my understanding is wrong, please let me know. include/configs/qemu-mips.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index cbacdf9..f419174 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -157,7 +157,7 @@ #define CONFIG_ENV_OVERWRITE 1 -#undef CONFIG_NET_MULTI +#define CONFIG_NET_MULTI #define MEM_SIZE 128 -- 1.6.5.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] qemu_mips: Fix CONFIG_NET_MULTI build warning
Hi Ben, Ben Warren wrote: > Shinya Kuribayashi wrote: >> First. I'm not sure why CONFIG_NET_MULTI is "undef"ed for qemu_mips, >> while CONFIG_DRIVER_NE2000 has been enabled for qemu_mips at an early >> stage. >> >> I don't follow recent changes around eth.c and CONFIG_NET_MULTI, but >> it's probably CONFIG_NET_MULTI used to be used strictly for multi >> ports, isn't it? >> > Currently, there are two incompatible networking APIs. One that uses > CONFIG_NET_MULTI, and one that doesn't. I'm trying to move everything > towards the former (single-port applications are of course a degenerate > instance of multi-port ones). Once all drivers have been ported to the > MULTI API, that config option will magically disappear. Thanks, got it. >> Next. As far as looking at drivers/net/ne2000*.[ch], NE2000 driver >> doesn't seem to require board_eth_init() or cpu_eth_init(). Right? >> Therefore I've not added a corresponding hook in board/qemu_mips/ >> qemu_mips.c. If my understanding is wrong, please let me know. >> > The NE2000 driver hasn't been ported yet. It's on my short term to-do > list, and will be in the next release (01.2010, I guess?) So CONFIG_NE2000_DRIVER needs some work, and is not ready for migration. I missed that point, thanks for clarification. >> @@ -157,7 +157,7 @@ >> >> #define CONFIG_ENV_OVERWRITE1 >> >> -#undef CONFIG_NET_MULTI >> +#define CONFIG_NET_MULTI >> >> > This won't do anything other than disabling networking. Since QEMU is > an emulator, though, maybe it would make sense to use a device driver > that has CONFIG_NET_MULTI support? Who knows? It's hard, at least for me, to say. But it'd be better to port NE2000 driver into an appropriate shape whether it's used by QEMU or not. >> #define MEM_SIZE128 >> >> > If the warning isn't more than a nuisance, please live with it for now. No problem. Please ignore the patch. Thanks, Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/6] Clean up top-level directory structure
Hi, Peter Tyser wrote: > This series moves api_examples to api/examples and moves all > lib* directories into a common lib/ directory. It also > moves the _config.mk files into their corresponding > lib directory. > > Seeing 12 lib_ directories and 12 _config.mk > files in U-Boot's top level always annoyed me, Me, too. Before verifying MIPS builds, I'd like to make sure that why you take lib/$(ARCH)/ alternative, not $(ARCH)/lib/. If there were any discussion on #IRC, is there any chance we could share the summary or decision to follow? Please note that I agree with such cleanup, of course. I just would like to make sure that lib/$(ARCH)/ is an authorized policy or not. If authorized one, I'm fine. Thanks in advance, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/6] Clean up top-level directory structure
Peter Tyser wrote: >> Before verifying MIPS builds, I'd like to make sure that why you take >> lib/$(ARCH)/ alternative, not $(ARCH)/lib/. If there were any >> discussion on #IRC, is there any chance we could share the summary or >> decision to follow? > > There was no discussion, /lib/$(ARCH) just made more sense to me and it > was functionally a direct translation from lib_$(ARCH) to lib/$(ARCH). > > Using $(ARCH)/lib wouldn't clean up the top-level directory structure > much and would open a can of worms that I'm not prepared to deal with at > this time. For example, if there was an architecture specific Oops, I wanted to say "arch/$(ARCH)/lib/", not $(ARCH)/lib/, sorry. > directory, it would seem logical to put cpus of that $(ARCH) type in it > too, eg > ppc/ > lib/ > mpc8260 > mpc85xx/ > mpc86xx/ > > sh/ > lib/ > sh2/ > sh3/ > sh4/ > > ... > > My change was just meant to be an incremental improvement, but I could > see advantages to using the $(ARCH)/... structure if we wanted to make > larger changes. Anyway, I'd be curious to hear other's opinions about > other directory layouts. > > While we're talking about it, I'd always thought it would be nice to > split out all the cmd_* files from common/ into their own command/ > directory similar to u-boot-v2. Ack. The directory structure in u-boot-v2 looks nice, at least, to me, anyway. >> Please note that I agree with such cleanup, of course. I just would >> like to make sure that lib/$(ARCH)/ is an authorized policy or not. >> If authorized one, I'm fine. > > I was just scratching an itch, nothing official:) Got it. Thanks for the kind explanation, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/6] Clean up top-level directory structure
Peter Tyser wrote: > On Sun, 2009-07-12 at 14:54 +0200, Jean-Christophe PLAGNIOL-VILLARD > wrote: >> On 22:42 Fri 10 Jul , Mike Frysinger wrote: >>> On Friday 10 July 2009 21:20:45 Shinya Kuribayashi wrote: >>>> Peter Tyser wrote: >>>>>> Before verifying MIPS builds, I'd like to make sure that why you take >>>>>> lib/$(ARCH)/ alternative, not $(ARCH)/lib/. If there were any >>>>>> discussion on #IRC, is there any chance we could share the summary or >>>>>> decision to follow? >>>>> There was no discussion, /lib/$(ARCH) just made more sense to me and it >>>>> was functionally a direct translation from lib_$(ARCH) to lib/$(ARCH). >>>>> >>>>> Using $(ARCH)/lib wouldn't clean up the top-level directory structure >>>>> much and would open a can of worms that I'm not prepared to deal with at >>>>> this time. For example, if there was an architecture specific >>>> Oops, I wanted to say "arch/$(ARCH)/lib/", not $(ARCH)/lib/, sorry. >>> i thought that originally, but i dont care much either way. having >>> arch/$(ARCH)/ would line up with u-boot-v2 and the linux kernel though. >>> >>> i dont understand needing a lib/ subdir under arch/$(ARCH)/ though. >>> >>>>> While we're talking about it, I'd always thought it would be nice to >>>>> split out all the cmd_* files from common/ into their own command/ >>>>> directory similar to u-boot-v2. >>>> Ack. The directory structure in u-boot-v2 looks nice, at least, to me, >>>> anyway. >> I prefer the >> arch/$(ARCH)/lib >> so will could also move the cpu stuff there too > > I like the Linux and u-boot-v2 directory layout too the more I think > about it too. How about if I resend this series but with the final > directory structure looking like: > > /arch/$(ARCH)/lib/ > /lib/ > / > /libfdt/ > /lzma/ > /lzo/ > > /examples/ > /api/ > /standalone/ > > > That will lay the groundwork for moving additional files > into /arch/$(ARCH)/ down the road. eg I think it would be nice to move > the directories in /cpu/* into their respective /arch/$(ARCH)/ > directory, and possibly the /include/asm-$(ARCH) directories in the long > run. > > What do others think of this? There were some discussions we'd better to reflect back on about this topic. I can't toss the URLs of them at the moment as I'm behind a firewall, but these might help: Date: Thu, 13 Sep 2007 17:28:47 -0600 From: "Grant Likely" To: uboot , "Jon Loeliger" , "Wolfgang Denk" Subject: [U-Boot-Users] [RFC] u-boot migration to kconfig and Date: Sat, 22 Sep 2007 12:27:38 +0200 From: Jean-Christophe PLAGNIOL-VILLARD To: Subject: [U-Boot-Users] [RFC] u-boot migration to kconfig -- Shinya Kuribayashi NEC Electronics ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OneNAND IPL: Move u-boot-onenand linker script to common use
Scott Wood wrote: > On Mon, Jul 13, 2009 at 09:48:30AM +0900, Kyungmin Park wrote: >> Basically I agree your opinion, however do see the other arch OneNAND >> usage? I mean I can't see the other arch patches. > > There was nothing but powerpc in nand_spl at first, but I don't think ARM > developers would have appreciated finding hardcoded powerpc assumptions > when they tried to add their boards. Heh, we're already using onenand_ipl on our MIPS machines ;-) -- Shinya Kuribayashi NEC Electronics ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot-Users] MIPS: accessing flash > 8MB
Chetan Nanda wrote: > We have a MIPS-4KEC based SoC and running an older version of U-Boot > (1.1.3) on it. It is working perfectly fine. > Board has 8MB AMD flash and starting address of that flash is 0xBFC0 > (reset vector for MIPS). > > Problem is that we are not able to access full 8MB of flash. Only > 0xBFC0 - 0xBFFF (4MB) is accessible, as it lies in un-mapped, > un-cached region of MIPS. > From 0xC000 lies in mapped memory area of MIPS. > > Now my questions are, creating entry in TLBs is sufficient to access > rest of 4MB of flash? It depends on its physical address. If your flash device is mapped to 0x1FC0-0x203F, you'll need to access to the remaining half via TLBs. However, if it's mapped to 0x1F80-0x1FFF, no need to set up TLB entries; you can access anywhere in the devices using KSEG1 virtual addresses. > Is their any interface provided in U-boot to update TLB? There's write_one_tlb() prepared in cpu/mips/cpu.c (I don't know whether it works or not, as I've never had a chance to use it so far). Lastly, AFAIK there's no command line interface to do it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [STATUS] v2009.08-rc2 is out
Wolfgang Denk wrote: > Summary of current status: > > * Many boards now throw the (expected) > > #warning Ethernet driver is deprecated. Please update to use > CONFIG_NET_MULTI > > messages. I found qemu_mips_config is spotted by it: Configuring for qemu-mips board... eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please update to use CONFIG_NET_MULTI But I don't follow the recent changes including that CONFIG_NET_MULTI migration, nor I don't have enough spare time to look into it, so gave up this time, sorry. > * ARM and PowerPC: mostly compile clean; there are a few issues, > responsible s have been notified For the rest, MIPS builds are pretty in good shape as follows. skuri...@ubuntu:u-boot.git$ ./MAKEALL mips mips_el Configuring for incaip board... textdata bss dec hex filename 1470326476 20240 173748 2a6b4 ./u-boot Configuring for qemu-mips board... eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please update to use CONFIG_NET_MULTI textdata bss dec hex filename 1717446340 221768 399852 619ec ./u-boot ... on Platinum board variant Configuring for vct board... textdata bss dec hex filename 199916 12568 284420 496904 79508 ./u-boot ... on Platinum board variant ... stripped down image variant Configuring for vct board... textdata bss dec hex filename 882964196 13716 106208 19ee0 ./u-boot ... on Platinum board variant ... on OneNAND board variant Configuring for vct board... textdata bss dec hex filename 296608 13728 289764 600100 92824 ./u-boot ... on Platinum board variant ... on OneNAND board variant ... stripped down image variant Configuring for vct board... textdata bss dec hex filename 1840165344 19080 208440 32e38 ./u-boot ... on PlatinumAVC board variant Configuring for vct board... textdata bss dec hex filename 1185085112 14944 138564 21d44 ./u-boot ... on PlatinumAVC board variant ... stripped down image variant Configuring for vct board... textdata bss dec hex filename 878164196 13716 105728 19d00 ./u-boot ... on PlatinumAVC board variant ... on OneNAND board variant Configuring for vct board... textdata bss dec hex filename 2152646268 20308 241840 3b0b0 ./u-boot ... on PlatinumAVC board variant ... on OneNAND board variant ... stripped down image variant Configuring for vct board... textdata bss dec hex filename 1835285344 19080 207952 32c50 ./u-boot ... on Premium board variant Configuring for vct board... textdata bss dec hex filename 199916 12568 284420 496904 79508 ./u-boot ... on Premium board variant ... stripped down image variant Configuring for vct board... textdata bss dec hex filename 882964196 13716 106208 19ee0 ./u-boot ... on Premium board variant ... on OneNAND board variant Configuring for vct board... textdata bss dec hex filename 296608 13728 289764 600100 92824 ./u-boot ... on Premium board variant ... on OneNAND board variant ... stripped down image variant Configuring for vct board... textdata bss dec hex filename 1840165344 19080 208440 32e38 ./u-boot Configuring for purple board... textdata bss dec hex filename 1476886168 18956 172812 2a30c ./u-boot Configuring for dbau1x00 board... textdata bss dec hex filename 1209285172 20680 146780 23d5c ./u-boot Configuring for dbau1x00 board... textdata bss dec hex filename 1209285172 20680 146780 23d5c ./u-boot Configuring for dbau1x00 board... textdata bss dec hex filename 1209285172 20680 146780 23d5c ./u-boot Configuring for dbau1x00 board... textdata bss dec hex filename 1169365256 23352 145544 23888 ./u-boot Configuring for dbau1x00 board... textdata bss dec hex filename 1169365256 23352 145544 23888 ./u-boot Configuring for gth2 board... textdata bss dec hex filename 1116565140 18376 135172 21004 ./u-boot Configuring for dbau1x00 board... textdata bss dec hex filename 1169365256 23352 145544 23888 ./u-boot Configuring for pb1x00 board... textdata bss dec hex filename 1064606004 20488 132952 20758 ./u-boot skuri...@ubuntu:u-boot.git$ skuri...@ubuntu:u-boot.git$ skuri...@ubuntu:u-boot.git$ mips-linux-gnu-gcc --version mips-linux-gnu-gcc (Sourcery G++ Lite 4.3-154) 4.3.3 Copyright (C) 2008 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. skuri...@ubuntu:u-boot.git$ mips-linux-gnu-as --version GNU assemb
Re: [U-Boot] [STATUS] v2009.08-rc2 is out
Hi, Ben Warren wrote: >> I found qemu_mips_config is spotted by it: >> Configuring for qemu-mips board... >> eth.c:497:2: warning: #warning Ethernet driver is deprecated. Please >> update to use CONFIG_NET_MULTI >> >> But I don't follow the recent changes including that CONFIG_NET_MULTI >> migration, nor I don't have enough spare time to look into it, so gave >> up this time, sorry. >> >> > The DM9000 driver uses the old networking API, and needs to be updated. > I have it partly done and will be submitting to the ML soon. Hopefully > you'll be able to test my patch :) Nice! Once submitted, I'll check it builds on my side. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] qemu-mips: Fix Qemu website
mon...@monstr.eu wrote: > From: Michal Simek > > Signed-off-by: Michal Simek > Signed-off-by: Michal Simek > --- > board/qemu-mips/README |2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) Wolfgang, please take this one directly into your mainline as obvious. Thanks in advance, Shinya > diff --git a/board/qemu-mips/README b/board/qemu-mips/README > index 4c1f8ed..565241b 100644 > --- a/board/qemu-mips/README > +++ b/board/qemu-mips/README > @@ -2,7 +2,7 @@ By Vlad Lungu vlad.lu...@windriver.com 2007-Oct-01 > > Qemu is a full system emulator. See > > -http://fabrice.bellard.free.fr/qemu > +http://www.nongnu.org/qemu/ > > Limitations & comments > -- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] PATCH mtd CFI flash: timeout calculation underflow if imprecise 1kHz timer: fix
Renato Andreola wrote:
> From 21d84ab72266f118794233176bd356d8b1cfdf35 Mon Sep 17 00:00:00 2001
> From: Renato Andreola
> Date: Fri, 21 Aug 2009 18:05:51 +0200
> Subject: [PATCH] drivers/mtd/cfi_flash: precision and underflow problem in
> tout calculation
>
> With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.
>
> Signed-off-by: Alessandro Rubini Renato Andreola
>
> ---
> drivers/mtd/cfi_flash.c |8 +---
> 1 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
> index 81ac5d3..0d8fc54 100644
> --- a/drivers/mtd/cfi_flash.c
> +++ b/drivers/mtd/cfi_flash.c
> @@ -660,9 +660,11 @@ static int flash_status_check (flash_info_t * info,
> flash_sect_t sector,
> ulong start;
>
> #if CONFIG_SYS_HZ != 1000
> - tout *= CONFIG_SYS_HZ/1000;
> -#endif
> -
> + if ((ulong)CONFIG_SYS_HZ > 10)
> + tout *= (ulong)CONFIG_SYS_HZ/1000; /* for a big HZ, avoid
> overflow */
> + else
> + tout = DIV_ROUND_UP(tout*(ulong)CONFIG_SYS_HZ, 1000);
> +#endif
> /* Wait for command completion */
> start = get_timer (0);
> while (flash_is_busy (info, sector)) {
What should to be fixed first in this case, would be your CONFIG_SYS_HZ
setting, that is NIOS2? timer implementation, yeah really. But I would
also point out that there is another case flash_status_check() doensn't
work as expected.
One of my colleagues found that with some flash device(s) (I don't
recall precisely, sorry), 'tout' would be probed to be zero. In that
case, a workaround something like above still doesn't work.
We have not sorted out where the problem is; it might be in cfi_flash.c,
or in the flash device itself. This is observed with v2009.03 release,
and we've been having a workaround for it for months. I'd like to have
a look someday.
Anyway, checking to see if 'tout' is zero or not would be sometimes
worth a try, when you think cfi_flash.c doesn't work as expected.
Just for your information,
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Re: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers
Detlev Zundel wrote:
> As I said, I understand now why there were different data-types involved
> although this was kind of non-obvious. So I take it, you had a working
> configuration with REG_SIZE = 4, correct?
I might be unclear. I used to use REG_SIZE = -16, as 16550 registers
are located at 0, +0x10, +0x20, ..., .
In this case, I don't think REG_SIZE = 4/-4 works. Let's see:
REG_SIZE = 4
struct NS16550 {
unsigned char prepad_rbr[3];
unsigned char rbr;
unsigned char prepad_ier[3];
unsigned char ier;
:
:
};
REG_SIZE = -4
-
struct NS16550 {
unsigned char rbr;
unsigned char postpad_rbr[3];
unsigned char ier;
unsigned char postpad_ier[3];
:
:
};
because 16550 registers can be aligned in 16-bytes-interval.
And make things worse, REG_SIZE = 16/-16 also don't work.
REG_SIZE = 16
-
struct NS16550 {
unsigned char prepad_rbr[15];
unsigned char rbr;
unsigned char prepad_ier[15];
unsigned char ier;
:
:
};
REG_SIZE = -16
--
struct NS16550 {
unsigned char rbr;
unsigned char postpad_rbr[15];
unsigned char ier;
unsigned char postpad_ier[15];
:
:
};
What I need is something like this:
struct NS16550 {
unsigned char prepad_rbr[3];
unsigned char rbr;
unsigned char postpad_rbr[12];
:
:
};
or this also might work,
struct NS16550 {
unsigned long rbr;
unsigned long pre_padrbr[3];
:
:
};
Makes sense?
> Can you enlighten me, why exactly the 8-bit accesses do not work on your
> hardware? Is this because of a "too simplistic" address decoding logic?
> What endianness is your CPU using?
I don't know much about precise hardware logics, but the byte addresses
under 16-bytes-border are ignored. I'm using a big-endian mips machine.
> I see. Actually I was looking a lot at the Linux driver but was hoping
> that we could away without introducing serial_{in,out}...
In my horrible opinion, the combinations of base addres + reg_shift
+ iotype (char, long, or whatever), are simpler, more configurable,
more slid, easy to use, than what we used to have or what you
consolidated this time.
> diff --git a/include/ns16550.h b/include/ns16550.h
> index ce606b5..7924396 100644
> --- a/include/ns16550.h
> +++ b/include/ns16550.h
> @@ -21,16 +21,20 @@
> * will not allocate storage for arrays of size 0
> */
>
> +#if !defined(CONFIG_SYS_NS16550_REG_TYPE)
> +#define UART_REG_TYPE unsigned char
> +#endif
> +
> #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE ==
> 0)
> #error "Please define NS16550 registers size."
> #elif (CONFIG_SYS_NS16550_REG_SIZE > 0)
> -#define UART_REG(x) \
> - unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \
> - unsigned char x;
> +#define UART_REG(x) \
> + UART_REG_TYPE prepad_##x[CONFIG_SYS_NS16550_REG_SIZE -
> sizeof(UART_REG_TYPE)]; \
> + UART_REG_TYPE x;
> #elif (CONFIG_SYS_NS16550_REG_SIZE < 0)
> #define UART_REG(x) \
> - unsigned char x;\
> - unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
> + UART_REG_TYPE x;\
> + UART_REG_TYPE postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE -
> sizeof(UART_REG_TYPE)];
> #endif
>
> struct NS16550 {
>
>
> Then you could do a
>
> #define CONFIG_SYS_NS16550_REG_SIZE 4
> #define CONFIG_SYS_NS16550_REG_TYPE unsigned long
>
> This of course needs to be documented once it works ;)
Looks to me like playing with macros...
Shinya
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Re: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers
Shinya Kuribayashi wrote:
> Detlev Zundel wrote:
>> As I said, I understand now why there were different data-types involved
>> although this was kind of non-obvious. So I take it, you had a working
>> configuration with REG_SIZE = 4, correct?
>
> I might be unclear. I used to use REG_SIZE = -16, as 16550 registers
> are located at 0, +0x10, +0x20, ..., .
>
> In this case, I don't think REG_SIZE = 4/-4 works. Let's see:
>
> REG_SIZE = 4
>
> struct NS16550 {
> unsigned char prepad_rbr[3];
> unsigned char rbr;
> unsigned char prepad_ier[3];
> unsigned char ier;
> :
> :
> };
>
> REG_SIZE = -4
> -
> struct NS16550 {
> unsigned char rbr;
> unsigned char postpad_rbr[3];
> unsigned char ier;
> unsigned char postpad_ier[3];
> :
> :
> };
>
> because 16550 registers can be aligned in 16-bytes-interval.
s/can be aligned/can not be aligned/
>> diff --git a/include/ns16550.h b/include/ns16550.h
>> index ce606b5..7924396 100644
>> --- a/include/ns16550.h
>> +++ b/include/ns16550.h
>> @@ -21,16 +21,20 @@
>> * will not allocate storage for arrays of size 0
>> */
>>
>> +#if !defined(CONFIG_SYS_NS16550_REG_TYPE)
>> +#define UART_REG_TYPE unsigned char
>> +#endif
>> +
>> #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE
>> == 0)
>> #error "Please define NS16550 registers size."
>> #elif (CONFIG_SYS_NS16550_REG_SIZE > 0)
>> -#define UART_REG(x)\
>> -unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \
>> -unsigned char x;
>> +#define UART_REG(x) \
>> +UART_REG_TYPE prepad_##x[CONFIG_SYS_NS16550_REG_SIZE -
>> sizeof(UART_REG_TYPE)]; \
>> +UART_REG_TYPE x;
>> #elif (CONFIG_SYS_NS16550_REG_SIZE < 0)
>> #define UART_REG(x) \
>> -unsigned char x;\
>> -unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
>> +UART_REG_TYPE x;\
>> +UART_REG_TYPE postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE -
>> sizeof(UART_REG_TYPE)];
>> #endif
>>
>> struct NS16550 {
>>
>>
>> Then you could do a
>>
>> #define CONFIG_SYS_NS16550_REG_SIZE 4
>> #define CONFIG_SYS_NS16550_REG_TYPE unsigned long
>>
>> This of course needs to be documented once it works ;)
>
> Looks to me like playing with macros...
Looks to me like playing with macros... but,
this is better than before, and would work for my machine.
I'm alo not interested in maintaining UART driver, so such work
reducing our maintenance cost is highly appreciated. Thanks,
Shinya
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Re: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers
Hi,
Detlev Zundel wrote:
> Thinking about it some more, I wonder about the following. You said,
> this would work for you:
>
> struct NS16550 {
>unsigned long rbr;
>unsigned long postpad_rbr[3];
>
>
> while
>
> struct NS16550 {
>unsigned char rbr;
>unsigned char postpad_rbr[12];
15?
> ...
>
> doesn't. If we regard only the "significant" 8-bits, the first layout
> is congruent to the second shifted by 2 bytes (on big-endian machines).
I think you mean 'at offset 0x3', right?
My 16550 registers are like this:
0123
+++++
0x00| reserved |rbr |
+++++
0x04| reserved |
+++++
0x08| reserved |
+++++
0x0c| reserved |
+++++
0x10| reserved |ier |
+++++
0x14| reserved |
+++++
0x18| reserved |
+++++
0x1c| reserved |
+++++
...
> So what about using +16 for your board and lower the base address by 2?
> Does that work? What is your base address? Is that 64-bit aligned?
With 64-bit (16 bytes) aligned base address, AND offset +0x3, AND
struct NS16550 configured by -16 (below)
struct NS16550 {
unsigned char rbr;
unsigned char postpad_rbr[15];
unsigned char ier;
unsigned char postpad_ier[15];
...
};
, then yes, I think this probably works for sane hardwares who can
handle byte read/write operations properly.
As for my hardware, however, this still doesn't work. My processor
(MIPS 4KEc) of couse supports byte read/write, on the other hand,
the address decoder at UART module can not handle byte addresses
properly; all byte read/write accesses with +1/+2/+3 offset, will
be round-down to +0. Therefore, I can take 'offset +0x3' option.
This is the reasony I said 'my hardware requires 32-bit word access
to NS16550 registers'.
> This is somewhat hypothetical and outright ugly, but I still want to
> know if this works.
I know the address decoder of my UART hardware sucks, but it's not
unusual.
I'll reply to remaining mails shortly.
Thanks,
Shinya
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Re: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers
Hi,
Detlev Zundel wrote:
>>> I see. Actually I was looking a lot at the Linux driver but was hoping
>>> that we could away without introducing serial_{in,out}...
>> In my horrible opinion, the combinations of base addres + reg_shift
>> + iotype (char, long, or whatever), are simpler, more configurable,
>> more slid, easy to use, than what we used to have or what you
>> consolidated this time.
>
> You lost me here.
>
> You truly consider
>
> static unsigned int serial_in(struct uart_8250_port *up, int offset)
[snip]
> }
>
> to be "simpler and more solid" readb(struct->field) (which is
> effectively what we have in the current implementation)? You consider
> "more configurable" to be a good in its own?
Yes.
> If your answers to these questions are yes, then we have different ideas
> of writing code.
Please make sure we don't need full serial_{in,out} port from Linux
as-is. As suggested, the combinations of base addres + reg_shift +
iotype, are rather reasonable to support various kind of hardwares.
I mean we need something like this:
static unsigned int serial_in(struct uart_8250_port *up, int offset)
{
unsigned int tmp;
int ret;
offset = map_8250_in_reg(up, offset) << up->port.regshift;
switch (up->port.iotype) {
case UPIO_MEM:
ret = readb(up->port.membase + offset);
break;
case UPIO_MEM32:
ret = readl(up->port.membase + offset);
break;
default:
ret = inb(up->port.iobase + offset);
break;
}
return ret;
}
Its implementation must be differed in U-Boot code, of course.
>>> diff --git a/include/ns16550.h b/include/ns16550.h
>>> index ce606b5..7924396 100644
>>> --- a/include/ns16550.h
>>> +++ b/include/ns16550.h
>>> @@ -21,16 +21,20 @@
>>> * will not allocate storage for arrays of size 0
>>> */
>>> +#if !defined(CONFIG_SYS_NS16550_REG_TYPE)
>>> +#define UART_REG_TYPE unsigned char
>>> +#endif
>>> +
>>> #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE
>>> == 0)
>>> #error "Please define NS16550 registers size."
>>> #elif (CONFIG_SYS_NS16550_REG_SIZE > 0)
>>> -#define UART_REG(x) \
>>> - unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \
>>> - unsigned char x;
>>> +#define UART_REG(x)
>>> \
>>> + UART_REG_TYPE prepad_##x[CONFIG_SYS_NS16550_REG_SIZE -
>>> sizeof(UART_REG_TYPE)]; \
>>> + UART_REG_TYPE x;
>>> #elif (CONFIG_SYS_NS16550_REG_SIZE < 0)
>>> #define UART_REG(x)
>>> \
>>> - unsigned char x;\
>>> - unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
>>> + UART_REG_TYPE x;\
>>> + UART_REG_TYPE postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE -
>>> sizeof(UART_REG_TYPE)];
>>> #endif
>>> struct NS16550 {
>>>
>>>
>>> Then you could do a
>>>
>>> #define CONFIG_SYS_NS16550_REG_SIZE 4
>>> #define CONFIG_SYS_NS16550_REG_TYPE unsigned long
>>>
>>> This of course needs to be documented once it works ;)
>> Looks to me like playing with macros...
>
> This is not playing. I have better things to do if I want to play.
> This was meant to be a solution for a problem which currently seems to
> only exist in one special configuration, namely yours.
I admit the address decoder in my UART hardware is weird and needs
special configuration, but this is not just for my case, it's not
unusual.
There're various kind of hardwares in the world, and there're many
U-Boot ports which can not be pushed to upstream for various reasons.
We can easily ignore such boards of course, but it would be very nice
for U-Boot if it could provide easy configurable drivers and could
support as many hardwares as possible.
Thanks for your time,
Shinya
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Re: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers
Hi Jerry-san, Jerry Van Baren wrote: >>> I might be unclear. I used to use REG_SIZE = -16, as 16550 registers >>> are located at 0, +0x10, +0x20, ..., . > > 16 byte stride. That is seriously odd. Well, 8 or 16 byte stride is not so odd, IMHO. >>> I don't know much about precise hardware logics, but the byte addresses >>> under 16-bytes-border are ignored. I'm using a big-endian mips machine. >> >> This does not make much sense to me, sorry. > > The "16" of the "16-bytes-border" statement confuses me too. Sorry for my poor vocabularies :-( > It sounds like Shinya has some pretty odd (read "broken") hardware that > is decoding the registers with a 16 byte stride, although his example > above shows a 4 byte stride (less broken). Let me reword: * my UART registers are located with 16 byte stride. * The address decoder in my UART block rounds +1/+2/+3 offsets down to zero offset. Therefore we can't do byte read/write to ns16550 registers properly; i.e. the return value of readb(x + 3) will be equal to readb(x). > I would further deduce his hardware does not support byte write > operations (I've never seen hardware that didn't support byte reads). > I've had hardware that did not support byte writes, so s/w needed to > write a word instead (given Shinya's description, the extra bytes are > "don't care"). (I've also dealt with flash connections that only > supported 64 bit writes - PITA!). Thanks for deducing :-) Yes, I wanted to say 'don't care'. > My guess is his processor limitations prevent byte writes so he has to > do 32bit (4byte) writes, but his hardware decoding results in a 16 byte > stride. The result is setting REG_SIZE to 4 gives him the r/w access he > needs (32 bits), but fails the stride. Setting it to 16 gives him the > stride he needs, but a 16 byte register is nonsensical and breaks the > software. My guess is Shinya needs another customization dial (I'm > making this up) "REG_STRIDE" = 16 as well as "REG_SIZE" = 4. Let me clarify: * My processor MIPS 4KEc doesn't have limitations on byte accesses. * My address decoder in UART block, can't handle +1/+2/+3 offsets properly. This is the reason I need 32-bit word accesses. And 16 byte stride is not related here. Thanks again for you translation, Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers
Shinya Kuribayashi wrote: > As for my hardware, however, this still doesn't work. My processor > (MIPS 4KEc) of couse supports byte read/write, on the other hand, > the address decoder at UART module can not handle byte addresses > properly; all byte read/write accesses with +1/+2/+3 offset, will > be round-down to +0. Therefore, I can take 'offset +0x3' option. Oops, s/can take/can not take/. > This is the reasony I said 'my hardware requires 32-bit word access > to NS16550 registers'. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MIPS: Implement ethernet halt for au1x00
Thomas Lange wrote:
> Implement ethernet halt() by putting MAC0 in reset.
> If we do not do this, we will get memory corruption
> when ethernet frames are received during early OS boot.
>
> Signed-off-by: Thomas Lange
> ---
> cpu/mips/au1x00_eth.c |4
> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
> index 6272a3a..5074997 100644
> --- a/cpu/mips/au1x00_eth.c
> +++ b/cpu/mips/au1x00_eth.c
> @@ -276,6 +276,10 @@ static int au1x00_init(struct eth_device* dev, bd_t *
> bd){
> }
>
> static void au1x00_halt(struct eth_device* dev){
> + volatile u32 *macen = (volatile u32*)MAC0_ENABLE;
> +
> + /* Put MAC0 in reset */
> + *macen = 0;
> }
>
> int au1x00_enet_initialize(bd_t *bis){
Acked-by: Shinya Kuribayashi
Wolfgang-san,
could you please pick up this patch directly? Thanks,
Shinya
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Re: [U-Boot] [PATCH] include/ns16550.h: Unify structure declaration for registers
Wolfgang Denk wrote: >>> We can easily ignore such boards of course, but it would be very nice >>> for U-Boot if it could provide easy configurable drivers and could >>> support as many hardwares as possible. >> Currently it seems that all in-tree boards can be accomodated with the >> construct that I suggested. I am not at all sure that we want code >> which is only used by out-of-tree ports. >> >> Post the port and we can rediscuss new code. > > Full ACK here. It makes no sense to spend time and resources on sup- > porting out-of-tree ports on broken hardware. Ok, that's fine by me. Thanks for your comments, Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] MIPS: Make all extern-ed functions in bitops.h static
All these functions are expected to be static inline-ed.
This patch also fixes the following build warnings on MIPS targets:
include/asm/bitops.h: In function 'ext2_find_next_zero_bit':
include/asm/bitops.h:862: warning: '__fswab32' is static but used in inline
function 'ext2_find_next_zero_bit' which is not static
include/asm/bitops.h:885: warning: '__fswab32' is static but used in inline
function 'ext2_find_next_zero_bit' which is not static
include/asm/bitops.h:887: warning: '__fswab32' is static but used in inline
function 'ext2_find_next_zero_bit' which is not static
Signed-off-by: Shinya Kuribayashi
---
include/asm-mips/bitops.h | 64 +++--
1 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 56d7225..659ac9d 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -60,7 +60,7 @@
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-extern __inline__ void
+static __inline__ void
set_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -84,7 +84,7 @@ set_bit(int nr, volatile void *addr)
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-extern __inline__ void __set_bit(int nr, volatile void * addr)
+static __inline__ void __set_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
@@ -101,7 +101,7 @@ extern __inline__ void __set_bit(int nr, volatile void *
addr)
* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
* in order to ensure changes are visible on other processors.
*/
-extern __inline__ void
+static __inline__ void
clear_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -125,7 +125,7 @@ clear_bit(int nr, volatile void *addr)
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-extern __inline__ void
+static __inline__ void
change_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -149,7 +149,7 @@ change_bit(int nr, volatile void *addr)
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-extern __inline__ void __change_bit(int nr, volatile void * addr)
+static __inline__ void __change_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
@@ -164,7 +164,7 @@ extern __inline__ void __change_bit(int nr, volatile void *
addr)
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-extern __inline__ int
+static __inline__ int
test_and_set_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -194,7 +194,7 @@ test_and_set_bit(int nr, volatile void *addr)
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
{
int mask, retval;
volatile int *a = addr;
@@ -215,7 +215,7 @@ extern __inline__ int __test_and_set_bit(int nr, volatile
void * addr)
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-extern __inline__ int
+static __inline__ int
test_and_clear_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -246,7 +246,7 @@ test_and_clear_bit(int nr, volatile void *addr)
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
{
int mask, retval;
volatile int*a = addr;
@@ -267,7 +267,7 @@ extern __inline__ int __test_and_clear_bit(int nr, volatile
void * addr)
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-extern __inline__ int
+static __inline__ int
test_and_change_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -297,7 +297,7 @@ test_and_change_bit(int nr, volatile void *addr)
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-extern __inline__ i
[U-Boot] [PATCH 2/2] MIPS: lib_mips/board.c: Remove unused variables
This fixes the following build warnings: board.c: In function 'board_init_r': board.c:328: warning: unused variable 'i' board.c:326: warning: unused variable 'e' Signed-off-by: Shinya Kuribayashi --- lib_mips/board.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/lib_mips/board.c b/lib_mips/board.c index 6fc4845..061901e 100644 --- a/lib_mips/board.c +++ b/lib_mips/board.c @@ -323,9 +323,8 @@ void board_init_r (gd_t *id, ulong dest_addr) #ifndef CONFIG_ENV_IS_NOWHERE extern char * env_name_spec; #endif - char *s, *e; + char *s; bd_t *bd; - int i; gd = id; gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] MIPS updates
please pull U-Boot/MIPS repository to pick up the following changes.
Thanks in advance,
Shinya
---
The following changes since commit a2e0ffcf2d9a22c582a93e84a4bef20fd3877f47:
Wolfgang Denk (1):
Prepare v2009.06-rc2
are available in the git repository at:
git://git.denx.de/u-boot-mips.git master
Shinya Kuribayashi (2):
MIPS: Make all extern-ed functions in bitops.h static
MIPS: lib_mips/board.c: Remove unused variables
Thomas Lange (1):
MIPS: Implement ethernet halt for au1x00
cpu/mips/au1x00_eth.c |4 +++
include/asm-mips/bitops.h | 64 ++--
lib_mips/board.c |3 +-
3 files changed, 37 insertions(+), 34 deletions(-)
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index 6272a3a..5074997 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -276,6 +276,10 @@ static int au1x00_init(struct eth_device* dev, bd_t * bd){
}
static void au1x00_halt(struct eth_device* dev){
+ volatile u32 *macen = (volatile u32*)MAC0_ENABLE;
+
+ /* Put MAC0 in reset */
+ *macen = 0;
}
int au1x00_enet_initialize(bd_t *bis){
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 56d7225..659ac9d 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -60,7 +60,7 @@
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-extern __inline__ void
+static __inline__ void
set_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -84,7 +84,7 @@ set_bit(int nr, volatile void *addr)
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-extern __inline__ void __set_bit(int nr, volatile void * addr)
+static __inline__ void __set_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
@@ -101,7 +101,7 @@ extern __inline__ void __set_bit(int nr, volatile void *
addr)
* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
* in order to ensure changes are visible on other processors.
*/
-extern __inline__ void
+static __inline__ void
clear_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -125,7 +125,7 @@ clear_bit(int nr, volatile void *addr)
* Note that @nr may be almost arbitrarily large; this function is not
* restricted to acting on a single-word quantity.
*/
-extern __inline__ void
+static __inline__ void
change_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -149,7 +149,7 @@ change_bit(int nr, volatile void *addr)
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
-extern __inline__ void __change_bit(int nr, volatile void * addr)
+static __inline__ void __change_bit(int nr, volatile void * addr)
{
unsigned long * m = ((unsigned long *) addr) + (nr >> 5);
@@ -164,7 +164,7 @@ extern __inline__ void __change_bit(int nr, volatile void *
addr)
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-extern __inline__ int
+static __inline__ int
test_and_set_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -194,7 +194,7 @@ test_and_set_bit(int nr, volatile void *addr)
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-extern __inline__ int __test_and_set_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
{
int mask, retval;
volatile int *a = addr;
@@ -215,7 +215,7 @@ extern __inline__ int __test_and_set_bit(int nr, volatile
void * addr)
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-extern __inline__ int
+static __inline__ int
test_and_clear_bit(int nr, volatile void *addr)
{
unsigned long *m = ((unsigned long *) addr) + (nr >> 5);
@@ -246,7 +246,7 @@ test_and_clear_bit(int nr, volatile void *addr)
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-extern __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
+static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
{
int mask, retval;
volatile int*a = addr;
@@ -267,7 +267,7 @@ extern __inline__ int __test_and_clear_bit(int nr, volatile
void * addr)
* This operation is atomic and cannot be reordered.
* It also implies a memory barrier.
*/
-extern __inline__ int
+static __inline__ int
test_and_change_bit(int
Re: [U-Boot] [GIT PULL] MIPS updates
Shinya Kuribayashi wrote:
> Thomas Lange (1):
> MIPS: Implement ethernet halt for au1x00
[...]
> diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
> index 6272a3a..5074997 100644
> --- a/cpu/mips/au1x00_eth.c
> +++ b/cpu/mips/au1x00_eth.c
> @@ -276,6 +276,10 @@ static int au1x00_init(struct eth_device* dev, bd_t *
> bd){
> }
>
> static void au1x00_halt(struct eth_device* dev){
> + volatile u32 *macen = (volatile u32*)MAC0_ENABLE;
> +
> + /* Put MAC0 in reset */
> + *macen = 0;
> }
>
> int au1x00_enet_initialize(bd_t *bis){
>From the CodingStyle point of view, (volatile u32 *) is preferred,
but I see that Thomas-san just follow existing code and tries to be
consistent.
Wolfgang-san, I hope the patch is applied as-is at this moment, and
look forward to cleanup patch in the future.
Thanks in advance,
Shinya
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Re: [U-Boot] [PATCH 1/1] mips: unify lds
Wolfgang Denk wrote:
> Dear Jean-Christophe PLAGNIOL-VILLARD,
>
> In message <1241989002-21623-1-git-send-email-plagn...@jcrosoft.com> you
> wrote:
>> all mips boards except a few use the same cpu lds so move it to cpu/$(CPU)
>>
>> that could be overwrite in following order
>> SOC
>> BOARD
>> via the corresponding config.mk
>>
>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
>> Cc: Shinya Kuribayashi
I've double checked that consolidation of u-boot.lds files is ok, and
LDSCRIPT part as wll.
>> diff --git a/Makefile b/Makefile
>> index ee09856..2cb0ce2 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -3222,6 +3222,7 @@ dbau1550_config: unconfig
>> dbau1550_el_config : unconfig
>> @mkdir -p $(obj)include
>> @echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
>> +@echo "#define CONFIG_CPU_LITTLE_ENDIAN" >>$(obj)include/config.h
>> @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
>>
>> gth2_config : unconfig
>> @@ -3232,6 +3233,7 @@ gth2_config: unconfig
>> pb1000_config : unconfig
>> @mkdir -p $(obj)include
>> @echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
>> +@echo "#define CONFIG_CPU_LITTLE_ENDIAN" >>$(obj)include/config.h
>> @$(MKCONFIG) -a pb1x00 mips mips pb1x00
>
> These changes look unrelated to the linker script stuff you mention in
> the commit message ? If they are related, you should explain what you
> are doing here, and why.
This tweaks little endian builds, and used with mips_config.mk change.
+ifdef CONFIG_CPU_LITTLE_ENDIAN
+PREDEF +=-DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
+PLATFORM_CFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo
-EL $(UNDEF_ALL) $(PREDEF))
+else
+PREDEF += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__
+PLATFORM_CFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo
-EB $(UNDEF_ALL) $(PREDEF))
+endif
Background is, we're going to have a single, unified u-boot.lds, hence
OUTPUT_FORMAT(default, big, little) command would be applied across all
supported targets as well. Then, we'd like to pass -EL specifier to the
linker so that some little-endian builds are processed properly.
The goal here is,
* Explicitly add the endianness specifier _if_needed_, this allows
to compile kernels with a toolchain for the other endianness.
* We carefully avoid to add it redundantly because gcc 3.3/3.4
complains when fed the toolchain default!
* Expected behavior
# echo mips-linux | grep -q 'mips.*el-.*' || echo -EL
-EL
# echo mips-linux | grep -q 'mips.*el-.*' && echo -EB
# echo mipsel-linux | grep -q 'mips.*el-.*' || echo -EL
# echo mipsel-linux | grep -q 'mips.*el-.*' && echo -EB
-EB
* Side-effects
Some LE toolchains with 'mips-linux', will have a redundant -LE.
Some BE toolchains with 'mipsel-linux', will have a redundant -BE.
In these cases, you would see a lot of warnings. It's harmless, so
I'd like to ignore them as they're minor enough, and consolidation
of lds files is more important here. Also note that I believe we
would never find the latter case.
So, I'd like to say the patch itself looks basically good.
But still some work needs to be done.
* How about splitting the patch into two, 1) CONFIG_CPU_LITTLE_ENDIAN
introduction patch, and 2) u-boot.lds consoliation patch ?
* Just wondered, is there any reason why you didn't use PREDEF_{BE,LE}
like Linux kernel does?
UNDEF_ALL += -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__
UNDEF_ALL += -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__
>>PREDEF_BE += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__<<
>>PREDEF_LE += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__<<
ifdef CONFIG_CPU_LITTLE_ENDIAN
PLATFORM_CFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo
-EL $(UNDEF_ALL) $(PREDEF_LE))
else
PLATFORM_CFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo
-EB $(UNDEF_ALL) $(PREDEF_BE))
endif
* By the way, s/PLATFORM_CFLAGS/PLATFORM_CPPFLAGS/.
* And we need -EL/-EB specifier on PLATFORM_LDFLAGS as well.
We call the GNU ld directly on the final link, so $(UNDEF_ALL) and
$(PREDEF_??) part probably are not required.
* We need to fix examples/{Makefile,mips.lds} as well.
* We need to remove ENDIANNESS from cpu/mips/config.mk, finally.
diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk
index a173c54..098d6c7 100644
--- a/cpu/mips/config.mk
+++ b/cpu/mips/config.mk
@@ -28,12 +28,4 @@ else \
echo "-march=4kc -mtune=4kc"; \
Re: [U-Boot] [PATCH 1/1] mips: unify lds
Shinya Kuribayashi wrote: > Background is, we're going to have a single, unified u-boot.lds, hence > OUTPUT_FORMAT(default, big, little) command would be applied across all > supported targets as well. Then, we'd like to pass -EL specifier to the > linker so that some little-endian builds are processed properly. Oops, s/linker/compiler/. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Canyonlands SATA harddisk driver
Stefan Roese wrote: > On Friday 15 May 2009 11:32:26 Kazuaki Ichinohe wrote: >> This patch adds a SATA harddisk driver for the canyonlands. >> This patch is kernel driver's porting. >> This pach corresponded to not cmd_scsi but cmd_sata. > > Looks good now. Thanks for all your effort here. > > So: > > Acked-by: Stefan Roese I'm fine with this patch applied or not, but this driver is too big. It has a lot of unused struct members, I'm not sure they'll be used in the future, though. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2 V2] mips: add endianness support
Hi, Jean-Christophe PLAGNIOL-VILLARD wrote: > curently we need to specify the endian of each board in the LDS > > in order to unify all of them add full endianness support > > by default the mips platforms will be compiled as big-endian > to compile it as little-endian define CONFIG_CPU_LITTLE_ENDIAN > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD > --- > Makefile |2 ++ > board/dbau1x00/u-boot.lds |5 + > board/gth2/u-boot.lds |5 + > board/incaip/u-boot.lds|5 + > board/pb1x00/u-boot.lds|5 + > board/purple/u-boot.lds|5 + > board/qemu-mips/u-boot.lds |5 + > board/tb0229/u-boot.lds|3 +-- > cpu/mips/config.mk |9 - > examples/Makefile |1 + > examples/mips.lds |5 + > mips_config.mk | 25 + > 12 files changed, 36 insertions(+), 39 deletions(-) [snip] > diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk > index a173c54..928b7d8 100644 > --- a/cpu/mips/config.mk > +++ b/cpu/mips/config.mk > @@ -28,12 +28,3 @@ else \ > echo "-march=4kc -mtune=4kc"; \ > fi) > > -ifneq (,$(findstring 4KCle,$(CROSS_COMPILE))) > -ENDIANNESS = -EL > -else > -ENDIANNESS = -EB > -endif > - > -MIPSFLAGS += $(ENDIANNESS) This is ok, but > - > -PLATFORM_CPPFLAGS += $(MIPSFLAGS) I think this wrongly removes -march=4kc -mtune=4kc. > diff --git a/mips_config.mk b/mips_config.mk > index 05eb05d..423e216 100644 > --- a/mips_config.mk > +++ b/mips_config.mk > @@ -46,3 +46,28 @@ PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__ > PLATFORM_CPPFLAGS+= -G 0 -mabicalls -fpic > PLATFORM_CPPFLAGS+= -msoft-float > PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib > + > +# > +# We explicitly add the endianness specifier if needed, this allows > +# to compile kernels with a toolchain for the other endianness. We > +# carefully avoid to add it redundantly because gcc 3.3/3.4 complains > +# when fed the toolchain default! > +# > +# Certain gcc versions upto gcc 4.1.1 (probably 4.2-subversion as of > +# 2006-10-10 don't properly change the predefined symbols if -EB / -EL > +# are used, so we kludge that here. A bug has been filed at > +# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29413. > +# > + > +UNDEF_ALL += -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ > +UNDEF_ALL += -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ > +PREDEF_BE += -DMIPSEB -D_MIPSEB -D__MIPSEB -D__MIPSEB__ > +PREDEF_LE += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__ > + > +ifdef CONFIG_CPU_LITTLE_ENDIAN > +PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || > echo -EL $(UNDEF_ALL) $(PREDEF_LE)) > +PLATFORM_LDFLAGS += -EL > +else > +PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && > echo -EB $(UNDEF_ALL) $(PREDEF_BE)) > +PLATFORM_LDFLAGS += -EB > +endif Thanks for resubmitting, but there's one thing I'm warried about. when I gave it a try last time, with almost the same patch you did, I had a GNU make problem. I'll look closely into it, so please wait for some time. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2 V2] mips: unify lds
Jean-Christophe PLAGNIOL-VILLARD wrote: > all mips boards except a few use the same cpu lds so move it to cpu/$(CPU) > > that could be overwrite in following order > SOC > BOARD > via the corresponding config.mk > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Looks good, except for one nit. > diff --git a/board/micronas/vct/u-boot.lds b/cpu/mips/u-boot.lds > similarity index 75% > rename from board/micronas/vct/u-boot.lds > rename to cpu/mips/u-boot.lds > index b90b186..dda0dda 100644 > --- a/board/micronas/vct/u-boot.lds > +++ b/cpu/mips/u-boot.lds > @@ -1,5 +1,8 @@ > /* > - * (C) Copyright 2003 > + * (C) Copyright 2004 > + * Masami Komiya > + * > + * (C) Copyright 2003-2005 > * Wolfgang Denk Engineering, > * > * See file CREDITS for list of people who contributed to this You probably just referred to the tb0229/u-boot.lds, but we'd like to see here Wolfgang first. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2 V2] mips: add endianness support
Jean-Christophe PLAGNIOL-VILLARD wrote: > On 00:24 Sun 24 May , Shinya Kuribayashi wrote: >> Thanks for resubmitting, but there's one thing I'm warried about. >> when I gave it a try last time, with almost the same patch you did, >> I had a GNU make problem. I'll look closely into it, so please >> wait for some time. > which one? First build attempt failed to complete the final linking because wrong endianness specifier was passed. However, one more try and you'll see it got built where correct specifier (-EL) was there. --- $ mips-linux-gnu-gcc --version mips-linux-gnu-gcc (Sourcery G++ Lite 4.3-154) 4.3.3 Copyright (C) 2008 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. $ mips-linux-gnu-gcc -dumpmachine mips-linux-gnu $ make dbau1550_el_config CROSS_COMPILE=mips-linux-gnu- Configuring for dbau1x00 board... $ make CROSS_COMPILE=mips-linux-gnu- [...] make -C examples all make[1]: Entering directory `/home/skuribay/git/u-boot.git/examples' mips-linux-gnu-gcc -g -Os -D__KERNEL__ -DTEXT_BASE=0xbfc0 -I/home/skuribay/git/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/mips-4.3-154/bin/../lib/gcc/mips-linux-gnu/4.3.3/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -msoft-float -EL -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__ -Wall -Wstrict-prototypes -fno-stack-protector -c -o hello_world.o hello_world.c mips-linux-gnu-gcc -g -Os -D__KERNEL__ -DTEXT_BASE=0xbfc0 -I/home/skuribay/git/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/mips-4.3-154/bin/../lib/gcc/mips-linux-gnu/4.3.3/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -msoft-float -EL -UMIPSEB -U_MIPSEB -U__MIPSEB -U__MIPSEB__ -UMIPSEL -U_MIPSEL -U__MIPSEL -U__MIPSEL__ -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__ -Wall -Wstrict-prototypes -fno-stack-protector -c -o stubs.o stubs.c mips-linux-gnu-ar crv libstubs.a stubs.o a - stubs.o mips-linux-gnu-ld -g -G 0 -static -n -nostdlib -EL -Ttext 0x8020 -T mips.lds \ -o hello_world -e hello_world hello_world.o libstubs.a \ -L/opt/mips-4.3-154/bin/../lib/gcc/mips-linux-gnu/4.3.3 -lgcc mips-linux-gnu-objcopy -O srec hello_world hello_world.srec 2>/dev/null mips-linux-gnu-objcopy -O binary hello_world hello_world.bin 2>/dev/null make[1]: Leaving directory `/home/skuribay/git/u-boot.git/examples' [...] make -C /home/skuribay/git/u-boot.git/cpu/mips/ u-boot.lds make[1]: Entering directory `/home/skuribay/git/u-boot.git/cpu/mips' make[1]: Nothing to be done for `u-boot.lds'. make[1]: Leaving directory `/home/skuribay/git/u-boot.git/cpu/mips' UNDEF_SYM=`mips-linux-gnu-objdump -x board/dbau1x00/libdbau1x00.a lib_generic/libgeneric.a lib_generic/lzma/liblzma.a lib_generic/lzo/liblzo.a cpu/mips/libmips.a lib_mips/libmips.a fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/libyaffs2.a fs/ubifs/libubifs.a net/libnet.a disk/libdisk.a drivers/bios_emulator/libatibiosemu.a drivers/block/libblock.a drivers/dma/libdma.a drivers/fpga/libfpga.a drivers/gpio/libgpio.a drivers/hwmon/libhwmon.a drivers/i2c/libi2c.a drivers/input/libinput.a drivers/misc/libmisc.a drivers/mmc/libmmc.a drivers/mtd/libmtd.a drivers/mtd/nand/libnand.a drivers/mtd/nand_legacy/libnand_legacy.a drivers/mtd/onenand/libonenand.a drivers/mtd/ubi/libubi.a drivers/mtd/spi/libspi_flash.a drivers/net/libnet.a drivers/net/phy/libphy.a drivers/net/sk98lin/libsk98lin.a drivers/pci/libpci.a drivers/pcmcia/libpcmcia.a drivers/spi/libspi.a drivers/rtc/librtc.a drivers/serial/libserial. a drivers/twserial/libtws.a drivers/usb/gadget/libusb_gadget.a drivers/usb/host/libusb_host.a drivers/usb/musb/libusb_musb.a drivers/video/libvideo.a drivers/watchdog/libwatchdog.a common/libcommon.a libfdt/libfdt.a api/libapi.a post/libpost.a | \ sed -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\ cd /home/skuribay/git/u-boot.git && mips-linux-gnu-ld -Bstatic -T /home/skuribay/git/u-boot.git/cpu/mips/u-boot.lds -G 0 -static -n -nostdlib -EB -Ttext 0xbfc0 $UNDEF_SYM cpu/mips/start.o \ --start-group lib_generic/libgeneric.a lib_generic/lzma/liblzma.a lib_generic/lzo/liblzo.a cpu/mips/libmips.a lib_mips/libmips.a fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/libyaffs2.a fs/ubifs/libubifs.a net/libnet.a disk/libdisk.a drivers/bios_emulator/libatibiosemu.a drivers/block/libblock.a drivers/dma/libdma.a drivers/fpga/libfpga.a drivers/gpio/libgpio.a drivers
Re: [U-Boot] [PATCH] Canyonlands SATA harddisk driver
Kazuaki Ichinohe wrote: > DMA function was scheduled to be developed as my schedule. > However, the development of the DMA function is discontinued once now. > The structure of the register that controls DMA has not been used any longer. > I will e-mail the source code ( removed the struct of DMA register ) later. Please make sure I'm not talking about register definition structures. They're harmless, and no need to be cleaned up. But, other local, private, resource management structures are encouraged to be shrinked/optimized, as it's just waste of ROM space. -- Shinya Kuribayashi NEC Electronics ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Canyonlands SATA harddisk driver
Kazuaki Ichinohe wrote: > >But, other local, private, resource management structures are encouraged > >to be shrinked/optimized, as it's just waste of ROM space. > > Originally U-boot of PowerPC is not importance for the size because the size > is large. > I will point out and object about you. As said before, I'm fine with this driver as is. I've just pointed out it has bunch of unused struct members in it. > It is important to maintain interchangeability with the Linux kernel driver. > It is important that maintenance is good. Hm, I don't see any good aspects with doing so, but that's also fine with me. -- Shinya Kuribayashi NEC Electronics ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Canyonlands SATA harddisk driver
Kazuaki Ichinohe wrote: > Do you think that you should include the Acked SATA driver in merge window of > the next release (2009/08 or -09?)? > I want to open the ACKed SATA driver to the public to the CanyonLands user. You won't need to worry about getting this driver merged into the next release. Wolfgang or Stefan will help guide you, and I'll not nitpick any more. -- Shinya Kuribayashi NEC Electronics ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] apollon: Fix a OBJCFLAGS typo
Signed-off-by: Shinya Kuribayashi --- Hi, I happened to find this typo with the help of vim highlight. onenand_ipl/board/apollon/Makefile |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile index 1f996a4..f6c36ec 100644 --- a/onenand_ipl/board/apollon/Makefile +++ b/onenand_ipl/board/apollon/Makefile @@ -6,7 +6,7 @@ LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds LDFLAGS= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_ONENAND_IPL CFLAGS += -DCONFIG_ONENAND_IPL -OBJCLFAGS += --gap-fill=0x00 +OBJCFLAGS += --gap-fill=0x00 SOBJS := low_levelinit.o SOBJS += start.o ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] config.mk: Remove $(PCI_CLOCK) reference
The following commit introduced $(PCI_CLOCK) reference so that we could tweak `PCI_66M' definition via an environment variable. > commit f046ccd15c8bc9613bfd72916b761a127d36e5c6 > Author: Eran Liberty > Date: Thu Jul 28 10:08:46 2005 -0500 > > * Patch by Eran Liberty > Add support for the Freescale MPC8349ADS board. But I suggest a removal of it for the following reasons: * In 2006, MPC8349ADS was merged into MPC8349EMDS port, and it seems that MPC8349EMDS port is PCI_66M free. * OTOH, PCI_66M is used by MPC832XEMDS an MPC8360EMDS ports, but they don't need $(PCI_CLOCK) environment variable at all. PCI_66M is automatically configured via $(BOARD)_config names with the help of $(findstring _66_,$@). * Unfortunately $(PCI_CLOCK) has been undocumented anywhere, so only a few people know the existence of it these days. * Keep config.mk independent from $(BOARD) as much as possible. Signed-off-by: Shinya Kuribayashi --- config.mk |4 1 files changed, 0 insertions(+), 4 deletions(-) diff --git a/config.mk b/config.mk index 7fc0453..f2c2c6c 100644 --- a/config.mk +++ b/config.mk @@ -194,10 +194,6 @@ BFD_ROOT_DIR = /opt/powerpc endif endif -ifeq ($(PCI_CLOCK),PCI_66M) -CFLAGS := $(CFLAGS) -DPCI_66M -endif - # export HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] config.mk: Remove unused HPATH
This variable is not unused anywhere. Signed-off-by: Shinya Kuribayashi --- config.mk |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/config.mk b/config.mk index f2c2c6c..a9973a4 100644 --- a/config.mk +++ b/config.mk @@ -196,7 +196,7 @@ endif # -export HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \ +export HOSTCC HOSTCFLAGS CROSS_COMPILE \ AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP MAKE export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] fix: missing autoconfig.mk from general Makefile
Hi Jean, or someone who understands U-Boot's build system well, Jean-Christophe PLAGNIOL-VILLARD wrote: > at the first run of make we generate the autoconf.mk and autoconf.mk.dep > if not already the case and we currently include only to .dep > > in order to use these autogenerated value we need to include it also evenif > it's include in config.mk but it's done before there generation > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD > --- > Makefile |1 + > 1 files changed, 1 insertions(+), 0 deletions(-) > > diff --git a/Makefile b/Makefile > index 81a5cd0..7f3776e 100644 > --- a/Makefile > +++ b/Makefile > @@ -475,6 +475,7 @@ $(obj)include/autoconf.mk: $(obj)include/config.h > mv $...@.tmp $@ > > sinclude $(obj)include/autoconf.mk.dep > +sinclude $(obj)include/autoconf.mk > > # > else # !config.mk I'm still thinking how to fix this issue. The problem here is, deferred expansion on PLATFORM_LDFLAGS doesn't work expectedly. In this case, | autoconf.mk | --- | CONFIG_CPU_LITTLE_ENDIAN=y | | mips_config.mk | -- | | ifneq (,$(CONFIG_CPU_LITTLE_ENDIAN)) | PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |... | PLATFORM_LDFLAGS += -EL | else | PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |... | PLATFORM_LDFLAGS += -EB | endif doesn't work, but simply doing ... | ifneq (,$(CONFIG_CPU_LITTLE_ENDIAN)) | PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |... | else | PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |... | endif | | PLATFORM_LDFLAGS += -EL does work. Then, what needs to be fixed finally? Can't we have PLATFORM_LDFLAGS conditionally configured? or is this a U-Boot's build system issue? Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] fix: missing autoconfig.mk from general Makefile
Jean-Christophe PLAGNIOL-VILLARD wrote: >> | ifneq (,$(CONFIG_CPU_LITTLE_ENDIAN)) >> | PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |... >> | else >> | PLATFORM_CPPFLAGS += $(shell $(CC) -dumpmachine |... >> | endif >> | >> | PLATFORM_LDFLAGS += -EL >> >> does work. > ??? > you compile it as big endian to link it as little ??? Ah, above was just a sample only intended for LE build. >> Then, what needs to be fixed finally? Can't we have PLATFORM_LDFLAGS >> conditionally configured? or is this a U-Boot's build system issue? > it a u-boot build system issues > we need to include the autoconf.mk after generate it to use it in the GENERAL > Makefile which is the case here for final link I know that, but $(obj)include/autoconf.mk will be included by $(TOPDIR)/config.mk. Then what a rationale for including it redundantly by $(TOPDIR/Makefile? I assume that Wolfgang is probably requesting the explanation for that. Autoconf.mk is expected to be generated *before* $(TOPDIR)/config.mk is included, right? If so, do you think your patch is a reasonable enough? Or do we need to consider another approach? Shinya - not a GNU make expert :-( ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] config.mk: Remove unused HPATH
Hi Detlev, Detlev Zundel wrote: >> This variable is not unused anywhere. > > Makes my brain twist and after carefully applying boolean equivalence > operations contradicts the title ;) Oops, thanks for pointing out. Will correct it later. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/5] those files are jz4740 base files
On 11/11/2010 12:37 PM, Xiangfu Liu wrote:
> From: Xiangfu Liu
If possible, please describe what Jz4740 SoC is, an overview of JzRISC
processor, where this patch is from or where to get the original work,
and so on.
It also would be nice we could have Signed-off-by: or Acked-by: from
Ingenic people, as some files contains Ingenic copyright statements.
Please consider.
> diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk
> new file mode 100644
> index 000..f43f53b
> --- /dev/null
> +++ b/arch/mips/cpu/xburst/config.mk
> @@ -0,0 +1,33 @@
> +#
> +# (C) Copyright 2003
> +# Wolfgang Denk, DENX Software Engineering,
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' |
> cut -d. -f2)
> +MIPSFLAGS:=$(shell \
> +if [ "$v" -lt "14" ]; then \
> + echo "-mcpu=4kc"; \
> +else \
> + echo "-march=4kc -mtune=4kc"; \
> +fi)
> +
> +MIPSFLAGS += $(ENDIANNESS) -mabicalls -mips32
ENDIANNESS looks unused. Jz47xx series are little endian SoCs, then
let's remove it.
> +PLATFORM_CPPFLAGS += $(MIPSFLAGS)
> diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
> new file mode 100644
> index 000..682debf
> --- /dev/null
> +++ b/arch/mips/cpu/xburst/cpu.c
> @@ -0,0 +1,158 @@
[snip]
> +void flush_icache_all(void)
> +{
> + u32 addr, t = 0;
> +
> + asm volatile ("mtc0 $0, $28"); /* Clear Taglo */
> + asm volatile ("mtc0 $0, $29"); /* Clear TagHi */
> +
> + for (addr = KSEG0; addr < KSEG0 + CONFIG_SYS_ICACHE_SIZE;
> + addr += CONFIG_SYS_CACHELINE_SIZE) {
> + cache_op(Index_Store_Tag_I, addr);
> + }
> +
> + /* invalidate btb */
> + asm volatile (
> + ".set mips32\n\t"
> + "mfc0 %0, $16, 7\n\t"
> + "nop\n\t"
> + "ori %0,2\n\t"
> + "mtc0 %0, $16, 7\n\t"
> + ".set mips2\n\t"
> + :
> + : "r" (t));
> +}
As pointed out before, incorrect use of assembler control. Why set
mips32 without pushing the current control info, and why set it back
to mips2? 'noreorder' is also missing here.
asm volatile (
".set push\n\t"
".set noreorder\n\t"
".set mips32\n\t"
"mfc0 %0, $16, 7\n\t"
"nop\n\t"
"ori %0, 2\n\t"
"mtc0 %0, $16, 7\n\t"
".set pop\n\t"
:
: "r" (t));
Hmm?
> +void flush_dcache_all(void)
> +{
> + u32 addr;
> +
> + for (addr = KSEG0; addr < KSEG0 + CONFIG_SYS_DCACHE_SIZE;
> + addr += CONFIG_SYS_CACHELINE_SIZE) {
> + cache_op(Index_Writeback_Inv_D, addr);
> + }
> +
> + asm volatile ("sync");
> +}
> +
> +void flush_cache_all(void)
> +{
> + flush_dcache_all();
> + flush_icache_all();
> +}
> diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
> new file mode 100644
> index 000..b8e9a15
> --- /dev/null
> +++ b/arch/mips/cpu/xburst/jz4740.c
I couldn't mention about its validity of the following DRAM init code
from the technically POV. As long as it works for you, I'm ok. Most
of the code looks well-written conforming to the coding styles. A few
trivial cleanups, please.
> @@ -0,0 +1,257 @@
> +/*
> + * Jz4740 common routines
> + *
> + * Copyright (c) 2006
> + * Ingenic Semiconductor,
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +
Re: [U-Boot] [STATUS] Using Patchwork
On 11/18/10 9:54 PM, Wolfgang Denk wrote: > the U-Boot Patchwork setup is now mostly complete (except that Shinya > Kuribayashi has not registered yet). Sorry I'm late, registered as skuribay. By the way, maybe good opportunity to drop the leading [U-Boot] tag from Subject: line? Still slightly annoying, even though Patchwork nicely concatenate consecutive multiple square brackets into single one? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC 0/2] Add support for bootstrap stage and compressed U-Boot image
Hi,
On 11/30/2010 11:35 PM, Luigi 'Comio' Mantellini wrote:
> Look the following benchmark (qemu-mips board):
>
> U-Boot Vanilla
> 179600 bytes u-boot.bin
>
> Bootstrap code w/o compresion (memcpy)
> 189224 bytes u-boot-bootstrap.bin
> --> size 105%
>
> Bootstrap code using BZIP2 compression
> 114388 bytes u-boot-bootstrap.bin
> -->size 64%
>
> Bootstrap code using GZIP compression
> 114204 bytes u-boot-bootstrap.bin
> -->size 64%
>
> Bootstrap code using LZMA compression
> 89456 bytes u-boot-bootstrap.bin
> -->size 50% <-- BEST
>
> Bootstrap code using LZO compression
> 104388 bytes u-boot-bootstrap.bin
> -->size 58%
Personally, I don't much care about the size of U-Boot bin itself
(179kB or 104kB), but it depends. And I'd like to see how much boot
time of U-Boot improved on your environment.
> >> The following patches introduce the bootstrap support that enable to have a
>> compressed U-Boot image. The bootstrap code supports the uncompressed as
>> well as compressed payloads, using LZMA, GZIP, BZIP2 and LZO.
>>
>> Actually I developed just the mips version (using qemu-mips board)...
>>
>> Please see the Patch #1 for the required defines to enable the required
>> features.
Not having a closer look at the patch yet, some general comments:
* Two patches posted, but contains multiple logical changes:
- CONFIG_BOOTSTRAP* build infrastructure (main body)
- common: Introduce console_bootstrap
- MIPS: Separate _machine_restart() and do_reset() into reset.c
- MIPS: config.mk: Append -g debug option to PLATFORM_CPPFLAGS,
which is already provided by $(TOPDIR)/config.mk.
- MIPS: qemu_mips: bootstrap support enablement (experimental)
Please break into logical changes, please.
* '_bootstrap' suffixed files are almost identical to the original
ones:
- arch/mips/cpu/reset{,_bootstrap}.c
- arch/mips/cpu/start{,_bootstrap}.S
- board/qemu-mips/u-boot{,_bootstrap}.lds
Is there any way not to duplicate them? Do we really need to have
_bootstrap files separated?
Once this bootstrap feature approved as general U-Boot feature, I'd
like to take MIPS-related changes.
Thanks,
Ralf
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Re: [U-Boot] [RFC 0/2] Add support for bootstrap stage and compressed U-Boot image
On 12/04/2010 11:32 AM, Shinya Kuribayashi wrote: > Once this bootstrap feature approved as general U-Boot feature, I'd > like to take MIPS-related changes. > > Thanks, > > Ralf Not Ralf! Needs two cups of coffee to wake up... Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 0/8] those series patches for add ben nanonote board
Thanks for keeping on working on jz4740 patchset. On 01/10/2011 01:18 AM, Xiangfu Liu wrote: > Hi Wolfgang > those patches are for add xburst jz4740 and Ben NanoNote(named qi_lb60) to > U-Boot > > some info about xburst jz4740: > the xburst jz4740 is recently added to linux 2.6.36 > and it's support the device Ben NanoNote out of box, : : Very useful comments, so such info should also be put into patch description of the relevant changes; Jz4740 SoC overview and about USB boot, respectively. > > FIXED in [PATCH v3] > 1. describe what Jz4740 SoC > 2. remove the ENDIANNESS in config.mk > 3. don't breaks the 80-charcter-wide rule > 4. get rid of #if 0 > 5. use proper I/O accessors to access registers. > 6. remove C++ comments, cleanup code style. > > FIXED in [PATCH v4] > 1. add Entry to MAINTAINERS and boards.cfg > 2. add ben nanonote(qi_lb60) to Makefile > 3. tested with CROSS_COMPILE=mips_4KCle- ./MAKEALL mips_el > > FIXED in [PATCH v5] > 1. remove nand_spl/nand_boot_jz4740.c > 2. some cleanup Having a quick glance, v5 still has issues (e.g. it gets split into 8 patches in an improper way). I'll have a closer look later. By the way, I've uploaded xl/jz4740-ben-nanonote-v5 branch (and older v2/v3/v4 branches as well) to make reviews easier for involved people. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] fix little endian build
On 8/31/2010 10:36 AM, Shinya Kuribayashi wrote: >> As said in the previous mail the patch is tentative and won't >> work with ELDK, and as fas as I could see nothing has been >> changed since my version. > > So I'm overlooking something, will have to think about it. Oh, I remember now. The aim of the patch is to make it possible to generate elf images in both Big- and Little-endian, using only either mips_4KC- or mips_4KCle- toolchain: # CROSS_COMPILE Target Expected endianness -- 1 mips_4KC- dbau1550_config Big-Endian 2 mips_4KCle- dbau1550_config Big-Endian 3 mips_4KC- dbau1550_el_config Little-Endian 4 mips_4KCle- dbau1550_el_config Little-Endian And option 2) and 3) may not work when using ELDK. -- Shinya Kuribayashi Renesas Electronics ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] MIPS patch
The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854: Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master (2010-08-18 21:16:35 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-mips.git master Xiangfu Liu (1): MIPS: update the MIPS u-boot.lds board/dbau1x00/u-boot.lds|2 +- board/gth2/u-boot.lds|2 +- board/incaip/u-boot.lds |2 +- board/pb1x00/u-boot.lds |2 +- board/purple/u-boot.lds |2 +- board/qemu-mips/u-boot.lds |2 +- examples/standalone/mips.lds |2 +- 7 files changed, 7 insertions(+), 7 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MIPS relocation?
On 10/5/2010 2:02 AM, Wolfgang Denk wrote: > Dear Xiangfu Liu, > > In message <4ca9ec8e.9080...@openmobilefree.net> you wrote: >> >> by applied this patch. both works fine. Xiangfu, thank for your testing! I don't have the latest U-Boot ready for test/debug right now, nor couldn't follow the ongoing discussions precisely. > Any MIPS tool chain experts out there to try and follow-up for MIPS > what Albert is doing for ARM right now? I'll have a look at what's discussed, then think about what to do. -- Shinya Kuribayashi Renesas Electronics ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] MIPS: Purple: Fix multiple definition error on final linking of u-boot binary
On 02/03/2011 08:59 PM, daniel.schwierz...@googlemail.com wrote:
> The linker of recent toolchains complains about multiple definitions
> on final linking of u-boot binary. This patch removes all redundant
> object files from u-boot.lds those are already added to .text section
> by the linker.
Confirmed.
> That patch could not be tested but the resulting u-boot.map still looks
> good. The start symbol is at 0xB000, the environment at 0xB0008000
> so u-boot should boot.
Agreed.
> --- a/board/purple/u-boot.lds
> +++ b/board/purple/u-boot.lds
> @@ -36,11 +36,6 @@ SECTIONS
> {
> arch/mips/cpu/start.o (.text)
> board/purple/lowlevel_init.o (.text)
> - arch/mips/cpu/cache.o (.text)
> - common/main.o (.text)
> - common/dlmalloc.o (.text)
> - common/cmd_boot.o (.text)
> - lib/zlib.o(.text)
> . = DEFINED(env_offset) ? env_offset : .;
> common/env_embedded.o (.ppcenv)
This is ok, though we have some room for further cealnups. With having
.text statement in the lowlevel_init.S, we could remove all these lines.
Applied anyway, thanks for the patch.
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Re: [U-Boot] [PATCH v2 0/3] MIPS: Fix failed run of MAKEALL mips script
On 02/03/2011 10:17 PM, daniel.schwierz...@googlemail.com wrote: > Currently MAKEALL mips covers 21 boards and 15 of them have compile > errors with gcc-4.3.3. This patch series fixes these boards. > > Changes for v2: > - make brace style consistent in vct.h > - delete unused board/dbau1x00/flash.c All three patches applied, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Move MIPS boards to boards.cfg
Along with applying Daniel's patches, I prepared these misc patches, trying to move all MIPS boards left in the top Makefile to boards.cfg. Compile tested using GCC4.4-based toolchain. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5] cmd_ide: Fix an unused CONFIG_AU1X00 symbol to work as intended
commit 8bde63eb3f79d68f693201528dafc8ae7aa087de ([MIPS] Rename Alchemy processor configs into CONFIG_SOC_*) forgot to pick up this one. Signed-off-by: Shinya Kuribayashi --- common/cmd_ide.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/common/cmd_ide.c b/common/cmd_ide.c index df7bdf5..a1f7e57 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -811,7 +811,8 @@ set_pcmcia_timing (int pmode) /* We only need to swap data if we are running on a big endian cpu. */ /* But Au1x00 cpu:s already swaps data in big endian mode! */ -#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) ) +#if defined(__LITTLE_ENDIAN) || \ + (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2)) #define input_swap_data(x,y,z) input_data(x,y,z) #else static void -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/5] MIPS: Move Alchemy Au1x00 based boards to boards.cfg
CONFIG_GTH2 is already provided by , so we don't generate it using the options fields in boards.cfg. Signed-off-by: Shinya Kuribayashi --- Makefile | 39 --- boards.cfg |7 +++ 2 files changed, 7 insertions(+), 39 deletions(-) diff --git a/Makefile b/Makefile index 05b404d..e1f3b7f 100644 --- a/Makefile +++ b/Makefile @@ -1136,45 +1136,6 @@ vct_platinumavc_onenand_small_config: unconfig echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h @$(MKCONFIG) -n $@ -a vct mips mips vct micronas -# -## MIPS32 AU1X00 -# - -dbau1000_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1100_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1100 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1500_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1500 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1550_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1550_el_config : unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -gth2_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_GTH2 1" >$(obj)include/config.h - @$(MKCONFIG) -a $@ mips mips gth2 - -pb1000_config : unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_PB1000 1" >$(obj)include/config.h - @$(MKCONFIG) -a pb1x00 mips mips pb1x00 - qemu_mips_config : unconfig @mkdir -p $(obj)include @echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h diff --git a/boards.cfg b/boards.cfg index c977528..f1f2506 100644 --- a/boards.cfg +++ b/boards.cfg @@ -213,6 +213,13 @@ M5282EVB m68kmcf52x2 m5282evbfreesca M53017EVBm68kmcf52x2 m53017evb freescale EP2500 m68kmcf52x2 ep2500 Mercury microblaze-generic microblaze microblaze microblaze-generic xilinx +dbau1000 mipsmipsdbau1x00- - dbau1x00:DBAU1000 +dbau1100 mipsmipsdbau1x00- - dbau1x00:DBAU1100 +dbau1500 mipsmipsdbau1x00- - dbau1x00:DBAU1500 +dbau1550 mipsmipsdbau1x00- - dbau1x00:DBAU1550 +dbau1550_el mipsmipsdbau1x00- - dbau1x00:DBAU1550 +gth2 mipsmips +pb1000 mipsmipspb1x00 - - pb1x00:PB1000 purple mipsmips tb0229 mipsmips PCI5441 nios2 nios2 pci5441 psyent -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/5] MIPS: Move Qemu MIPS target to boards.cfg
CONFIG_QEMU_MIPS is already provided by , so we don't generate it using the options fields in boards.cfg. Signed-off-by: Shinya Kuribayashi --- Makefile |5 - boards.cfg |1 + 2 files changed, 1 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index e1f3b7f..9e6cf25 100644 --- a/Makefile +++ b/Makefile @@ -1136,11 +1136,6 @@ vct_platinumavc_onenand_small_config: unconfig echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h @$(MKCONFIG) -n $@ -a vct mips mips vct micronas -qemu_mips_config : unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h - @$(MKCONFIG) -a qemu-mips mips mips qemu-mips - # # Nios # diff --git a/boards.cfg b/boards.cfg index f1f2506..cb67d2a 100644 --- a/boards.cfg +++ b/boards.cfg @@ -221,6 +221,7 @@ dbau1550_el mipsmips dbau1x00- gth2 mipsmips pb1000 mipsmipspb1x00 - - pb1x00:PB1000 purple mipsmips +qemu_mipsmipsmipsqemu-mips - - qemu-mips tb0229 mipsmips PCI5441 nios2 nios2 pci5441 psyent PK1C20 nios2 nios2 pk1c20 psyent -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/5] MIPS: Move Inca-IP targets to boards.cfg
At the same time, fix up CPU_CLOCK_RATE to have the CONFIG_ prefix to work with boards.cfg. Signed-off-by: Shinya Kuribayashi --- Makefile | 13 - board/incaip/lowlevel_init.S |2 +- boards.cfg |4 include/configs/incaip.h |9 ++--- 4 files changed, 11 insertions(+), 17 deletions(-) diff --git a/Makefile b/Makefile index 9e6cf25..3fe0596 100644 --- a/Makefile +++ b/Makefile @@ -1098,19 +1098,6 @@ smdk6400_config : unconfig ## MIPS32 4Kc # -incaip_100MHz_config \ -incaip_133MHz_config \ -incaip_150MHz_config \ -incaip_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _100MHz,$@)" ] || \ - echo "#define CPU_CLOCK_RATE 1" >>$(obj)include/config.h - @[ -z "$(findstring _133MHz,$@)" ] || \ - echo "#define CPU_CLOCK_RATE 13300" >>$(obj)include/config.h - @[ -z "$(findstring _150MHz,$@)" ] || \ - echo "#define CPU_CLOCK_RATE 15000" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a incaip mips mips incaip - vct_premium_config \ vct_premium_small_config \ vct_premium_onenand_config \ diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S index fe525ec..b765795 100644 --- a/board/incaip/lowlevel_init.S +++ b/board/incaip/lowlevel_init.S @@ -283,7 +283,7 @@ lowlevel_init: /* EBU, CGU and SDRAM Initialization. */ - li a0, CPU_CLOCK_RATE + li a0, CONFIG_CPU_CLOCK_RATE movet0, ra /* We rely on the fact that neither ebu_init() nor cgu_init() nor sdram_init() diff --git a/boards.cfg b/boards.cfg index cb67d2a..d3edc9f 100644 --- a/boards.cfg +++ b/boards.cfg @@ -219,6 +219,10 @@ dbau1500 mipsmips dbau1x00- dbau1550 mipsmipsdbau1x00- - dbau1x00:DBAU1550 dbau1550_el mipsmipsdbau1x00- - dbau1x00:DBAU1550 gth2 mipsmips +incaip mipsmips +incaip_100MHzmipsmipsincaip - - incaip:CPU_CLOCK_RATE=1 +incaip_133MHzmipsmipsincaip - - incaip:CPU_CLOCK_RATE=13300 +incaip_150MHzmipsmipsincaip - - incaip:CPU_CLOCK_RATE=15000 pb1000 mipsmipspb1x00 - - pb1x00:PB1000 purple mipsmips qemu_mipsmipsmipsqemu-mips - - qemu-mips diff --git a/include/configs/incaip.h b/include/configs/incaip.h index b7ba6f4..f2950e8 100644 --- a/include/configs/incaip.h +++ b/include/configs/incaip.h @@ -31,9 +31,12 @@ #define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core*/ #define CONFIG_INCA_IP 1 /* on a INCA-IP Board */ -#ifndefCPU_CLOCK_RATE -/* allowed values: 1, 13300, and 15000 */ -#define CPU_CLOCK_RATE 15000 /* default: 150 MHz clock for the MIPS core */ +/* + * Clock for the MIPS core (MHz) + * allowed values: 1, 13300, and 15000 (default) + */ +#ifndef CONFIG_CPU_CLOCK_RATE +#define CONFIG_CPU_CLOCK_RATE 15000 #endif #define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */ -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/5] MIPS: Move VCT boards to boards.cfg
Signed-off-by: Shinya Kuribayashi --- Makefile | 32 boards.cfg | 12 2 files changed, 12 insertions(+), 32 deletions(-) diff --git a/Makefile b/Makefile index 3fe0596..6133160 100644 --- a/Makefile +++ b/Makefile @@ -1092,38 +1092,6 @@ smdk6400_config : unconfig @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk # -# MIPS -# -# -## MIPS32 4Kc -# - -vct_premium_config \ -vct_premium_small_config \ -vct_premium_onenand_config \ -vct_premium_onenand_small_config \ -vct_platinum_config\ -vct_platinum_small_config \ -vct_platinum_onenand_config\ -vct_platinum_onenand_small_config \ -vct_platinumavc_config \ -vct_platinumavc_small_config \ -vct_platinumavc_onenand_config \ -vct_platinumavc_onenand_small_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _premium,$@)" ] || \ - echo "#define CONFIG_VCT_PREMIUM" > $(obj)include/config.h - @[ -z "$(findstring _platinum_,$@)" ] || \ - echo "#define CONFIG_VCT_PLATINUM" > $(obj)include/config.h - @[ -z "$(findstring _platinumavc,$@)" ] || \ - echo "#define CONFIG_VCT_PLATINUMAVC" > $(obj)include/config.h - @[ -z "$(findstring _onenand,$@)" ] || \ - echo "#define CONFIG_VCT_ONENAND" >> $(obj)include/config.h - @[ -z "$(findstring _small,$@)" ] || \ - echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h - @$(MKCONFIG) -n $@ -a vct mips mips vct micronas - -# # Nios # diff --git a/boards.cfg b/boards.cfg index d3edc9f..b8369e1 100644 --- a/boards.cfg +++ b/boards.cfg @@ -227,6 +227,18 @@ pb1000 mipsmips pb1x00 - purple mipsmips qemu_mipsmipsmipsqemu-mips - - qemu-mips tb0229 mipsmips +vct_premium mipsmipsvct micronas - vct:VCT_PREMIUM +vct_premium_smallmipsmipsvct micronas - vct:VCT_PREMIUM,VCT_SMALL_IMAGE +vct_premium_onenand mipsmipsvct micronas - vct:VCT_PREMIUM,VCT_ONENAND +vct_premium_onenand_smallmipsmipsvct micronas - vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE +vct_platinum mipsmipsvct micronas - vct:VCT_PLATINUM +vct_platinum_small mipsmipsvct micronas - vct:VCT_PLATINUM,VCT_SMALL_IMAGE +vct_platinum_onenand mipsmipsvct micronas - vct:VCT_PLATINUM,VCT_ONENAND +vct_platinum_onenand_small mipsmipsvct micronas - vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE +vct_platinumavc mipsmipsvct micronas - vct:VCT_PLATINUMAVC +vct_platinumavc_smallmipsmipsvct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE +vct_platinumavc_onenand mipsmipsvct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND +vct_platinumavc_onenand_small mips mipsvct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE PCI5441 nios2 nios2 pci5441 psyent PK1C20 nios2 nios2 pk1c20 psyent EVB64260 powerpc 74xx_7xxevb64260- - EVB64260 -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] MIPS patches
Hi, Please pull the following MIPS patches, thanks. Daniel Schwierzeck (3): MIPS: VCT: Fix enabling of unwanted options if networking or USB support are disabled MIPS: Purple: Fix multiple definition error on final linking of u-boot binary MIPS: dbau1x00: Remove unused flash driver stub Shinya Kuribayashi (5): cmd_ide: Fix an unused CONFIG_AU1X00 symbol to work as intended MIPS: Move Alchemy Au1x00 based boards to boards.cfg MIPS: Move Qemu MIPS target to boards.cfg MIPS: Move Inca-IP targets to boards.cfg MIPS: Move VCT boards to boards.cfg Makefile | 89 -- board/dbau1x00/Makefile |2 +- board/dbau1x00/flash.c | 43 board/incaip/lowlevel_init.S |2 +- board/purple/u-boot.lds |5 -- boards.cfg | 24 +++ common/cmd_ide.c |3 +- include/configs/incaip.h |9 +++- include/configs/vct.h|7 ++- 9 files changed, 39 insertions(+), 145 deletions(-) delete mode 100644 board/dbau1x00/flash.c diff --git a/Makefile b/Makefile index 05b404d..6133160 100644 --- a/Makefile +++ b/Makefile @@ -1092,95 +1092,6 @@ smdk6400_config : unconfig @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk # -# MIPS -# -# -## MIPS32 4Kc -# - -incaip_100MHz_config \ -incaip_133MHz_config \ -incaip_150MHz_config \ -incaip_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _100MHz,$@)" ] || \ - echo "#define CPU_CLOCK_RATE 1" >>$(obj)include/config.h - @[ -z "$(findstring _133MHz,$@)" ] || \ - echo "#define CPU_CLOCK_RATE 13300" >>$(obj)include/config.h - @[ -z "$(findstring _150MHz,$@)" ] || \ - echo "#define CPU_CLOCK_RATE 15000" >>$(obj)include/config.h - @$(MKCONFIG) -n $@ -a incaip mips mips incaip - -vct_premium_config \ -vct_premium_small_config \ -vct_premium_onenand_config \ -vct_premium_onenand_small_config \ -vct_platinum_config\ -vct_platinum_small_config \ -vct_platinum_onenand_config\ -vct_platinum_onenand_small_config \ -vct_platinumavc_config \ -vct_platinumavc_small_config \ -vct_platinumavc_onenand_config \ -vct_platinumavc_onenand_small_config: unconfig - @mkdir -p $(obj)include - @[ -z "$(findstring _premium,$@)" ] || \ - echo "#define CONFIG_VCT_PREMIUM" > $(obj)include/config.h - @[ -z "$(findstring _platinum_,$@)" ] || \ - echo "#define CONFIG_VCT_PLATINUM" > $(obj)include/config.h - @[ -z "$(findstring _platinumavc,$@)" ] || \ - echo "#define CONFIG_VCT_PLATINUMAVC" > $(obj)include/config.h - @[ -z "$(findstring _onenand,$@)" ] || \ - echo "#define CONFIG_VCT_ONENAND" >> $(obj)include/config.h - @[ -z "$(findstring _small,$@)" ] || \ - echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h - @$(MKCONFIG) -n $@ -a vct mips mips vct micronas - -# -## MIPS32 AU1X00 -# - -dbau1000_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1100_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1100 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1500_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1500 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1550_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -dbau1550_el_config : unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h - @$(MKCONFIG) -a dbau1x00 mips mips dbau1x00 - -gth2_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_GTH2 1" >$(obj)include/confi
