Re: [kicad-users] pin position occupied - false positives ?

2009-05-20 Thread jean-pierre charras - INPG
Werner Almesberger a écrit :


 When working with a component that contains multiple independent units,
 KiCad warns about pin locations being occupied even if the conflicting
 pin is in a different unit.

 This may to be unnecessary. I've attached a patch that suppresses the
 warning if the pins are in different units.

This warning is necessary.
Because for pins at same location, some changes  can be made for all pins.
See Eeschema doc, chapter 11.6.3

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] Drill file missing vias

2009-05-18 Thread jean-pierre charras - INPG
wdoe999 a écrit :


 I don't know if I'm doing something wrong, but...

 I created 3 boards that have one or more vias on each. If I create a 
 drill file for each board, the drill file does contain all of the via 
 drill holes for that board. I then put the 3 boards onto one panel and 
 then created a drill file. In the Drill-Files- Generation dialogue 
 box, under the Holes-Count section, it clearly says that there are 7 
 Through-Vias. However, the resulting drill file only has one via in 
 it. Curiously, it is the one via on the leftmost board. It seems to be 
 missing the vias from the other boards. There's no problem with any of 
 the other drill holes. The plotting for the panel is OK as well.


Please, can you send me yours PCB files ?
(to jean-pierre.char...@gipsa-lab.inpg.fr)

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] ErrType(16) - Two track ends

2009-04-20 Thread jean-pierre charras - INPG
Boris Barbour a écrit :



 Hi,


 Is it possible to join a track to a net without starting drawing on 
 the net in question? In other words, if I start tracing in the middle 
 of nowhere, the track is assigned to Net:0/noname. It is then 
 impossible to join it to another net with DRC on (I get the 
 ErrType(16) of the subject); with DRC off I can make the join, but the 
 track retains its null net and will evermore generate DRC errors.


 Is there a way to induce Kicad to change the net name once the join is 
 made, either automatically or manually?


 In case you are wondering why I should want to do this, the issue 
 arises most often when drawing guarding and shielding traces. I've 
 managed to work around the problem so far, but not without difficulty.


 Best wishes


 Boris

Just open netlist dialog and run Rebuild Board Connectivity
-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] Zone fill issue. Another one...

2009-04-05 Thread jean-pierre charras - INPG
Alain M. a écrit :

 Hi Jean Pierre,

 I also found a problem in the new version with Zone fill:

 I needed a pad to be round on one side and right-angled on the other
 side. To do that, I ploted an ARC on the solder-side. This makes an
 extra copper area exactly as I need. The only problem is that Zone-Fill
 is ignoring that extra copper area and is making a short :( (I could
 workaround using the zone clearence)

 Do you need a sample file? If I send only the .brd file, is it ok?

Yes, send me your board file.

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] Re: Zone fill freezes PCBnew!

2009-03-01 Thread jean-pierre charras - INPG
oecherexpat a écrit :

 Hi Jean-Pierre,

 Please find the file WMD-20090227. brd in the files area inside the
 Zone filling issue folder.
 As mentioned, I tried the latest stable version as well as 20090118
 (which actually shows 20090107 in the header), both under XP SP3. Can
 also try on Ubuntu 8.04 in a few days if it would help.

 Thanks, Heiko


I am working on this.
But you have a zone clearance = 20 inches for all zones.
This is that freezes Pcbnew
With a decent clearance value (i tested 0.02 ), Pcbnew works fine.

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] Re: information about demos video board

2009-03-01 Thread jean-pierre charras - INPG
cf...@rocketmail.com a écrit :

 Nobody ?

 --- In kicad-users@ yahoogroups. com 
 mailto:kicad-users%40yahoogroups.com, cf...@... cf...@... wrote:
 
  Hi all,
 
  who has made the video board demos in kicad ?
  just to know, how does he made the routing ? manually,
  autorouter(kicad) or autorouter extern ?is there an method ?
 

Me.
By hand.
there are 2300 pads on this board
Boards i use to test kicad have 4500 pads (and more). They are routed by 
hand.

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] Support for blind and buried vias?

2009-02-09 Thread jean-pierre charras - INPG
Boris Barbour a écrit :


 Hi,

 I am considering a design that would use blind and buried vias. 
 However, KiCad
 rather scarily says it is experimental, and the changelog seems to 
 suggest it
 cannot yet be used for production. Is it known not to work or 
 should work
 but untested?

Should work, but fully untested.
In fact i tested gerber and drill files but i never send such a board to 
a board manufacturer.

 Would the potential problems be obvious (detected by DRC, for 
 instance) or
 might problems be silent?


Problems can be a lack of command to edit a via.
(edit layers pairs of an existing via, automatic change of layer pairs 
when creating a new track starting or ending on a via (or deleting 
atrack) , merging 2 vias at the same coordinate ...)
But of an other hand we need a volunteer to test it.

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] Fields Properties in Libedit

2009-01-14 Thread jean-pierre charras - INPG
Carlo Garberi a écrit :

 Please note:
 in Kicad-2009-12- 29:

 EESCHEMA
 Libedit
 Edit Components Properties

 there is no more the field FIELD

 and you can not edit/modify the properties of a components into Libedit.

You have a new tool to edit/add/remove fields in Libedit

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
Grenoble France


Re: [kicad-users] Re: Can anyone explain why EEschema uses A and B for pin numbers?

2008-09-18 Thread jean-pierre charras - INPG
calvingrier a écrit :

 --- In kicad-users@ yahoogroups. com 
 mailto:kicad-users%40yahoogroups.com, Pedro Martin [EMAIL PROTECTED] 
 wrote:
 
  Hi,
 
  I think you are not doing anything wrong.
 
  But there are only 2 choices:
  1. Edit eeschema R an C and change pin numbers to 1 an 2.
  2. Edit the modules and change pin numbers to A and B.
 
  Maybe there is another choice: copy and paste your old R and C from
 an older
  project to a new library and use them.

 So I tried copy/save from a project with a netlist that works
 (generates netlist connections for pins 1 and 2) and pasting the
 block into a project that's broken.

 EEschema removed the old annotations, and I had it update for the new
 schematic. Then I generated the netlist. Once again the netlist had
 pins numbered A and B. PCBnew just can't understand that numbering
 for the default modules in KiCAD.

When copying (duplicates)  a block eeschema reset references because 2 
components cannot have the same reference (or the same time stamp).

 I looked at the library and the pin numbers on all the standard 2 pin
 passive elements were ~. I could go through and force them to 1 and
 2, but that's a lot of work, and I'd have to do it to each element I
 want to use...

I believe you are confusing pin names and pin numbers.
For passive components like R and C, pin names are void (~ in lib)
but the pin numbers are 1 and 2
pin numbers are the link between schematic and boards.
(pin number can be in fact a word using up to 4 ascii code : 1 , 2 or 
inp or anod o AA11)

Please ckeck you library ans see the pin *number* (pin name is not used 
by netlists)

they must be 1 and 2 (and not A or B, unless you are also using A or B 
as pad names in footprints).

Generally speaking pin *numbers and pad names must be the same word (or 
number)


 I could also modify all the modules I need, so they all use A and B
 for pin numbers... but again, I'd have a custom set of footprints and
 I'd need to do it every time.

 HELP! Jean-Pierre!


Here is some things to verify:

1 - Verify in your schematic (not in libedit) the pin number (click on a 
pin)
A common mistake is a duplicate component in 2 different libs. Eeschema 
takes the first (this is a feature: lib order is significant)
Be absolutely sure eeschema (not libedit) see 1 and 2 (and not A  and B) 
as pin *numbers*

2 *DO NOT* use spaces in labels, values, references, component names ...
This is not a problem in eeschema, but a *lot* of netlist formats do not 
accept spaces in names.
I do not know the kicad version you are using.
The last version replaces spaces in labels in pcbnew netlist, but it is 
better to avoid spaces in names.
See (with a text editor) the .net file to verify what is exactly created.


-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Re: Zone delimiter problem on PCBNEW.

2008-09-16 Thread jean-pierre charras - INPG
gembler01 a écrit :

 This problem is reappearing in both the next-to-latest (2008-07-15
 Final Win XP) and the latest version (2008-08-25 Final Win XP). In
 2008-07-15 I successfully defined and filled a zone. I then deleted
 the zone filling and refilled the zone, without changing the zone
 boundary. The fill escaped the boundary and filled-in to the board
 edge. I tried updating to 2008-08-25 and it has the same behavior. I
 also tried redefining the zone boundary but this also did not work.


I uploaded the 2008-07-15a-final version of kicad what solves (i hope) 
this problem
see iut-tice.ujf-grenoble.fr/cao/

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


[kicad-users] Kicad new stable version (release candidate)

2008-07-15 Thread jean-pierre charras - INPG
I uploaded the last stable (autoinstall for windows and a full .tgz 
archive for linux) release to
iut-tice.ujf-grenoble.fr/cao/

Please, note the kicad tree was modified, and it is better to remove old 
installs.

Also note the official kicad site is (update yours links)
http://iut-tice.ujf-grenoble.fr/kicad/   (full install and stable 
versions only)
and also (for snapshots, infos, news ...)
http://kicad.sourceforge.net/

Sources can be found here:
http://kicad.svn.sourceforge.net/


-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Re: help in using my downloaded libraries

2008-03-07 Thread jean-pierre charras - INPG
deaninkc a écrit :

 No offense taken. Believe me I develop accounting software for a
 living and have dealt with enough people not reading the documentation
 to know better. I've read and googled for hours and I seem to be
 overlooking this one. I don't even see a mention of a .mdc file
 anywhere. I'll give it another shot but I figured someone could answer
 in a couple minutes of their time rather than me spenting and other
 couple of hours looking. This is supposed to be a Community.

.mdc files are created when a .mod library is edited and saved.
.mdc files contains only the doc anc keywords for footprints (which is 
also in .mod files).
They are used for a fast access to these infos (in pcbnew and cvpcb).
because .mod files can be very larges, pcbnew and cvpcb uses small .mdc 
files to get and show doc and keywords for a given footprint when 
displaying the list of footprints.
This allows a fast access for the footprint doc and keywords (this is 
very noticeable when using network installation)
If they are missing, doc and keywords are not accessible.
A missing .mdc file is easily rebuild:
run pcbnew:
in modedit select the given library
load any footprint from this lib
save it.
the .mod and .mdc will be updated (.mdc created if not exists)

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


[kicad-users] Kicad release candidate (kicad-2007-11-19-RC) uploaded

2007-12-04 Thread jean-pierre charras - INPG
Due to a problem in eeschema annotation, I released a new candidate version 
(kicad-2007-11-29-RC2). See:
iut-tice.ujf-grenoble.fr/cao/

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex



Re: [kicad-users] module numbering

2007-11-27 Thread jean-pierre charras - INPG
dave a écrit :
 jean-pierre charras wrote:

   
 dave a écrit :

 
 Dan Andersson wrote:
  

   
 On Sunday 25 November 2007 07:15:05 dave wrote:



 
 what am i doing wrong?

 i drew up a schematic and made a netlist and started to layout the board. 
 i
 found an error and when i went back to correct it and then make a new
 netlist the program changed several part numbers..  so then it gave me an
 error when it read the new netlist in the pcb layout program.

 it is driving me nuts!!!

 am i doing something wrong or is there a problem with the program?


 thanks for the help

 dave.
  
   
 The pcb layout does not replace or change modules as default, you need to 
 tick 
 the correct box for that in the net list read window.

 //Dan

 
 yes. this i understand.  the problem is that in the eeschema program when i 
 make changes and 
 a make new netlist several part numbers ie: U12, U13, U14 are changed to 
 U055, U056, U057 in the 
 eeschema drawing and in the net list and then in the pcb drawing and that 
 causes the traces that 
 were on the old parts to have no connections?

 something is wrong somewhere, but is it something i am doing or is there a 
 bug in the program?
  
   
 When eeschema renums components like U055, U056, U057 ... this is 
 because these components are flagged as power symbols
 Only power symbols (like VCC, GND ...) must be flagged  power 
 component because they are not really components, they are special 
 symbols

 

 where are the power symbols on the component.  it is something that i put 
 there.
 i don't think so.  i did not have a reason as they are just more of the 
 component on the sheet.

 if they are marked how do i get rid of the mark?

   
In Libedit, edit component properties dialog, uncheck power symbol 
option


-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


[kicad-users] Kicad release candidate (kicad-2007-11-19-RC) uploaded

2007-11-20 Thread jean-pierre charras - INPG
A Kicad release candidate (kicad-2007-11-19-RC) was uploaded. See:
iut-tice.ujf-grenoble.fr/cao/

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] WinEDA_DrillFrame::GenDrillMap() : Unexpected Draw Type

2007-10-30 Thread jean-pierre charras - INPG
barkerben a écrit :
 Hi - 

 First off apologies for posting to users and developers - that was a 
 mistake!

 I am getting the error listed in the subject line when I try to
 create a drill file for my board, however having said that the drill
 files do appear to be created succesfully. Does anyone know what this
 error means?

   
This is an internal problem, and i suppose this is only for the drill map.
Do not worry about this.



-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Re: WinEDA_DrillFrame::GenDrillMap() : Unexpected Draw Type

2007-10-30 Thread jean-pierre charras - INPG

 Cool - thanks. So the drill file that is produced is OK, and is not 
 affected by this error?


   
The drill file is Ok.

This problem is due to drc markers on your board which are not drawn in 
drill map.
You can remove these markers if you want.


-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Re: Some questions on how to best use kicad

2007-10-04 Thread jean-pierre charras - INPG
The answer to the problem ( how to link footprints and component) is :
Use the .equ files with cvpcb and use the automatic association feature 
of cvpcb.
A .equ file is the file which handle the component (exactly the value of 
a component and its footprint.
(see in Cvpcb doc, the very short chapter 6)
Have a look to a file like kicad/modules/smd_resistor_0805.equ or 
kicad/modules/smd_resistor_0603.equ and others .equ files.
Such a files are easy to create and like the the smd_resistor_0805.equ 
and smd_resistor_0603.equ
can be build from one initial file by changing (search and replace...) 
footprint names for alist of components.

I believe this way is more powerfull than fill the footprint field in 
eeschema.

In Cvpcb configuration You must choose (in .equ list file) the .equ 
file(s) you created, according to
your technologie (various smd classes for resistors, resistors ... ).

And after, run the automatic association tool.

So it is not necessary to have many libraries for the schematic: only 
one is enought,
whatever the smd footprints you plan to use.
Just create different equ files and select the right file(s) in Cvpcb, 
and use the automatic association tool..

The first  .equ  file is a bit boring to create, but usualy the other 
files are faster to build.
(the smd_resistor_0603.equ file was built from smd_resistor_0805.equ, 
using the editor text command search sm0806 and replace by sm0603)

And i believe the footprint selection is not a schematic problem
(when you are designing your schematic, you want a resistor, or a 
capacitor, or a transistor, not a part number 09 4567 A34-rev 4, not a 
sm0806 package or a sm0603 - rotated 90° package...)
I believe the footprint selection is board design  problem.



-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] composite layers and negative plots

2007-09-21 Thread jean-pierre charras - INPG
barkerben a écrit :

One more question (I have answered the above myself via 
experimentation). I got the following from Olimex, who I use to etch 
boards:

Hi,
Your gerbers contain composite layers and negative plots (G36 G37 
commands).
On such gerbers we can't do DRC check, panelization nor to ensure 
correct
phototools plotting.
Please ask your cad vendor how to generate your copper pour with 
stroke
hatch filling instead composites and send your files again.
Thanks

  

G36 and G37 commands are *NOT* composite layers and negative plots.

this a polygon fill command (start and end fill polygon), used to draw 
rectangular pads  when the pad orientation is not 0, 90, 180 or 270 
degrees (for instance 22.4 degrees) or trapezoidal pads.

This command is a very common GERBER command...

To understand the gerber rs274x format, see:
http://www.artwork.com/gerber/274x/rs274x.htm

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Re: pcbnew 2007-07-09 crash

2007-09-10 Thread jean-pierre charras - INPG
I have teste the board with pcbnew version 2007-07-09 (last stable 
version) and some other versions.

I do not have any crash ans i cannot fix anything.

Please can you download the pcbnew.exe from:
ftp://iut-tice.ujf-grenoble.fr/cao/kicad/winexe
and test it. Perhaps there is a problem in your binary file




-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Is there a way to view just one layer at a time on the screen ?

2007-06-05 Thread jean-pierre charras - INPG
Dan a écrit :


 I was wondering if there is a way to view just one layer at a time on
 the screen ?
 I couldn't see where in the menu this might be. I recall seeing this
 feature in other tools. I was able to turn off layers to view any one
 separately.

This is the Hight contrast mode (left toolbar, Hight contrast mode 
display) which shows the active layer in normal color, and others 
layers in dark gray color.

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Re: PADS-PCB netlist generation?

2007-05-30 Thread jean-pierre charras - INPG
Vignesh a écrit :

 Hi all,

 I'm also running into exactly the same problem. I am using unicode
 version of eeschema (2007-05-25) . I even tried running the executable
 from command line, it generates the following:

 *PADS-PCB*
 *PART*
 *END*

 Nothing else. I've done DRC checks and no errors, and also checked the
 foot print names for any illegal characters. I can export a valid
 pcbnew netlist, same problem as what Mathew Jr. has experienced.

 Please let me know if I am doing something wrong.

netlist_form_pads-pcb must be launched by eeschema because:
1 - eeschema creates an intermediate netlist file (for myschema.sch , 
eeschema creates myschema.tmp) This file is easy to convert to an other 
usual netlist format.
2 - after this, netlist_form_pads-pcb is launched, read this file and 
create the pads-pcb netlist. Of course if myschema.tmp does not exists, 
the pad-pcb netlist is void...
-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Error drawing arcs

2007-05-22 Thread jean-pierre charras - INPG
kicad a écrit :

 Hello

 When I'm trying to draw arcs in the module editor they all look like
 cake slices IE they all show the radiuslines, same with all the
 components in the librarys witch contain arcs.


This is a wxGTK bug (see how-to-build-kicad.txt)

Last version of wxGTK does not have this bug.

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 Grenoble Image Parole Signal Automatique (GIPSA - INPG)
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Power Gnd seen as components?

2007-02-27 Thread jean-pierre charras - INPG
richmogd a écrit :

 Hi All,

 I'm struggling to work out what I should be doing with the power and
 ground connections. Basically, I've been using the 3.3V power and GND
 power for the corresponding connection in my circuit. Each time I use
 one of these power, kicad asks me to annotate them, so i do. When I
 export the BOM, I get something like this:

 | PWR1 +3.3V ; ;
 | PWR10 GND ; ;
 | PWR2 GND ; ;
 | PWR20 +3.3V ; ;
 | PWR21 GND ; ;
 | PWR22 +3.3V ; ;
 | PWR23 GND ; ;
 | PWR24 GND ; ;
 | PWR25 +3.3V ; ;
 | PWR26 +3.3V ; ;
 | PWR3 GND ; ;
 | PWR7 +3.3V ; ;
 | PWR8 GND ; ;
 | PWR9 +3.3V ; ;

 Does this mean that kidcad is seeing these as separate components or
 does it realize that they're all the same net? Maybe it's not an
 issue, but I'm a bit confused on this one.

 Thanks,

 Glenn.


  
























The reference name of your powers is pwr? (pwr1, pwr2 ...) and **MUST** 
be #pwr?
A component with a reference starting by # is *not* listed in reports or 
netlist.

(see eeschema doc, chapter 10.8)


Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 LIS - INPG
46, Avenue Félix Viallet
38031 Grenoble Cedex


Re: [kicad-users] Re: Library not found

2007-02-19 Thread jean-pierre charras - INPG
The kicad autoinstall package has a problem:

Its creates a directory  named KiCad, and kicad (which is case 
sensitive) expects a directory named  kicad.
Therefore kicad does not find the help files and some other files 
(default config files and dictionnaries)

In order to avoid problems:
Rename the kicad directory C:\Program Files\KiCad to C:\Program 
Files\kicad   AND edit the desktop icon properties ( change KiCad to kicad)
or:
install kicad in root directory (c:\ or d:\)
or
download the new autoinstall archive (this bug is solved)



-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 LIS - INPG
46, Avenue Félix Viallet
38031 Grenoble Cedex




[kicad-users] Kicad update

2007-01-18 Thread jean-pierre charras - INPG
I have uploaded a new (stable version) : kicad-2007-01-15

-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
 LIS - INPG
46, Avenue Félix Viallet
38031 Grenoble Cedex
Web : http://www.lis.inpg.fr


[kicad-users] New kicad release candidate

2007-01-03 Thread jean-pierre charras - INPG
I have uploaded a new kicad release candidate (kicad-2007-01-03-RC2) at:
iut-tice.ujf-grenoble.fr/cao/

Some bugs are fixed.
Some new enhancements.

This is the last release candidate before the stable version.




-- 
Jean-Pierre CHARRAS
Maître de conférences
Directeur d'études 2ieme année.
Génie Electrique et Informatique Industrielle 2
Institut Universitaire de Technologie 1 de Grenoble
BP 67, 38402 St Martin d'Heres Cedex

Recherche :
LIS - INPG
46, Avenue Félix Viallet
38031 Grenoble Cedex
Web : http://www.lis.inpg.fr