Re: [time-nuts] Cycling of Peltier junction

2010-09-09 Thread Bruce Griffiths
There is a reference to thermomechanical fatigue in Peltier devices with 
respect to the effect of peltier device ripple current on the longevity 
of the Peltier devices in the HP Journal article on an optical power meter.


Bruce

J. Forster wrote:

Peltier devices have been used as temperature control elements for
decades. I've never heard of fatigue failures, but, if I were designing a
chamber as you suggest, I'd try to keep the temperature differential
across the TE element under maybe 15 to 20F. The harder you push it, the
greater the stress.

Also, the heat pumping power falls dramatically as the delta-T increases
and it's a situation of rapidly deminishing returns.

I'd not worry much about ramping the drive.

FWIW,

-John

===



   

Does anybody know about using the same Peltier junction for both heating
and cooling?
I'm concerned about thermal/mechanical shock when changing the polarity
back-n-forth between hot and cold.  Maybe there needs to be a controlled
ramp, if so then how do I figure out the rate?

Why:
I'm in the process of building a small environmental chamber for my home
lab. The volume is ~30 liter, target temp range of 0C to 60C.  For the
cooling side I am using water circulation (radiator, pump, reservoir
water block) and Peltier junctions.  At first I was planning to have two
separate systems, one for heating and one for cooling, but then I got to
thinking that using just the water and Peltier could be used for both.  I
will be using a PID for temp control, and two TEC1-12726 Peltier Qcmax(w)=
~240 $B$(BT =0j


Regards,
Jerome
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Re: [time-nuts] Freestanding mast

2010-09-05 Thread Bruce Griffiths

Magnus Danielson wrote:

Hi Steve,

On 09/05/2010 10:18 AM, Steve Rooke wrote:
On 5 September 2010 04:42, Rob Kimberleyr...@timing-consultants.com  
wrote:
Just a thought, as you are in southern hemisphere, wouldn't you see 
more

birds facing North?


Oops! I really meant North. Well spotted that man. My satellite
azimuth/elevation chart looks quite typical to text-book style. My
GPSDOs still seem to be recovering from the long power outage caused
by the earthquake here early Saturday morning but the stats seem to be
settling down again. My timing gear and antenna were unaffected but it
sure moved some of the heavy HP instruments that I have piled up on my
workbench and demolished my computer rack, but luckily everything
seems to be working OK. The only thing that seems to be at fault is my
broadband which is playing up now and I wonder if the telephone lines
have been damaged in some way.


I was about to ask how you New Zeeland time-nuts was doing and 
affected by the earthquake.


Cheers,
Magnus


Along with other North Island dwelling TN's I didn't feel a thing.

Bruce


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Re: [time-nuts] Maser manual

2010-09-02 Thread Bruce Griffiths

Attila Kinali wrote:

On Wed, 01 Sep 2010 20:08:13 +
Poul-Henning Kampp...@phk.freebsd.dk  wrote:

   

Yes, but what is the issues relating to sapphire loading? What's the
cost of the sapphire block and having it machined?
   

It is a saphire tube, a readily available, if not exactly cheap, commodity.
 

Why saphir? Aluminia (AlO2) seems to be used as well to load H maser
cavities. Or is saphir in some way better?

Attila Kinali
   


Sapphire and ruby are slightly impure varieties of corundum the single 
crystal form of aluminium oxide.
Sapphire and rubies just have different inpurities that impart colour to 
the gem.


The microwave loss in single crystal alumina (sapphire, corundum) may be 
somewhat lower than for the polycrystalline form.


Bruce


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Re: [time-nuts] homebrew H maser

2010-09-02 Thread Bruce Griffiths

jimlux wrote:

Hal Murray wrote:

jim...@earthlink.net said:
The gas diffusing out through the drilled bolt.. sure it's drilled, 
but  the
conductance is so patheticaly low, you're literally waiting until  
the gas
molecules happen to randomly bounce their wey up the hole. 


I've never worked with vacuum gear.

I assume drilled bolt refers to a bolt through a drilled hole so 
there is some slop between the bolt and the hole.
No... the bolt has a hole through it, to provide a gas path when you 
install it into a blind tapped hole. Otherwise, the trapped gas in the 
bottom of the hole slowly leaks out past the threads.




Can I use vacuum grease as a seal around the bolt?  Or does it outgas 
too much if you are going for seriously low pressures?


For the most part, grease is more trouble than it's worth. Knife edge 
seals are where it's at.




Can I use a soft(er) metal washer and mash it to a gas tight fit by 
tightening the bolt enough?


Not exactly.. what you see is a knife edge cutting into a softer 
metal... mashing implies gas trapped between layers.. That kind of 
thing crops up in TWT manufacturing, where they stack all the parts of 
the gun or the collector...



How low a pressure does a H maser need?   Where is it relative to say 
fingerprints outgassing?


That's a good question.. I don't know.


http://www.dtic.mil/cgi-bin/GetTRDoc?Location=U2doc=GetTRDoc.pdfAD=ADA503712 
http://www.dtic.mil/cgi-bin/GetTRDoc?Location=U2doc=GetTRDoc.pdfAD=ADA503712


Indicates that the operating pressure at the hydrogen dissociator is 
likely to be a few Torr or so.


Bruce


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Re: [time-nuts] Maser info

2010-09-02 Thread Bruce Griffiths
Higher operating temperatures force the use of nickel alloy to replace 
the silver palladium alloy traditionally used.
At higher operating temperatures (40c and above) its not possible to 
turn off (without cooling it) the palladium leak.
The Russian masers use nickel or nickel alloy instead of palladium or 
palladium silver.


Bruce

Corby Dawson wrote:

John F.,

The Palladium valve is also known as a palladium leak or a palladium
purifier. In the Maser the use is as the leak. It would also serve to
purify the H2 BUT any other impurities lodge in the Palladium plug and
can eventually cause it to fail. Early symptoms manifest as having to
heat the plug to higher and higher temperatures to maintain the H2 flow.
When the hydrogen bottle is changed you must perform a purge routine (see
the manual) to allow any foreign gases to be removed. So for maximum life
the Hydrogen should be as pure as possible.
The resonator coil cannot be seen, I can see that it is a bit different
than the manual shows. It was upgraded at some point. I can provide a
picture of another masers coil.
The receiving tank did not heat up all. Since I was going from a higher
pressure tank to a mostly empty tank I don't think compression was
involved



Robert,

You CANNOT use oil diffusion pumps, even for the rough pumping!
(mechanical roughing pumps are also a no-no.) ANY contamination can
seriously degrade the bulb coating. This can take quite a while to show
up. Since tearing down the maser to replace the storage bulb is
definitely NON-TRIVIAL. Using a turbo pump or vacsorbs are the only
options. I use Vacsorbs as they are simple and quite a bit cheaper than
the turbo.

Bill,

If your serious, the disassociator splits the hydrogen molecules H2
into atoms H to allow maser operation. I do have an old Interocitor
screen I could mount on top of the Maser. It would look kinda neat!

John M.,
The original oscillator was an upgrade and did not agree completely with
the manuals schematic. I did get an updated schematic from the vendor and
after much work and completely rebuilding it I still could not get it to
work reliably. I decided to design my own using a low power oscillator to
drive a power amplifier and impedance matching network. This has worked
very well!

Corby Dawson

1 Tip for Losing Weight
Cut down 2 lbs per week by using this 1 weird old tip
http://thirdpartyoffers.juno.com/TGL3141/4c7f52071849adf3adm04duc
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Re: [time-nuts] Maser info

2010-09-02 Thread Bruce Griffiths

Reference for palladium-silver leak difficulty at high temperature.
http://tycho.usno.navy.mil/ptti/1988/Vol%2020_10.pdf

Bruce

Bruce Griffiths wrote:
Higher operating temperatures force the use of nickel alloy to replace 
the silver palladium alloy traditionally used.
At higher operating temperatures (40c and above) its not possible to 
turn off (without cooling it) the palladium leak.
The Russian masers use nickel or nickel alloy instead of palladium or 
palladium silver.


Bruce

Corby Dawson wrote:

John F.,

The Palladium valve is also known as a palladium leak or a palladium
purifier. In the Maser the use is as the leak. It would also serve to
purify the H2 BUT any other impurities lodge in the Palladium plug and
can eventually cause it to fail. Early symptoms manifest as having to
heat the plug to higher and higher temperatures to maintain the H2 flow.
When the hydrogen bottle is changed you must perform a purge routine 
(see
the manual) to allow any foreign gases to be removed. So for maximum 
life

the Hydrogen should be as pure as possible.
The resonator coil cannot be seen, I can see that it is a bit different
than the manual shows. It was upgraded at some point. I can provide a
picture of another masers coil.
The receiving tank did not heat up all. Since I was going from a higher
pressure tank to a mostly empty tank I don't think compression was
involved



Robert,

You CANNOT use oil diffusion pumps, even for the rough pumping!
(mechanical roughing pumps are also a no-no.) ANY contamination can
seriously degrade the bulb coating. This can take quite a while to show
up. Since tearing down the maser to replace the storage bulb is
definitely NON-TRIVIAL. Using a turbo pump or vacsorbs are the only
options. I use Vacsorbs as they are simple and quite a bit cheaper than
the turbo.

Bill,

If your serious, the disassociator splits the hydrogen molecules H2
into atoms H to allow maser operation. I do have an old Interocitor
screen I could mount on top of the Maser. It would look kinda neat!

John M.,
The original oscillator was an upgrade and did not agree completely with
the manuals schematic. I did get an updated schematic from the vendor 
and

after much work and completely rebuilding it I still could not get it to
work reliably. I decided to design my own using a low power 
oscillator to

drive a power amplifier and impedance matching network. This has worked
very well!

Corby Dawson

1 Tip for Losing Weight
Cut down 2 lbs per week by using this 1 weird old tip
http://thirdpartyoffers.juno.com/TGL3141/4c7f52071849adf3adm04duc
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Re: [time-nuts] homebrew H maser

2010-09-02 Thread Bruce Griffiths

Poul-Henning Kamp wrote:

In message4c7f5918.7030...@xtra.co.nz, Bruce Griffiths writes:

   

Indicates that the operating pressure at the hydrogen dissociator is
likely to be a few Torr or so.
 

The pressure is basically: As low as possible in order to minimize
hydrogen collisions (other hydrogen, walls) as much as possible.

   
i.e. the mean free path of the atomic hydrogen needs to be somewhat 
larger than the dimensions of the (fused silica) gas containment bulb.


The mean free path will be comparable to the bulb dimensions at a 
pressure of around 1 ubar (100 uPa) or so.


Since the Hydrogen atom bounces of the fluoropolymer coated walls 
thousands of times before phase coherence is lost the mean free path 
needs to be several thousand times the containment bulb dimensions to 
avoid degrading the maser performance. This requires a pressure of 
around 1 nanobar (100nPa) or below within the storage bulb..


The (gas) conductance of the exit aperture of the dissociator is 
selected to achieve the required atomic hydrogen flux of  at most around 
3E-5 liter-Torr/sec or so for a typical hydrogen dissociator pressure of 
50Torr or so.


Bruce


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Re: [time-nuts] homebrew H maser

2010-09-02 Thread Bruce Griffiths

Bruce Griffiths wrote:

Poul-Henning Kamp wrote:

In message4c7f5918.7030...@xtra.co.nz, Bruce Griffiths writes:


Indicates that the operating pressure at the hydrogen dissociator is
likely to be a few Torr or so.

The pressure is basically: As low as possible in order to minimize
hydrogen collisions (other hydrogen, walls) as much as possible.

i.e. the mean free path of the atomic hydrogen needs to be somewhat 
larger than the dimensions of the (fused silica) gas containment bulb.


The mean free path will be comparable to the bulb dimensions at a 
pressure of around 1 ubar (100 uPa) or so.


Since the Hydrogen atom bounces of the fluoropolymer coated walls 
thousands of times before phase coherence is lost the mean free path 
needs to be several thousand times the containment bulb dimensions to 
avoid degrading the maser performance. This requires a pressure of 
around 1 nanobar (100nPa) or below within the storage bulb..


The (gas) conductance of the exit aperture of the dissociator is 
selected to achieve the required atomic hydrogen flux of  at most 
around 3E-5 liter-Torr/sec or so for a typical hydrogen dissociator 
pressure of 50Torr or so.


Bruce



Oops!,  the pressures given in Pa above are out a few orders of magnitude.
Correct values are:

The mean free path will be comparable to the bulb dimensions at a 
pressure of around 1 ubar (0.1Pa) or so.


Since the Hydrogen atom bounces of the fluoropolymer coated walls 
thousands of times before phase coherence is lost the mean free path 
needs to be several thousand times the containment bulb dimensions to 
avoid degrading the maser performance. This requires a pressure of 
around 1 nanobar (100uPa) or below within the storage bulb..


The (gas) conductance of the exit aperture of the dissociator is 
selected to achieve the required atomic hydrogen flux of  at most around 
3E-5 liter-Torr/sec or so for a typical hydrogen dissociator pressure of 
50Torr or so.


Bruce




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Re: [time-nuts] Maser manual

2010-09-01 Thread Bruce Griffiths

Magnus Danielson wrote:

On 09/01/2010 09:39 PM, Poul-Henning Kamp wrote:
In message24c547b54ea34a69bacc4f823bb40...@pc52, Tom Van Baak 
writes:

I found the original copies of both EFOS manuals, along with
a few photos. See:

http://www.leapsecond.com/museum/efos/


Interesting.


Page 4/3 in the service manual states:

For the Hydrogen Maser, this unperturbed frequency
is
f(H) = 1 420 405 751.768 +/- 0.002 Hz

In practice, this frequency is perturbed by
interaction of the hydrogen atoms with the walls
of the interaction volume container, doppler
effects, interactions between the atoms themsel-
ves, etc.  The resulting frequency for the EFOS
Maser is taken to be

F(o) = 1 420 405 751.689 Hz

I have no idea where the EFOS was produced, but somebody should try
to calculate the relativistic correction for their height above the
geoid, and see how much of the systematic 0.079Hz frequency difference
that explains...


Neuchatel, which still leaves a bit of unspecified height.

However, this effect would be cancelled as their cesium clocks would 
be on the same height above the geoid (give or take a few meters).


So, their indication is correct. The C-field also pulls the atoms of 
course, which they failed to point out in the cited text.



If I were to build a maser myself, I would probably not attempt
to copy the EFOS, as the large mechanical dimensions add significant
cost in materials and machining.

I would be much more tempted by a sapphire loaded cavity design like
this one:

http://www.nict.go.jp/publication/shuppan/kihou-journal/journal-vol50no1.2/0304.pdf) 



As that brings the mechanics inside the work envelope of main-stream
CNC machines with the required tolerances.


Yes, but what is the issues relating to sapphire loading? What's the 
cost of the sapphire block and having it machined?


The tempco of the dielectric constant of sapphire is quite large so the 
cavity resonance tempco is somewhat larger than that of an unloaded 
copper or aluminium cavity.


There is a NIST paper detailing a somewhat earlier attempt to use a 
dielectric cavity:

http://tf.nist.gov/general/pdf/156.pdf

Again the dielectric constant tempco is a significant issue.




Cheers,
Magnus


Bruce


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Re: [time-nuts] Maser manual

2010-09-01 Thread Bruce Griffiths

An early analysis of a fused silica loaded cavity by Sigma Tau:
http://www.dtic.mil/cgi-bin/GetTRDoc?AD=ADA497003Location=U2doc=GetTRDoc.pdf 
http://www.dtic.mil/cgi-bin/GetTRDoc?AD=ADA497003Location=U2doc=GetTRDoc.pdf


Although the dielectric constant tempco and thermal expansion tempco of 
fused silica is low so is the dielectric constant so the reduction in 
cavity volume is relatively small.


The reduced Q of a dielectric loaded cavity may also be an issue in the 
absence of cryogenic cavity cooling.


Bruce

Poul-Henning Kamp wrote:

In message4c7eb534.2040...@xtra.co.nz, Bruce Griffiths writes:

   

The tempco of the dielectric constant of sapphire is quite large so the
cavity resonance tempco is somewhat larger than that of an unloaded
copper or aluminium cavity.
 

Yes, they write that cavity autotuning is a must.

I still think that is a smaller problem than getting hold of and
maching an unloaded cavity with the necessary shields.

   




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Re: [time-nuts] homebrew maser

2010-08-31 Thread Bruce Griffiths
PTFE wall storage bulb wall coatings haven't been used for some decades, 
FEP (or the Russian fluoropolymer ) is better in that a smoother coat is 
achievable see:
http://www.dtic.mil/cgi-bin/GetTRDoc?Location=U2doc=GetTRDoc.pdfAD=ADA509340 
http://www.dtic.mil/cgi-bin/GetTRDoc?Location=U2doc=GetTRDoc.pdfAD=ADA509340


A sual hexapole state selector is probably a little more effective than 
the cruder method used in the Russian masers.


Bruce

Mark Sims wrote:

Same general idea,  but an image intensifier plate would probably not work 
well.  They are usually thinner and are cut at a bias so the electrons ricochet 
along its length.  You might be able to mount one so that it cancels the bias 
angle.

They are made by stretching a bundle of hollow glass tubes that have been 
filled with solid glass rods of a different composition.  The original bundle 
can be very large (like over a meter) and is shrunk down to like 100 fibers per 
millimeter.  It is then sliced and polished.  Often the slices (or the pulled 
bundles) are joined into a bigger plate.   Then the inner solid glass is 
dissolved out with a strong alkali. The hollow tubes are coated with a 
photoelectric material.
The image from the tube is inverted using a twister...  a coherent fiber 
optic rod that has a 180 degree twist.

---
Do you know if the collimator is made from an uncoated microchannel plate?
If so, an old, broken Gen II image intensifier might be a viable source.


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Re: [time-nuts] homebrew H maser

2010-08-29 Thread Bruce Griffiths

http://www.spectratime.com/product_downloads/PTTI_FCS_2005.pdf


ewkeh...@aol.com wrote:

Any links to reading material, would be nice to learn what they did to get
a small package and how small is it?
Bert Kehren


In a message dated 8/29/2010 2:03:34 P.M. Eastern Daylight Time,
p...@phk.freebsd.dk writes:

In  message3e227.34d2ee82.39abf...@aol.com, ewkeh...@aol.com  writes:

   

Do we know any thing about the Neuchatel design for  Galileo?
Bert Kehren
 

There are plenty of papers about  it.

They started out with an active design, and got it inside  spec
(power/weight) but found that the performance was not worth  the
extra effort, so they switched to a passive design to further
reduce  weight/power.

   




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Re: [time-nuts] homebrew H maser

2010-08-29 Thread Bruce Griffiths

http://tycho.usno.navy.mil/ptti/ptti2002/paper14.pdf
Bruce Griffiths wrote:

http://www.spectratime.com/product_downloads/PTTI_FCS_2005.pdf


ewkeh...@aol.com wrote:
Any links to reading material, would be nice to learn what they did 
to get

a small package and how small is it?
Bert Kehren


In a message dated 8/29/2010 2:03:34 P.M. Eastern Daylight Time,
p...@phk.freebsd.dk writes:

In  message3e227.34d2ee82.39abf...@aol.com, ewkeh...@aol.com  writes:


Do we know any thing about the Neuchatel design for  Galileo?
Bert Kehren

There are plenty of papers about  it.

They started out with an active design, and got it inside  spec
(power/weight) but found that the performance was not worth  the
extra effort, so they switched to a passive design to further
reduce  weight/power.





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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-24 Thread Bruce Griffiths

Bob Camp wrote:

Hi


If you start with a mixer that runs 500 mV / radian (an RPD-1 at the typical 8 
mV / degree + 10%) then -180 below that would be 0.5 nV. Since noise it 
coherent close in, the DSB  to SSB process nets you 1 nV out when you have -180 
dbc noise.

   
With a capacitive IF port termination the mixer sensitivity increases 
somewhat.
It increases more when using something like an HP10514 or 10534 than 
with an RPD-1.
Such a termination isnt particularly useful for offsets much above 
100kHz or so.
If one terminates all mixer ports in 50 ohms as some insist is the best 
method, then the mixer phase sensitivity is much lower, in which case a 
somewhat lower noise preamp may be required.


The posted plot does show (together with the noise plot for the HPS5.1 
preamp) that the 2SK369 and the IF9030 have much lower flicker noise 
than the BF862.



On Aug 22, 2010, at 10:51 AM, Bruce Griffiths wrote:

   
   



   
 
   
   

So everything above (and an AD797 and likely an OP-37) will do better than 2 nV / Hz into 
1K Hz. That would let you check oscillators in the below -170, but not below 
-180 range. You might or might not find such an oscillator in your junk box. They 
certainly do exist.

On the plot above, both devices would let you do the same thing at 10 Hz. Now you are into the 
range of highly unlikely to find. At reasonable frequencies, -135 is doing pretty well 
at 10 Hz. Bragging rights start at about -140. Highly unlikely cuts in much past that 
10 Hz offset. I'm not talking about a one of a kind piece of magic at NIST, but about what's in 
your junk box.

The 2SK369 is still holding  ok for -170  at 1 Hz. Even for one of a kind 
magic, that's pretty crazy. Unlikely to find (and really tough to measure) cuts in at 
about -120 at 1 Hz.

At 0.1 Hz offset, you will need to run an instrument bandwidth below 0.01 Hz to 
get anything close to a good approximation to the noise. Most lab analyzers 
run  100X t to get enough data. That puts you out around 10,000 seconds for 
the run. That's a crazy long time. DC coupled offsets are likely to nuke that run 
just about every time.

I'm by no means knocking the idea of having a good preamp. I'm only trying to 
point out that the numbers above are *way* past what a reasonable person might 
need to sort through their basement oscillator collection. 50 db is a lot of 
margin.

Bob


   


For an AC coupled sound card based spectrum analyser dc frequencies much 
below 2Hz or so are of little interest.
Being able to calibrate the preamp + sound card frequency response using 
the thermal noise of a resistor is convenient.
This is more difficult to achieve with a bipolar input stage as the 
amplifier input current noise is significant.


Bruce


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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-24 Thread Bruce Griffiths
Having a simple method of determining the preamp frequency response can 
be a useful diagnostic tool during development, particularly if one uses 
componets like super capacitors in the amplifier signal path.


If one doesnt have a suitable offset source handy the mixer ports can be 
driven in near quadrature by the same signal and the dc output as a 
function of the relative phase shift between the 2 mixer inputs can be used.


However neither method calibrates the phase noise frequency response of 
the system.
Adding RF noise to one of the mixer inputs can be used to measure the 
frequency response of the system.
If the RF noise source is uncalibrated but stable then it can be used to 
measure the relative frequency response.
The results of a dc (or beat frequency) measurement of the gain can then 
be used to correct the results to obtain a calibrated frequency response.


If one is using a capacitive or other non conventional mixer IF port 
termination, then knowing the relative frequency response can be vital.


Bruce

Bob Camp wrote:

Hi

I've always calibrated my phase noise setups to the phase slope of the mixer
I'm using. It does involve switching gains, but it's a direct system
calibration. Beat note is 360 degrees, so this chunk is x degrees and you
got y mv over that chunk. Check the slope on the other side of the beat note
to make sure it's the same. Do some math and you have a radian to volt
transfer function.

If you are sorting junk box OCXO's it's a pretty good way to do it. The only
added steps are an independent measurement of the switched gain / gain
flatness and a short circuit input check to estimate the noise floor. Both
are an initial setup / one time only sort of thing with most amps.

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Bruce Griffiths
Sent: Tuesday, August 24, 2010 3:25 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Phase noise measurement (was - no subject)

Bob Camp wrote:
   

Hi

 

  CHOP

Being able to calibrate the preamp + sound card frequency response using
the thermal noise of a resistor is convenient.
This is more difficult to achieve with a bipolar input stage as the
amplifier input current noise is significant.

Bruce


   




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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-22 Thread Bruce Griffiths
The link isnt particularly useful as guests cant view the attachments 
and registration is disabled


Bruce

dk...@arcor.de wrote:
   

Wenzel Audio Amp referred to in this email. Perfect! I drive with it a
3561A and  a 7L5!  Works for me.  The only problem is getting any more
2SK369.
Any recommendations?
 

NXP   BF862, available from digi-key.

I have used it in a similar hookup with good success. Its virtue is the
low noise voltage AND low input capacitance at the same time.
You could deploy MANY of them in parallel until you get
into the capacitance range of a single Interfet device.

One heroic effort for audio is here: 
http://www.diy-audio-engineering.org/index.php?board=2.0  HPS5.1

I currently use 3 pairs of SSM2210 in front of a AD797.

regards, Gerhard

   




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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-22 Thread Bruce Griffiths

http://www.synaesthesia.ca/LNschematics.html

Is a better link, in that one can actually view the circuit schematics.

There are a few simple refinements that will dramatically improve the 
low frequency PSRR of the single ended JFET circuits in the HPS5.1:


1) split the 3k3 resistor feeding the green LEDs into into 2 series 1k6 
resistors and bypass the common node of these 2 resistors to ground.
This low pass filters the noise current flowing in the LEDs due to power 
supply noise.


2) It would probably be even more effective if the base of the cascode 
transistor were driven by a voltage equal to the JFET source voltage 
plus about 3.7V.

It should, for example, be possible to use a selected JFET to do this.

3) The output servo should drive the noninverting input of the opamp via 
a CBCS cascode (or equivalent) with a load resistor connected to the 
input stage positive supply rail.
This should improve the PSRR dramatically. I use something similar in 
one of my low noise preamps albeit with a few LEDs in series with the 
resistor to provide most of the voltage drop as in my case the required 
voltage drop is reasonably predictable. This reduces the noise 
contribution from the servo integrator.



Bruce

Bruce Griffiths wrote:
The link isnt particularly useful as guests cant view the attachments 
and registration is disabled


Bruce

dk...@arcor.de wrote:

Wenzel Audio Amp referred to in this email. Perfect! I drive with it a
3561A and  a 7L5!  Works for me.  The only problem is getting any more
2SK369.
Any recommendations?

NXP   BF862, available from digi-key.

I have used it in a similar hookup with good success. Its virtue is the
low noise voltage AND low input capacitance at the same time.
You could deploy MANY of them in parallel until you get
into the capacitance range of a single Interfet device.

One heroic effort for audio is here: 
http://www.diy-audio-engineering.org/index.php?board=2.0  HPS5.1


I currently use 3 pairs of SSM2210 in front of a AD797.

regards, Gerhard





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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-22 Thread Bruce Griffiths

The noise measurements for the HPSs 5.1 preamp:
http://www.synaesthesia.ca/LNmeasurements.html

indicate that while the high frequency noise is about 2.2x lower than an 
optimised single ended 2SK369 preamp its flicker noise is far higher.
If one uses 5 2SK369's connected in parallel the flicker noise should be 
even lower whilst the high frequency noise will be comparable/
If the feedback resistor values are reduced perhaps 3 @SK369BLs will 
suffice.
Even lower flicker noise should be achievable if IF9030s are substituted 
for the 2SK369s.


Bruce

Bruce Griffiths wrote:

http://www.synaesthesia.ca/LNschematics.html

Is a better link, in that one can actually view the circuit schematics.

There are a few simple refinements that will dramatically improve the 
low frequency PSRR of the single ended JFET circuits in the HPS5.1:


1) split the 3k3 resistor feeding the green LEDs into into 2 series 
1k6 resistors and bypass the common node of these 2 resistors to ground.
This low pass filters the noise current flowing in the LEDs due to 
power supply noise.


2) It would probably be even more effective if the base of the cascode 
transistor were driven by a voltage equal to the JFET source voltage 
plus about 3.7V.

It should, for example, be possible to use a selected JFET to do this.

3) The output servo should drive the noninverting input of the opamp 
via a CBCS cascode (or equivalent) with a load resistor connected to 
the input stage positive supply rail.
This should improve the PSRR dramatically. I use something similar in 
one of my low noise preamps albeit with a few LEDs in series with the 
resistor to provide most of the voltage drop as in my case the 
required voltage drop is reasonably predictable. This reduces the 
noise contribution from the servo integrator.



Bruce

Bruce Griffiths wrote:
The link isnt particularly useful as guests cant view the attachments 
and registration is disabled


Bruce

dk...@arcor.de wrote:

Wenzel Audio Amp referred to in this email. Perfect! I drive with it a
3561A and  a 7L5!  Works for me.  The only problem is getting any more
2SK369.
Any recommendations?

NXP   BF862, available from digi-key.

I have used it in a similar hookup with good success. Its virtue is the
low noise voltage AND low input capacitance at the same time.
You could deploy MANY of them in parallel until you get
into the capacitance range of a single Interfet device.

One heroic effort for audio is here: 
http://www.diy-audio-engineering.org/index.php?board=2.0  HPS5.1


I currently use 3 pairs of SSM2210 in front of a AD797.

regards, Gerhard









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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-21 Thread Bruce Griffiths
The Wenzel Audio amp is a little noisier than it need be and it has a 
poor PSRR, so that a very low noise power supply with low ripple is 
essential.
Its not too hard to improve the PSRR and the input noise of such a 
current feedback amplifier.


There are JFETS (IF9030) with similar noise floors and significantly 
lower flicker noise.

However the minimum order from Interfet is about $250.
For noise measurements on several JFETS (including the IF9030 and the 
2SK369) see:
/Ultra-Low-Noise High Input Impedance Amplifier for Low-Frequency 
Measurement Applications/
Felix A Levinson, IEEE Transactions on Circuits and Systems Vol 55 No 7, 
August 2008 pp1815-1821.


Bruce

ewkeh...@aol.com wrote:

Hi
I have the Hp phase noise system with the 35601A but use most the time the
Wenzel Audio Amp referred to in this email. Perfect! I drive with it a
3561A and  a 7L5!  Works for me.  The only problem is getting any more 2SK369.
Any recommendations?
Thanks   Bert Kehren


In a message dated 8/20/2010 6:54:05 P.M. Eastern Daylight Time,
jmi...@pop.net writes:


   

  Would anyone else like to suggest a known good low phase noise
buffer  amplifier?  Maybe something from a Fred Walls paper?
 

You can  always build HF isolation amps by rigging MMICs and attenuators
together,  but this will not reliably get you below -160 dBc/Hz.  Bruce G.
has  given some good advice in this regard, with some circuit designs  at
http://www.ko4bb.com/~bruce/IsolationAmplifiers.html and  elsewhere.  I'm a
fan of this version (also from  Bruce):
http://www.ke5fx.com/norton.htm

This one has the advantage  of simplicity.  No weird parts, nothing that is
likely to be out of  production or hard to find, and dirt cheap.  I've
measured the  broadband floor at near -170 dBc/Hz at 10 MHz, and its noise
contribution  at 100 Hz is below what the 3048A can see.  These figures are
adequate  to measure any 10811-class OCXOs.

A practical PN measurement system for  10811-class oscillators can be made
by
building two of those amplifiers and  using them to drive pretty much any
random double-balanced mixer found on  eBay with +10 dBm LO specs or more.
Both ports should be driven strongly to  reject AM artifacts and avoid
degrading the excellent noise floor offered  by the amps.  I'd hit the LO
port with +10 to +12 dBm and the RF port  with at least 0 dBm.

Then, see the Wenzel app note here  (
http://www.wenzel.com/documents/measuringphasenoise.htm ) to lock the  two
oscillators in quadrature and amplify the resulting baseband  output.  Any
of
several sound-card FFT programs can be used to  generate an output graph,
although if you want absolute calibration in  dBc/Hz you need to be prepared
to sweep the actual test setup from mixer  output to FFT input to watch for
various sources of flatness  error.

A combination of an AD7760-EVAL board and a Digilent Nexys2 can  be used to
construct an excellent baseband digitizer for the DC-1 MHz  spectrum, but
most of the time a good-quality 192-kHz sound card is fine  for this sort of
work.  Most good crystal oscillators reach their  broadband floor by 10 kHz,
so there's no real need to go out to 1 MHz or  more.

-- john,  KE5FX


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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-21 Thread Bruce Griffiths

ewkeh...@aol.com wrote:

Thanks   Bert


In a message dated 8/21/2010 11:43:53 A.M. Eastern Daylight Time,
dk...@arcor.de writes:


   

  Wenzel Audio Amp referred to in this email. Perfect! I drive with it a
3561A and  a 7L5!  Works for me.  The only problem is  getting any more
2SK369.
Any  recommendations?
 

NXP   BF862, available from  digi-key.
   

Don't these devices have relatively high flicker noise?


I have used it in a similar hookup with good success. Its  virtue is the
low noise voltage AND low input capacitance at the same  time.
You could deploy MANY of them in parallel until you get
into the  capacitance range of a single Interfet device.

   
The input capacitance is relatively noncritical in this application 
(phase noise measurement) since it is shunted by the much larger output 
capacitance of the low pass filter at the mixer IF port.



One heroic effort for  audio is here:
http://www.diy-audio-engineering.org/index.php?board=2.0   HPS5.1

I currently use 3 pairs of SSM2210 in front of a  AD797.

regards,  Gerhard

   


Bruce


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Re: [time-nuts] Phase noise measurement (was - no subject)

2010-08-21 Thread Bruce Griffiths

Poul-Henning Kamp wrote:

In message7c37.12cdef25.39a12...@aol.com, ewkeh...@aol.com writes:

   

I am not seeing it, what should I use to measure it 3561 and 7 spec
analyzer do not show it?
 

It is probably the 3561 not the 70k that has the best chance.

I am not aware of the precise characteristics of the noise, but it
sounds somewhat like a boiling pot.

I became aware of it first time when I ran a small class-A audio
amplifier from a couple of, probably too, small VRLA's some years
ago, just for the fun of it.

With no input signal, the speakers would gurgle faintly and it took
me some time to locate the source of the noise to the batteries.

I would guess its amplitude correlates with the ratio of discharge
current to plate area, since it is chemical/mechanical in nature.

These days, I would build a super-cap battery instead if I needed
a low-power PSU with low noise.

Poul-Henning

PS: also be aware that almost all VRLA's have a very nasty resonance
frequency somewhere in the low MHz band.  If you are after low noise,
you should always decouple the battery good poly/plastic caps right
at the terminals.

   

NIST found that NiCd cells are very quiet at least for low load currents:

http://tf.nist.gov/general/pdf/1133.pdf

Thus batteries are useful as low noise voltage references or for 
providing the relatively low base current of a BJT in a low phase noise 
RF amplifier.


Perhaps its the gelled electrolyte that is the source of the noise 
problem with VLRA batteries??



Bruce


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Re: [time-nuts] On low-voltage TAC/TDCs for a GPSDO

2010-08-16 Thread Bruce Griffiths

J.D. Bakker wrote:

At 23:49 +1200 14-08-2010, Bruce Griffiths wrote:

J.D. Bakker wrote:

At 19:01 +1200 14-08-2010, Bruce Griffiths wrote:

J.D. Bakker wrote:
However the ultimate test (other than breadboarding it) is to 
actually simulate the sampling process and look at the deviation of 
the sampled voltages from linearity.


That's not a bad idea (the recent Simulation thread 
notwithstanding), I'll see if I can find the time to cobble something 
together.


Suggested procedure:
- Assume perfect ADC buffers (not unrealistic, some of the MCP6xxx 
parts have enough GBW and slew rate), and a 2V ADC reference.

- Independent variables:
  * Number of ADC bits (8...12)
  * ADC input noise (model as AWGN, vary over 0...10LSB)
  * ADC aperture jitter (AWGN, 0...2ns)
  * ADC sample rate (1 or 2 MSPS)
  * Ramp rate (0.1/0.2/0.5/1V/us, to be varied by changing C1 and only 
C1)
  * For Circuit 3: Difference between ramp rates (0...10%, again 
through C1)
- Have LTSpice generate a simulated ramp with enough time resolution 
(say 100ps), do linear interpolation if needed.

- For each combination of independent variables:
  * Generate simulated ramp(s)
  * Run a realistic number of -100ns/0ns/+100ns calibrations (call it 
100 runs)

  * Sweep the simulated offset from -500ns to 500ns in 1ns steps
  * For each simulated offset, do a few thousand measurement runs
  * Collect statistics
- Plot RMS and 90%-limits for the recorded data.

That should keep all eight cores busy for a day or so. Does that sound 
like a workable plan? If I feel up to it, I'll see if I can add the 
simple RC-filter to the mix, although I'm less confident about doing 
proper a priori weighed error curve fitting on that than on the simple 
linear ramps.


Its probably more informative to look at the effect of the factors one 
at a time before doing the full blown simulation that includes all such 
factors.
Start with an ideal current source to isolate the effects due to switch 
capacitance etc, then try a few real current sources.


It should be a relatively simple case of a nonlinear least squares fit 
for the simple RC circuit.


Simulating the effect of statistical calibration using a uniformly 
distributed set of time intervals.
In this case the non linearity will be reflected in the non statistical 
variations in the histogram of frequencies for each ADC value.




(I'd like to look at slower ramps/ADCs because the more I think about 
it the more I prefer the ADuC7024, with +/-1LSB INL @1MSPS over the 
+/-6LSB @2MSPS of the ATXMega. An added bonus of the ADuC is that it 
has a small on-chip PLA, which might allow me to do without a CPLD).


In the case of the 3 diode TAC devised by Kasper Pedersen some 
compensation of diode capacitance modulation occurs if the diodes are 
matched.


Hadn't seen that one yet. Looks interesting, but losing another two 
diode drops on top of the current source's compliance range may be a 
bit too tight for 3.3V operation.


I've tried it in the simulator and on the bench, and it works quite 
well.


I'll check again, but thats not consistent with what I found with a 
simulated 1mA current source.


As I mentioned a few messages ago the ramp becomes much more linear 
(due to swamping of parasitics) when the current and the capacitor are 
increased tenfold. Tried it again on the bench with the values as in 
the attached sim file (SMD parts dead bug on a ground plane, with a 
FDV301N in series with a 10R resistor shorting the capacitor, and a 
resistor to set the current), and as far as I can eyeball it on my 
100MHz scope it works as advertised. Not that a scope check is the 
last word in linearity, but at least there are no gross discrepancies 
with the simulator's results. Having said that, I'm open for other 
suggestions wrt the current source.


JD Monte Carlo B.
   
The deviations in the current visible in the simualtion are too small to 
be noticeable with a scope.
Increasing the ramp capacitor value has little effect on nonlinearity 
due to the Early effect.


Bruce


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Re: [time-nuts] OT: leaching was, Alternative time interval interpolation technique

2010-08-16 Thread Bruce Griffiths
The TDEV plot for the OCXO in question which can be derived from its 
ADEV plot is perhaps a useful guide to the expected jitter when 
measuring a particular time interval.
For long time intervals the phase noise much closer to the carrier than 
5Hz will tend to dominate.


Bruce

Bob Camp wrote:

Hi

Single cycle jitter is a bit confusing when you talk about bandwidths of 5Hz
to 20 MHz off a carrier. Since phase noise at 5 Hz does contribute to jitter
over that bandwidth, an OCXO (with good phase noise close in) would be
needed.

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Attila Kinali
Sent: Monday, August 16, 2010 11:53 AM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] OT: leaching was, Alternative time interval
interpolation technique

On Mon, 16 Aug 2010 07:58:01 +1200
Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:

   

Such low jitter oscillators are readily available.
With some care (bandpass filtering) a cycle to cycle jitter of around
50fs or so is attainable with a Wenzel OCXO for example.
 

Apropos Wenzel: Is there any distributor that sells them in
single quantities? Or do i have to get them from Wenzel directly?
And is there any price list available?

   

However the time interval jitter degrades as the time interval increases.
Achieving a cycle to cycle jitter of 1ps or so is relatively easy with a
10MHz or 100MHz OCXO having sufficiently low phase noise.
 

Why an OXCO? AFAIK the temperature has only an effect on long term
stability/drift, but doesn't affect short term effects (which cause
the jitters). Or am i missing something?

Attila Kinali
   




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Re: [time-nuts] OT: leaching was, Alternative time interval interpolation technique

2010-08-15 Thread Bruce Griffiths

Attila Kinali wrote:

On Sun, 15 Aug 2010 14:59:43 +1200
Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:

   

Mea Culpa.

Below is a link to the paper using SAW filters to achieve a sub ps time
interval interpolator noise:
http://cddis.gsfc.nasa.gov/lw16/docs/papers/las_4_Prochazka_p.pdf

And the associated presentation:
http://cddis.gsfc.nasa.gov/lw16/docs/presentations/las_4_Prochazka.pdf
 

A quick skimming over the error analysis Panek made, suggests that
the jitter of the clock source is the biggest contributor to measurement
errors. But he never says how a clock source with such a low jitter is
build. Although he references a few times a module build by Josef Kölbl
of the Fachhochschule Deggendorf, there is no description available what
kind of device that is.

Does anyone have any pointers to recommended reading on the design of such
low jitter oscillators?

Attila Kinali

   

Such low jitter oscillators are readily available.
With some care (bandpass filtering) a cycle to cycle jitter of around 
50fs or so is attainable with a Wenzel OCXO for example.

However the time interval jitter degrades as the time interval increases.
Achieving a cycle to cycle jitter of 1ps or so is relatively easy with a 
10MHz or 100MHz OCXO having sufficiently low phase noise.


Bruce


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Re: [time-nuts] On low-voltage TAC/TDCs for a GPSDO

2010-08-14 Thread Bruce Griffiths

J.D. Bakker wrote:

At 08:30 +1200 14-08-2010, Bruce Griffiths wrote:

J.D. Bakker wrote:
4) If the ADC(s) have a sufficiently wide full power bandwidth then 
one could just sample a pair of quadrature phased 250kHz sinewaves.


As someone who's used to thinking in I/Q I must say I've always 
liked the elegance of this approach. Trouble is that I don't see a 
cheap/easy way to generate quadrature sines with low enough 
distortion/noise.
Distortion isnt a great problem if its relatively small and stable as 
it can always be measured as part of the calibration process and its 
effect may then be compensated in software.


Those are two large ifs, if you're going for a small/cheap 
implementation. Fully analog solutions can get messy, phase shifter 
hybrids are doable but would definitely need to be shielded from 
drafts and DDSes plus appropriate filters do the job but are still 
relatively expensive. And then there's motor/generators... Am I 
missing any method here?


(on a semi-related note: some interesting work on ultralow distortion 
low frequency oscillators, employing quadrature signals to simplify 
the AGC, is being done here: 
http://www.prodigy-pro.com/diy/index.php?topic=26461.0)


(I'm not sure why I'd want to use a synchronizer in this path. The 
way I see it the TAC operates as a linear phase detector, with the 
GPS PPS and the synthesized PPS as inputs. The microcontroller then 
applies the sawtooth correction to the measured time offset, and 
uses the result in a DPLL. There will, of course, be a synchronizer 
in the input line from the GPS PPS to the microcontroller, but 
that's only used for the FLL and for rough synchronization).


Using a synchroniser allows the TAC output range to be combined with 
the coarse timestamp derived by sampling a counter clocked by the 
same clock as the synchroniser.


I think we're looking at it from two different angles.

What I read from your description is close to the traditional 
architecture such as used in the HP5335A, with a counter running at 
the system clock frequency for coarse measurement and a TAC to measure 
the remainder. What I'm planning to do is more akin a traditional PLL, 
with the TAC as the Phase Detector. For this to work I assume that a 
coarse FLL (using a counter) has already brought the oscillator within 
lock range. Is there any reason that method won't work, or can 
trivially be made to work better?


Having a wide TAC range means that its resolution and noise depends 
critically on that of the ADC.
Since some ADCs embeded within processor dont have true 12 bit 
performance this may limit the TAC resolution/noise to several nanosec 
rather than the desired 1ns or better.
(The regenerated PPS output will indeed be derived from and 
synchronous with the VCXO/OCXO. It is also my intention to have the 
OCXO clock the microcontroller, either directly or through a 
prescaler, depending on whether the XO runs higher or lower than the 
max CPU clock).


That ensures that all intermod products are harmonically or submultiples 
of the OCXO frequency.
- Circuit 3 expands on this approach by having dual ramp 
generators, and having the ADC measure the voltage difference 
between the two.


Not a good idea, as this requires accurate matching of the gains of 
the 2 TACs.


Why?

At that points they're not TACs yet, just ramp generators. Circuit 3 
uses the difference between these ramps, and I believe it need not 
be constant.


Assume there's a 1% difference in ramp rates; say C3 charges at 
1V/us and C4 charges at 1.01V/us. [...]


Since NP0/C0G caps are only available in 5% and 10% tolerance at 
best, matching gains to 1% will require using selected parts (adjust 
current source to compensate) or trimming.


I picked the 1% figure out of the air, simply to have an example for 
the math. Even so, if required it would be easy to have the 
microcontroller trim the ramp rates through one of the on-chip DACs. 
However I don't believe that the ramp rate can't be dealt with in 
software through calibration.
Software is probably best (if feasible) as this eliminates the parasitic 
capacitances and noise associated with trimmers and DACs.
With a single ADC its not possible to correct the TAC nonlinearity since 
there are a wide range of possible output voltages from the first TAC 
for any given differential input to the ADC.


Simulation indicates nonlinearity of the order of 1% or so in the 
ramp generator. This is largely due to the Early effect and 
semiconductor output capacitance modulation.


Yeah, I noticed that. It helps a lot in the four-transistor mirror to 
have all transistors carry approximately equal amounts of current. 
Further linearization can be achieved by increasing the current, 
slowing the ramp rate and picking transistors with lower hFE for a 
given fT and/or higher VAF. An output resistance of up to 1M can be 
achieved, but it's the voltage-dependent capacitance that's hurting 
linearity.



Lower hfe requires tighter

Re: [time-nuts] On low-voltage TAC/TDCs for a GPSDO

2010-08-14 Thread Bruce Griffiths

J.D. Bakker wrote:

At 19:01 +1200 14-08-2010, Bruce Griffiths wrote:

J.D. Bakker wrote:

At 08:30 +1200 14-08-2010, Bruce Griffiths wrote:
Using a synchroniser allows the TAC output range to be combined 
with the coarse timestamp derived by sampling a counter clocked by 
the same clock as the synchroniser.


I think we're looking at it from two different angles.

What I read from your description is close to the traditional 
architecture such as used in the HP5335A, with a counter running at 
the system clock frequency for coarse measurement and a TAC to 
measure the remainder. What I'm planning to do is more akin a 
traditional PLL, with the TAC as the Phase Detector. For this to 
work I assume that a coarse FLL (using a counter) has already 
brought the oscillator within lock range. Is there any reason that 
method won't work, or can trivially be made to work better?


Having a wide TAC range means that its resolution and noise depends 
critically on that of the ADC.
Since some ADCs embeded within processor dont have true 12 bit 
performance this may limit the TAC resolution/noise to several 
nanosec rather than the desired 1ns or better.


No, the TAC range would only be wide enough to cover the expected 
spread of valid PPS pulses from the GPS (say +/-500ns...+/-1us).


With some internal 12 bit ADCs that dont have true 12 bit you will 
barely achieve 1ns resolution with a 2us range.
(I've thought a bit more about what you proposed, ie using the TAC to 
measure synchronizer delay. Problem is I'd like to use the 
timestamping counter that's internal to the CPU, and I see no way of 
getting at the output of its built-in synchronizer. This could of 
course be fixed by using an external timestamping 
counter/synchronizer, but that seems like a bit of a waste of resources).


Surely you only need an external synchroniser (ie a dual D flipflop) 
clocked by the same clock (or at least one synchronous with it) as the 
internal counter?

The internal synchroniser then only adds a fixed delay.



(The regenerated PPS output will indeed be derived from and 
synchronous with the VCXO/OCXO. It is also my intention to have the 
OCXO clock the microcontroller, either directly or through a 
prescaler, depending on whether the XO runs higher or lower than the 
max CPU clock).


That ensures that all intermod products are harmonically or 
submultiples of the OCXO frequency.


Indeed. I prefer knowing where my birdies are (and preferably placing 
them where they do the least harm), rather than having them drift over 
time, frequency and temperature.


The output compliance of your four transistor current mirror is 
limited to around 1.3V or so before the onset of saturation or 
gross nonlinearity.


It's actually better than that, from what I can see from simulations 
and measurements. If the transistor currents are close to equal and 
the ramp rate isn't too high, output current stays within 1% up to 
~1V, and the mirror saturates at 0.6-0.7V. This is with common 
small-signal transistors with an fT of a few hundred MHz.


Really?
There are 2xVbe + 1x diode drop to subtract from 3.3V ie somewhere 
from 1.8V -2.4V leaving a ramp amplitude of 1.5V to 1.1V depending on 
temperature and transistor current.


That's what I thought when I first saw it and started counting 
junctions, but it's actually quite a bit better than that as the 
cross-coupling of the transistors steers current from saturating 
transistors into the bases of the opposing CE transistor. I found it 
in Barrie Gilbert's chapter on Bipolar Current Mirrors in the book 
Analogue IC Design: the current-mode approach; Google Books has a 
preview of much of this chapter.




Simulation appears to indicate otherwise, distortion starts to rise as 
one of the mirror transistors nears saturation.

One way to look at this is to look at variations in ramp charging current.

However the ultimate test (other than breadboarding it) is to actually 
simulate the sampling process and look at the deviation of the sampled 
voltages from linearity.
In the case of the 3 diode TAC devised by Kasper Pedersen some 
compensation of diode capacitance modulation occurs if the diodes are 
matched.
I've tried it in the simulator and on the bench, and it works quite 
well. If you want to test it I suggest increasing the current source 
to 10mA, the cap to 10nF and starting with 150R for R1/R2 plus 10R 
emitter resistors for the CE transistors. I've tested it with the 
common European BC5xx/BC8xx-types, but LTSpice seems to like it with 
2N3906s too. In that configuration, the ramp stays within +/-150uV of 
a linear approximation over a ramp range between 0 and 2V when ramping 
at 1V/us, which corresponds to +/-0.6LSB for a 12-bit ADC.


I'll check again, but thats not consistent with what I found with a 
simulated 1mA current source.
The capacitor charging current started to deviate significantly as 
saturation was approached.
I also simulated other current sources with higher

[time-nuts] Alternative time interval interpolation technique

2010-08-14 Thread Bruce Griffiths
A method that measures the phase of a damped LC circuit oscillatory 
transient triggered by the event to be timestamped:
http://risorse.dei.polimi.it/digital/products/2010/High frequency,high 
time resolution time-to-digital converter employing passive resonating 
circuits.pdf 
http://risorse.dei.polimi.it/digital/products/2010/High%20frequency,high%20time%20resolution%20time-to-digital%20converter%20employing%20passive%20resonating%20circuits.pdf


A dual of the circuit is readily devised using a CMOS gate plus an open 
drain (or equivalent) gate output for damping/quenching.
However the ADC employed needs to be able to capture a sample burst at a 
relatively high sample rate.


Bruce


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Re: [time-nuts] OT: leaching was, Alternative time interval interpolation technique

2010-08-14 Thread Bruce Griffiths

Mea Culpa.

Below is a link to the paper using SAW filters to achieve a sub ps time 
interval interpolator noise:

http://cddis.gsfc.nasa.gov/lw16/docs/papers/las_4_Prochazka_p.pdf

And the associated presentation:
http://cddis.gsfc.nasa.gov/lw16/docs/presentations/las_4_Prochazka.pdf

Bruce

Stanley Reynolds wrote:

oh well no credit for me, but what happened to the missing space when so many
other spaces made it thru as %20 ?



- Original Message 
From: Hal Murrayhmur...@megapathdsl.net
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Sent: Sat, August 14, 2010 8:27:09 PM
Subject: Re: [time-nuts] OT: leaching was, Alternative time interval
interpolation technique


stanley_reyno...@yahoo.com said:
   

When they receive the request for the pdf they check to see what page
referred  the request if it wasn't their site then they assume some other
web site  leaching bandwidth. This other site pretends to serve the file but
in fact it is  still served by them. This pretend site doesn't pay for the
bandwidth to serve  the files, win for them lose for the unprotected server.
 

Nice try, but that's not the problem this time.

 From the original message:

bruce.griffi...@xtra.co.nz said:
   

http://risorse.dei.polimi.it/digital/products/2010/High frequency,high  time
resolution time-to-digital converter employing passive resonating
circuits.pdf
 
   

http://risorse.dei.polimi.it/digital/products/2010/High%20frequency,high%20t
ime%20resolution%20time-to-digital%20converter%20employing%20passive%20resona
ting%20circuits.pdf
 

The URL overflows a line and contains spaces.  The second copy inside  has
%20 where the spaces go.  You are supposed to remove the line breaks and put
it back together.

The problem is that there is a missing space between High frequency, and
high time.




   




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Re: [time-nuts] PicTic Data

2010-08-14 Thread Bruce Griffiths

An ACAM GP2 evaluation board is available here:
http://shop.omegacs.net/

However an ACAM GP1 would probably be a better fit in a DMTD with a beat 
frequency of 10Hz or more as the GP1 has a measurement range of 200ms.


Bruce

Stanley Reynolds wrote:

Thanks for looking at my data that was what I was fishing for all along :-)

I was looking at the article:

A Small Dual Mixer Time Difference (DMTD) Clock Measuring System W.J. Riley 
Richard posted
  
And thinking it would be nice to do the DSS and Mixer boards to go with the

pictic II.
  
Or changing the Pictic II to use the Acam TDC GP2 Time to Digital Converter; 2

channel w/65 ps resolution now under $30. as Bruce suggested a while back.
  
My wants sure exceed my cans ;-)
  
Stanley
  



- Original Message 
From: John Milesjmi...@pop.net
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Sent: Sat, August 14, 2010 11:25:44 PM
Subject: Re: [time-nuts] PicTic Data


   

John glad you are getting good results and have something to
compare to. Back to
me who doesn't have any knowns but lots of guessing. Attached is
a run with a
box cover over the pictic, run is shorter ~ 800 seconds but the
box does look
like it helps.
I need to do a lot more testing but sometimes I just get excited :-)
 

I imported your .txt file alongside the traces I captured.  Assuming it was
taken with 1 Hz on both START and STOP, it looks like the attached.

You're getting the exact sort of results that I see if I feed both the START
and STOP inputs at 1 Hz.  My guess is that the onboard oscillator limits the
performance in that case, since it has a lot of time to drift during the
measurement if the two pulses occur close to 1 second apart.  Even the 5370B
looks much worse if driven with 1 Hz on both inputs than it does with 1 Hz
at START and 10 MHz at STOP.

So I think you're basically up and running OK.  When I get around to trying
a better clock, I'll also go back and see if the 1-pps x2 performance
improves.

It would be great if the next spin of the board could include sine-to-CMOS
shapers for the input channels as well as an external clock input, for
people who are working directly with RF signals as opposed to 1-pps.

-- john, KE5FX


   

- Original Message 
From: John Milesjmi...@pop.net
To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Sent: Sat, August 14, 2010 10:19:46 PM
Subject: Re: [time-nuts] PicTic Data

A few preliminary measurements here (I'm working on getting some software
support together):
http://www.ke5fx.com/pictic.htm

-- john, KE5FX

 

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com]on
Behalf Of Stanley Reynolds
Sent: Saturday, August 14, 2010 7:12 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] PicTic Data




My guess as to what the data may indicate is performance of the
10 Mhz 20PPM
PICTIC internal oscillator, need to repeat test with precision
10Mhz and auto
calibrate off. Fatness of the line/width maybe PICTIC error. Note
graph seems to
show me leaving the room and returning via the outside door. Not
sure what the
~100 sec oscillations are, need to check a/c cycle time.

Stanley

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Re: [time-nuts] PicTic Data

2010-08-14 Thread Bruce Griffiths

Bruce Griffiths wrote:

An ACAM GP2 evaluation board is available here:
http://shop.omegacs.net/


Ignore this link as I omitted to read the fine print

However an ACAM GP1 would probably be a better fit in a DMTD with a 
beat frequency of 10Hz or more as the GP1 has a measurement range of 
200ms.


Bruce

Stanley Reynolds wrote:
Thanks for looking at my data that was what I was fishing for all 
along :-)


I was looking at the article:

A Small Dual Mixer Time Difference (DMTD) Clock Measuring System 
W.J. Riley 

Richard posted
  And thinking it would be nice to do the DSS and Mixer boards to go 
with the

pictic II.
  Or changing the Pictic II to use the Acam TDC GP2 Time to Digital 
Converter; 2
channel w/65 ps resolution now under $30. as Bruce suggested a while 
back.

  My wants sure exceed my cans ;-)
  Stanley


- Original Message 
From: John Milesjmi...@pop.net
To: Discussion of precise time and frequency 
measurementtime-nuts@febo.com

Sent: Sat, August 14, 2010 11:25:44 PM
Subject: Re: [time-nuts] PicTic Data



John glad you are getting good results and have something to
compare to. Back to
me who doesn't have any knowns but lots of guessing. Attached is
a run with a
box cover over the pictic, run is shorter ~ 800 seconds but the
box does look
like it helps.
I need to do a lot more testing but sometimes I just get excited :-)
I imported your .txt file alongside the traces I captured.  Assuming 
it was

taken with 1 Hz on both START and STOP, it looks like the attached.

You're getting the exact sort of results that I see if I feed both 
the START
and STOP inputs at 1 Hz.  My guess is that the onboard oscillator 
limits the

performance in that case, since it has a lot of time to drift during the
measurement if the two pulses occur close to 1 second apart.  Even 
the 5370B
looks much worse if driven with 1 Hz on both inputs than it does with 
1 Hz

at START and 10 MHz at STOP.

So I think you're basically up and running OK.  When I get around to 
trying

a better clock, I'll also go back and see if the 1-pps x2 performance
improves.

It would be great if the next spin of the board could include 
sine-to-CMOS

shapers for the input channels as well as an external clock input, for
people who are working directly with RF signals as opposed to 1-pps.

-- john, KE5FX



- Original Message 
From: John Milesjmi...@pop.net
To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Sent: Sat, August 14, 2010 10:19:46 PM
Subject: Re: [time-nuts] PicTic Data

A few preliminary measurements here (I'm working on getting some 
software

support together):
http://www.ke5fx.com/pictic.htm

-- john, KE5FX


-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com]on
Behalf Of Stanley Reynolds
Sent: Saturday, August 14, 2010 7:12 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] PicTic Data




My guess as to what the data may indicate is performance of the
10 Mhz 20PPM
PICTIC internal oscillator, need to repeat test with precision
10Mhz and auto
calibrate off. Fatness of the line/width maybe PICTIC error. Note
graph seems to
show me leaving the room and returning via the outside door. Not
sure what the
~100 sec oscillations are, need to check a/c cycle time.

Stanley

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Re: [time-nuts] On low-voltage TAC/TDCs for a GPSDO

2010-08-13 Thread Bruce Griffiths
Yet another option is to sample the output of a simple 1us time constant 
RC low pass filter and fit an exponential to the sampled data and 
calculate the threshold crossing from this.
If the aberrations are sufficiently low over the range of time intervals 
measured (0.5us to 1us with a conventional 2 stage synchroniser clocked 
at 2MHz) this would be the simplest solution in that it only requires a 
single resistor and a single capacitor.


Bruce


Bruce Griffiths wrote:
Yes, with a 2MSPS ADC and 1-2us transition times one gets 2-4 samples 
during the transition.
Worst case with a 1us filter (10%-90%) output transition time there 
may be one sample at the midpoint and samples close to the 10% and 90% 
amplitude points.

2us transition times are probably close to optimum.
In the latter case the effective time stamp resolution (with a true 12 
bit ADC) will be around 0.5ns.


Ideally a gaussian impulse response filter should be used.
However if the input transitions are sufficiently (to allow the filter 
transients to settle) far apart almost any reasonable (without 
excessive overshoot) could be used.

The minicircuits LPF_BOR3+ low pass filter appears almost good enough.

Bruce

Bob Camp wrote:

Hi

Would't you want 2 or more samples during the transition?

Bob



On Aug 12, 2010, at 8:25 PM, Bruce 
Griffithsbruce.griffi...@xtra.co.nz  wrote:


Another method is to attenuate (to within the ADC input range) the 
PPS signal to be timestamped, low pass filter it and capture a 2MSPS 
sample burst centred around the low pass filter output transition 
midpoint.
You can then use WKS interpolation to time stamp the transition 
midpoint (when it crosses a threshold halfway between the initial 
and final values of the low pass filter output).
The low pass filter (preferably an LC filter) delay is easily 
calibrated by timestamping an internally generated signal initiated 
on a known ADC sampling clock edge.

No (external) current sources, reset switches etc are required.
With a 2MSPS sample rate a low pass filter output transition time of 
1-2us should suffice (provided the ADC has a sufficiently large 
large signal bandwidth).


Bruce

Bruce Griffiths wrote:

Some options:

1) Use a 74AHC05 for Q1 and Q2.

2) Switch the current source at the emitter node and only turn on 
the current source when charging the capacitor.
This will increase the available TAC output voltage range and/or 
improve the linearity by eliminating the diode.
However the capacitor discharge switch should be turned off before 
charging the capacitor.
A stable fixed delay of a few (10ns??) before switching on the 
current source is required.


3) Replace the current source with a resistor.
The resultant nonlinearity is well defined and software correction 
should be relatively easy.


4) If the ADC(s) have a sufficiently wide full power bandwidth then 
one could just sample a pair of quadrature phased 250kHz sinewaves.
Extend the range by sampling (synchronise the input sampling edge 
to the counter clock first) a counter clocked at 250KHz.

Initiate the sampling with the signal edge to be time stamped.

If the GPSDO is used to clock the microprocessor, counters and 
produce the quadrature sinewave outputs then only a single TDC 
(time to digital converter) is required.


Measuring negative time intervals should not be necessary as the 
TAC (or other TDC) should be used merely to measure the delay of a 
synchroniser the output of which is used to synchronously sample a 
counter clocked with the same clock as the synchroniser.



J.D. Bakker wrote:

Hello all,

I'm working on Yet Another DIY GPSDO, and one of the issues I've 
been looking into is a TAC/TDC to do sawtooth correction on the 
measurement of the GPS PPS signal. I'd like to stick with a 3.3V 
supply for most of the circuit, and several of the TAC designs 
that have been discussed here in the past run into trouble at such 
low voltages (mostly through VBE drops).


To start with the context: I'm planning to use a microcontroller 
with a built-in dual 12-bit 2MSPS ADC. I'd like to not use 
anything that's not available at Digi-Key or Mouser, and keep the 
SMD pitch=0.8mm (with a possible exception for dual transistors 
in SOT-23-6). That way the design shouldn't be too hard for others 
to replicate.


I'm aiming for a TAC accuracy of 1ns, allowing for one or a few 
calibrations between PPS pulses. Minimum full-scale range should 
be +/- a few hundred ns, to allow for outliers. (The plan is to 
have an initial FLL for coarse locking, and have the PLL kick in 
after that). I'm penciling in an ADC reference voltage of 2V, as 
that's commonly available and leaves enough headroom to use the 
current sources in their most linear range.


I've attached a diagram that reflects a few of my current thoughts.

- Circuit 1 is the traditional TAC. Before the start of the cycle 
Q2 conducts, discharging C1 and shunting I1's current to ground. 
At this point the ADC can measure the voltage drop

Re: [time-nuts] one-off PC board

2010-08-12 Thread Bruce Griffiths

http://www.cordellaudio.com/papers/thd_analyzer.pdf

Lester Veenstra wrote:

Dick:
I, for one, would be interested in knowing more about  Bob Cordell's
state-variable low-distortion oscillator.  Do you soft copy details or a
pointer to a source?
   Thanks, 73
  Les

Lester B Veenstra  MØYCM K1YCM
les...@veenstras.com
m0...@veenstras.com
k1...@veenstras.com
  


US Postal Address:
PSC 45 Box 781
APO AE 09468 USA

UK Postal Address:
Dawn Cottage
Norwood, Harrogate
HG3 1SD, UK

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Re: [time-nuts] On low-voltage TAC/TDCs for a GPSDO

2010-08-12 Thread Bruce Griffiths

Some options:

1) Use a 74AHC05 for Q1 and Q2.

2) Switch the current source at the emitter node and only turn on the 
current source when charging the capacitor.
This will increase the available TAC output voltage range and/or improve 
the linearity by eliminating the diode.
However the capacitor discharge switch should be turned off before 
charging the capacitor.
A stable fixed delay of a few (10ns??) before switching on the current 
source is required.


3) Replace the current source with a resistor.
The resultant nonlinearity is well defined and software correction 
should be relatively easy.


4) If the ADC(s) have a sufficiently wide full power bandwidth then one 
could just sample a pair of quadrature phased 250kHz sinewaves.
Extend the range by sampling (synchronise the input sampling edge to the 
counter clock first) a counter clocked at 250KHz.

Initiate the sampling with the signal edge to be time stamped.

If the GPSDO is used to clock the microprocessor, counters and produce 
the quadrature sinewave outputs then only a single TDC (time to digital 
converter) is required.


Measuring negative time intervals should not be necessary as the TAC (or 
other TDC) should be used merely to measure the delay of a synchroniser 
the output of which is used to synchronously sample a counter clocked 
with the same clock as the synchroniser.



J.D. Bakker wrote:

Hello all,

I'm working on Yet Another DIY GPSDO, and one of the issues I've been 
looking into is a TAC/TDC to do sawtooth correction on the measurement 
of the GPS PPS signal. I'd like to stick with a 3.3V supply for most 
of the circuit, and several of the TAC designs that have been 
discussed here in the past run into trouble at such low voltages 
(mostly through VBE drops).


To start with the context: I'm planning to use a microcontroller with 
a built-in dual 12-bit 2MSPS ADC. I'd like to not use anything that's 
not available at Digi-Key or Mouser, and keep the SMD pitch =0.8mm 
(with a possible exception for dual transistors in SOT-23-6). That way 
the design shouldn't be too hard for others to replicate.


I'm aiming for a TAC accuracy of 1ns, allowing for one or a few 
calibrations between PPS pulses. Minimum full-scale range should be 
+/- a few hundred ns, to allow for outliers. (The plan is to have an 
initial FLL for coarse locking, and have the PLL kick in after that). 
I'm penciling in an ADC reference voltage of 2V, as that's commonly 
available and leaves enough headroom to use the current sources in 
their most linear range.


I've attached a diagram that reflects a few of my current thoughts.

- Circuit 1 is the traditional TAC. Before the start of the cycle Q2 
conducts, discharging C1 and shunting I1's current to ground. At this 
point the ADC can measure the voltage drop across C1/Q2 to eliminate 
that offset. Taking nSTART low puts Q2 into high-impedance, and I1 
charges C1 through D1 until STOP is raised causing Q1 to shunt I1's 
current to ground. At this point the ADC samples the voltage across 
C1, which is proportional to the time between START and STOP (modulo 
offset and nonlinearities).


This circuit is well known to work (although it is more common to use 
Q1 for both START and STOP and to limit Q2 to ramp discharge duties). 
Downsides are that negative time offsets cannot be measured directly, 
and the constant output voltage offers little room for increased 
precision through sample averaging, unless the ADC's input noise is 
large compared to its LSB size. For the same reason there is no easy 
way to reduce the effects of ADC INL/DNL.


- Circuit 2 works in a similar way, except that the ramp isn't 
terminated by a STOP signal but is allowed to run freely until I2 
saturates. The ADC is set to sample continuously, taking multiple 
samples of the ramp, and the microcontroller interpolates the 
resulting values to determine the elapsed time between an internal 
time reference point and the START signal.


This circuit is fairly simple, and has the advantage that there is no 
hard limit to its range. Curve-fitting the sampled values increases 
precision and reduces the effects of INL/DNL. On the other hand, ADC 
aperture jitter and offset have a direct impact on resolution.


- Circuit 3 expands on this approach by having dual ramp generators, 
and having the ADC measure the voltage difference between the two.




Not a good idea, as this requires accurate matching of the gains of the 
2 TACs.
Its better to sample each TAC output individually as this allows 
software correction for gain mismatch (and nonlinearity) before subtraction.
Software correction is better than using trimpots or similar as the 
parasitics etc associated with trimpots are eliminated.


This approach is the only one of the three that can directly measure 
negative time offsets, allowing a regenerated pulse to be directly 
compared with the GPS' PPS. A small difference in ramp rates, 
unavoidable in practice, actually helps to average out 

Re: [time-nuts] On low-voltage TAC/TDCs for a GPSDO

2010-08-12 Thread Bruce Griffiths
Another method is to attenuate (to within the ADC input range) the PPS 
signal to be timestamped, low pass filter it and capture a 2MSPS sample 
burst centred around the low pass filter output transition midpoint.
You can then use WKS interpolation to time stamp the transition midpoint 
(when it crosses a threshold halfway between the initial and final 
values of the low pass filter output).
The low pass filter (preferably an LC filter) delay is easily calibrated 
by timestamping an internally generated signal initiated on a known ADC 
sampling clock edge.

No (external) current sources, reset switches etc are required.
With a 2MSPS sample rate a low pass filter output transition time of 
1-2us should suffice (provided the ADC has a sufficiently large large 
signal bandwidth).


Bruce

Bruce Griffiths wrote:

Some options:

1) Use a 74AHC05 for Q1 and Q2.

2) Switch the current source at the emitter node and only turn on the 
current source when charging the capacitor.
This will increase the available TAC output voltage range and/or 
improve the linearity by eliminating the diode.
However the capacitor discharge switch should be turned off before 
charging the capacitor.
A stable fixed delay of a few (10ns??) before switching on the current 
source is required.


3) Replace the current source with a resistor.
The resultant nonlinearity is well defined and software correction 
should be relatively easy.


4) If the ADC(s) have a sufficiently wide full power bandwidth then 
one could just sample a pair of quadrature phased 250kHz sinewaves.
Extend the range by sampling (synchronise the input sampling edge to 
the counter clock first) a counter clocked at 250KHz.

Initiate the sampling with the signal edge to be time stamped.

If the GPSDO is used to clock the microprocessor, counters and produce 
the quadrature sinewave outputs then only a single TDC (time to 
digital converter) is required.


Measuring negative time intervals should not be necessary as the TAC 
(or other TDC) should be used merely to measure the delay of a 
synchroniser the output of which is used to synchronously sample a 
counter clocked with the same clock as the synchroniser.



J.D. Bakker wrote:

Hello all,

I'm working on Yet Another DIY GPSDO, and one of the issues I've been 
looking into is a TAC/TDC to do sawtooth correction on the 
measurement of the GPS PPS signal. I'd like to stick with a 3.3V 
supply for most of the circuit, and several of the TAC designs that 
have been discussed here in the past run into trouble at such low 
voltages (mostly through VBE drops).


To start with the context: I'm planning to use a microcontroller with 
a built-in dual 12-bit 2MSPS ADC. I'd like to not use anything that's 
not available at Digi-Key or Mouser, and keep the SMD pitch =0.8mm 
(with a possible exception for dual transistors in SOT-23-6). That 
way the design shouldn't be too hard for others to replicate.


I'm aiming for a TAC accuracy of 1ns, allowing for one or a few 
calibrations between PPS pulses. Minimum full-scale range should be 
+/- a few hundred ns, to allow for outliers. (The plan is to have an 
initial FLL for coarse locking, and have the PLL kick in after that). 
I'm penciling in an ADC reference voltage of 2V, as that's commonly 
available and leaves enough headroom to use the current sources in 
their most linear range.


I've attached a diagram that reflects a few of my current thoughts.

- Circuit 1 is the traditional TAC. Before the start of the cycle Q2 
conducts, discharging C1 and shunting I1's current to ground. At this 
point the ADC can measure the voltage drop across C1/Q2 to eliminate 
that offset. Taking nSTART low puts Q2 into high-impedance, and I1 
charges C1 through D1 until STOP is raised causing Q1 to shunt I1's 
current to ground. At this point the ADC samples the voltage across 
C1, which is proportional to the time between START and STOP (modulo 
offset and nonlinearities).


This circuit is well known to work (although it is more common to use 
Q1 for both START and STOP and to limit Q2 to ramp discharge duties). 
Downsides are that negative time offsets cannot be measured directly, 
and the constant output voltage offers little room for increased 
precision through sample averaging, unless the ADC's input noise is 
large compared to its LSB size. For the same reason there is no easy 
way to reduce the effects of ADC INL/DNL.


- Circuit 2 works in a similar way, except that the ramp isn't 
terminated by a STOP signal but is allowed to run freely until I2 
saturates. The ADC is set to sample continuously, taking multiple 
samples of the ramp, and the microcontroller interpolates the 
resulting values to determine the elapsed time between an internal 
time reference point and the START signal.


This circuit is fairly simple, and has the advantage that there is no 
hard limit to its range. Curve-fitting the sampled values increases 
precision and reduces the effects of INL/DNL. On the other hand

Re: [time-nuts] On low-voltage TAC/TDCs for a GPSDO

2010-08-12 Thread Bruce Griffiths
Yes, with a 2MSPS ADC and 1-2us transition times one gets 2-4 samples 
during the transition.
Worst case with a 1us filter (10%-90%) output transition time there may 
be one sample at the midpoint and samples close to the 10% and 90% 
amplitude points.

2us transition times are probably close to optimum.
In the latter case the effective time stamp resolution (with a true 12 
bit ADC) will be around 0.5ns.


Ideally a gaussian impulse response filter should be used.
However if the input transitions are sufficiently (to allow the filter 
transients to settle) far apart almost any reasonable (without excessive 
overshoot) could be used.

The minicircuits LPF_BOR3+ low pass filter appears almost good enough.

Bruce

Bob Camp wrote:

Hi

Would't you want 2 or more samples during the transition?

Bob



On Aug 12, 2010, at 8:25 PM, Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:

   

Another method is to attenuate (to within the ADC input range) the PPS signal 
to be timestamped, low pass filter it and capture a 2MSPS sample burst centred 
around the low pass filter output transition midpoint.
You can then use WKS interpolation to time stamp the transition midpoint (when 
it crosses a threshold halfway between the initial and final values of the low 
pass filter output).
The low pass filter (preferably an LC filter) delay is easily calibrated by 
timestamping an internally generated signal initiated on a known ADC sampling 
clock edge.
No (external) current sources, reset switches etc are required.
With a 2MSPS sample rate a low pass filter output transition time of 1-2us 
should suffice (provided the ADC has a sufficiently large large signal 
bandwidth).

Bruce

Bruce Griffiths wrote:
 

Some options:

1) Use a 74AHC05 for Q1 and Q2.

2) Switch the current source at the emitter node and only turn on the current 
source when charging the capacitor.
This will increase the available TAC output voltage range and/or improve the 
linearity by eliminating the diode.
However the capacitor discharge switch should be turned off before charging the 
capacitor.
A stable fixed delay of a few (10ns??) before switching on the current source 
is required.

3) Replace the current source with a resistor.
The resultant nonlinearity is well defined and software correction should be 
relatively easy.

4) If the ADC(s) have a sufficiently wide full power bandwidth then one could 
just sample a pair of quadrature phased 250kHz sinewaves.
Extend the range by sampling (synchronise the input sampling edge to the 
counter clock first) a counter clocked at 250KHz.
Initiate the sampling with the signal edge to be time stamped.

If the GPSDO is used to clock the microprocessor, counters and produce the 
quadrature sinewave outputs then only a single TDC (time to digital converter) 
is required.

Measuring negative time intervals should not be necessary as the TAC (or other 
TDC) should be used merely to measure the delay of a synchroniser the output of 
which is used to synchronously sample a counter clocked with the same clock as 
the synchroniser.


J.D. Bakker wrote:
   

Hello all,

I'm working on Yet Another DIY GPSDO, and one of the issues I've been looking 
into is a TAC/TDC to do sawtooth correction on the measurement of the GPS PPS 
signal. I'd like to stick with a 3.3V supply for most of the circuit, and 
several of the TAC designs that have been discussed here in the past run into 
trouble at such low voltages (mostly through VBE drops).

To start with the context: I'm planning to use a microcontroller with a built-in 
dual 12-bit 2MSPS ADC. I'd like to not use anything that's not available at 
Digi-Key or Mouser, and keep the SMD pitch=0.8mm (with a possible exception 
for dual transistors in SOT-23-6). That way the design shouldn't be too hard for 
others to replicate.

I'm aiming for a TAC accuracy of 1ns, allowing for one or a few calibrations 
between PPS pulses. Minimum full-scale range should be +/- a few hundred ns, to 
allow for outliers. (The plan is to have an initial FLL for coarse locking, and 
have the PLL kick in after that). I'm penciling in an ADC reference voltage of 
2V, as that's commonly available and leaves enough headroom to use the current 
sources in their most linear range.

I've attached a diagram that reflects a few of my current thoughts.

- Circuit 1 is the traditional TAC. Before the start of the cycle Q2 conducts, 
discharging C1 and shunting I1's current to ground. At this point the ADC can 
measure the voltage drop across C1/Q2 to eliminate that offset. Taking nSTART 
low puts Q2 into high-impedance, and I1 charges C1 through D1 until STOP is 
raised causing Q1 to shunt I1's current to ground. At this point the ADC 
samples the voltage across C1, which is proportional to the time between START 
and STOP (modulo offset and nonlinearities).

This circuit is well known to work (although it is more common to use Q1 for 
both START and STOP and to limit Q2 to ramp discharge duties

Re: [time-nuts] Regulating a pendulum clock

2010-08-09 Thread Bruce Griffiths

Advisable given the required mass will probably be in the 10-100 ton range.

Bruce

J. L. Trantham, M. D. wrote:

Personally, I would get out of the way.  : )

Joe

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com]on
Behalf Of Ian Sheffield
Sent: Monday, August 09, 2010 1:17 PM
To: j...@quik.com; 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Regulating a pendulum clock

What happens when the rope breaks?

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of J. Forster
Sent: 09 August 2010 19:10
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Regulating a pendulum clock

You could put a large mass of concrete or somehing above the clock and
crank it up and down, to balance out the computed gravity changes.

:)

-John

==


   

Unfortunately Gravity is not constant. Pendulum clocks show cyclic errors
due to the influences of the Moon's and Sun's Gravitational fields. I
forget
the amounts but it is in the region of parts in 10 to the 7, which is
easily
measurable.

This limits the compensations one can put into a pendulum clock.


-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of mike cook
Sent: 09 August 2010 18:21
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Regulating a pendulum clock



Le 09/08/2010 18:46, Bob Holmstrom a écrit :
 

Food for thought.

I find it interesting that no one has suggested alternatives to
improving the performance of a pendulum clock other than controlling
it with a higher performance clock.  If the goal is a better clock why
not attempt to understand the source of the errors and work on methods
to control or compensate for them?  Teddy Hall has been taken to task
for using a quartz controlled oscillator to measure the amplitude of a
pendulum in the control loop of his Littlemore clock.

Tom Van Baak has developed techniques for analyzing the performance
and hence potential error sources of pendulum clocks - perhaps he will
share some of his work here.

Horological history is full of many attempts at solutions to the
problem, but it would seem that the creativity of this group might
generate some new ideas that are more in the spirit of better
timekeeping than attaching the pendulum to a better oscillator.

How about a wireless controlled device attached to the pendulum that
changes its position based on error sensor readings, not time errors,
but instead, temperature, barometric pressure, gravity, etc. that
would maintain a more constant pendulum period?
   

Yup. We have temperature and pressure ICs available , I think that
gravity is pretty constant if the clock isn't being moved about.
Humididty might also need logging aswell. So it should be easy enough to
predict the pendulums response to changes given a reasonable time of
observation.
   That said, clocks have always been adjusted against better
references.. IIRC Harrison (and probably others) was using star transits
to regulate his long case clocks.
 

Bob Holmström
Editor
Horological Science Newsletter
www.hsn161.com
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Re: [time-nuts] Regulating a pendulum clock

2010-08-08 Thread Bruce Griffiths
The attached single ended inverting driver is perhaps a better choice as 
it allows a dc coupled noniverting amplifier with gain and significant 
offset and drift to be substituted for the LT1010 buffer depicted if the 
frequency compensation is adjusted to suit.
The series RC across the coil damps the coil resonance and the 1nF caps 
approximate wiring and coil capacitance to ground.
A 10nF coil shunt capacitance and a series R of 400 ohms is included in 
the model.
In practice the compensation should be adjusted to suit the actual coil 
used.
A dc coupled discrete (or IC) audio power amplifier is one option for 
the noninverting amplifier.
The noninverting amplifier may also have higher supply rails should this 
be useful/necessary.


Bruce

Bruce Griffiths wrote:
A high voltage opamp (or a low voltage opamp with a discrete output 
stage with a voltage gain of at least 2) with -3V and + 30V supplies 
is perhaps the simplest method.
The opamp merely senses the current flowing in a current sensing 
resistor and regulates this voltage drop to equal the output of a DAC.


Alternatively it should be feasible to use a pair of opamps (plus 
output buffers) configured in a bridge arrangement to drive the coil 
from a single 30V supply.
If one end of the coil has to remain near ground then a unity gain 
difference amplifier (with a discrete buffer with voltage gain) could 
be employed to implement a current source.
A difference amplifier could also be employed together with an opamp 
(plus unity voltage gain discrete ouput stage) inverter to drive the 
coil from a single 30V supply.


Bruce

J. Forster wrote:

Since it's inside a closed loop, the design is uncritical.

One option is a high voltage Op-Amp with +/- 25 to 30 VDC supplies. You
would set the OA gain to about 10, so 2.5 V in would yield 25 V out. and
sum in a negative offset voltage so that +2.5 from the DAC yields 0.0 V
out. I'd use something like a 100 K FB resistor and a 10K from the DAC,
assuming it's a voltage output DAC. A 1 M to the -25 V supply would
provide the 2.5 V offset.

Another option would be to use two series opamps with the first set 
up as
above, and the second as a unity gain inverter with input connected 
to the
output of the first. The coil would connect between the two OA 
outputs. As
one output swings high, the other mirrors that and goes low (just as 
in an
H bridge). Stability might be an issue, but this has the advantage of 
only

needing a +/- 15 supplies.

FWIW,

-John

=





Hi all,

I have a Seimens master clock with a Reiffler pendulum. A lovely piece
of work that used to provide time services in the 40s.

Being a master clock it has contacts that open and close on each
pendulum swing and so I can monitor it's accuracy quite easily using
gps and my 5370B.

I've adjusted it as best I can and the best I can get is about 50 ms
over 24 hours. However that was a one off. Temp and air pressure cause
variations of up to 300 ms and it changes direction too. Basically
it's hard to keep accurate.

It also has a coil mounted near the pendulum and a fixed magnet on the
pendulum bar and this coil connects to a box down below with a meter
and a knob. They are labelled in sec/day. The electronics in the box
are not clear (being quite old) but by measuring the current in the
coil it quite simply increases the current one way to slow the clock
and the other way to speed it up. (I'll admit the physics of this
doesn't make sense to me - but it works!)

It's about 25v in the coil and goes up to 60mA max. Even at levels of
2mA has an effect.

Using this control it's quite easy to manually bring the clock back to
the right time if it's say half a second fast.

What I want to do is control the current in the coil with a micro
controller which I have attached to a rubidium oscillator. Getting the
pps from the pendulum clock in and comparing to actual time is easy,
but I need a way to control the current through the coil so it can
dynamically adjust the clock.

I need the current to go from say -10 to +10 mA (at 25v) and this
needs to be controlled via a micro controller output (which goes from
0 to 5 with 2.5 being the 0mA point).

I can either use the D/A in the controller (or PWM an output I 
suppose).


I'd appreciate some thoughts on circuits to do this. Software side is
not a problem.

Jim Palfreyman

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Re: [time-nuts] Regulating a pendulum clock

2010-08-08 Thread Bruce Griffiths

J. Forster wrote:

You are picking very unimportant nits.

If there were a small noise spike from the opamp, it'd goose the pendulum
a tiny amount. That would be corrected on the next swing.


Heuristic analysis of this type is counter productive.


You are turning a trip to the corner store into an Apollo Moon Mission.

Reliability is paramount in a circuit that may be required to work for 
decades.



BTW, since the =drive does not to be bipolar, one of the NPN and PNP
transistors can be deleted. They never turn on. So you are left with two
opamsa, =each with a simple emitter follower.


The original request was for a bipolar drive.
The lack of short circuit protection is poor design practice when 
driving an external load.



-John

==



Bruce


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Re: [time-nuts] Regulating a pendulum clock

2010-08-08 Thread Bruce Griffiths

No protection against external shorts or other undesired events.
Extensive analog filtering to avoid creating an effective radiator of 
noise may also be necessary.
Simple analog techniques are probably simpler/cheaper once the necessary 
filtering and protection are included.


Bruce

Don Latham wrote:

Hmmm lemme see. I think I'd use a 12 volt supply and two transistors
driven by two outputs on my Arduino,basic stamp,picaxe or other whizzie.
I'd then implement a PID controller essentially using the 1 sec pulse from
the pendulum and the 1 sec pulse from my Rb, satellite receiver, crystal
clock, or whatever. The appropriate output pin will be brought to ground,
and the other driven as a pdf with the rate given by the pid loop.
Temperature and even pressure corrections can be applied within the gizzie
software. External parts, minimum. Opportunity to play with tuning,
maximum.
Don

Bruce Griffiths
   

J. Forster wrote:
 

You are picking very unimportant nits.

If there were a small noise spike from the opamp, it'd goose the
pendulum
a tiny amount. That would be corrected on the next swing.

   

Heuristic analysis of this type is counter productive.

 

You are turning a trip to the corner store into an Apollo Moon Mission.

   

Reliability is paramount in a circuit that may be required to work for
decades.

 

BTW, since the =drive does not to be bipolar, one of the NPN and PNP
transistors can be deleted. They never turn on. So you are left with two
opamsa, =each with a simple emitter follower.

   

The original request was for a bipolar drive.
The lack of short circuit protection is poor design practice when
driving an external load.

 

-John

==

   

Bruce


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Re: [time-nuts] Regulating a pendulum clock

2010-08-08 Thread Bruce Griffiths
Mere fast blow fuses aren't usually precise enough to protect 
transistors against over current unless one uses rather large transistors.

Overcurrent protected drivers are available and readily designed/built.
Protection against di/dt transients due to external events is also 
advisable.


Minimising the parts count isn't necessarily conducive to improved 
reliability when external hazards aren't taken into account.


Merely resonating the coil without other filtering doesnt necessarily 
lead to low EMI when driving it with a voltage waveform having high edge 
slew rates.
Some edge filtering to control the current flowing in the load 
capacitance is also advisable.


Bruce


Don Latham wrote:

fast blow fuse, resonate the coil to the pwm frequency. Parts count small,
tinkering in software instead of breathing lead fumes or whatever noxious
stuff the Europeans have forced us to use...
Don

Bruce Griffiths
   

No protection against external shorts or other undesired events.
Extensive analog filtering to avoid creating an effective radiator of
noise may also be necessary.
Simple analog techniques are probably simpler/cheaper once the necessary
filtering and protection are included.

Bruce

Don Latham wrote:
 

Hmmm lemme see. I think I'd use a 12 volt supply and two transistors
driven by two outputs on my Arduino,basic stamp,picaxe or other whizzie.
I'd then implement a PID controller essentially using the 1 sec pulse
from
the pendulum and the 1 sec pulse from my Rb, satellite receiver, crystal
clock, or whatever. The appropriate output pin will be brought to
ground,
and the other driven as a pdf with the rate given by the pid loop.
Temperature and even pressure corrections can be applied within the
gizzie
software. External parts, minimum. Opportunity to play with tuning,
maximum.
Don

Bruce Griffiths

   

J. Forster wrote:

 

You are picking very unimportant nits.

If there were a small noise spike from the opamp, it'd goose the
pendulum
a tiny amount. That would be corrected on the next swing.


   

Heuristic analysis of this type is counter productive.


 

You are turning a trip to the corner store into an Apollo Moon
Mission.


   

Reliability is paramount in a circuit that may be required to work for
decades.


 

BTW, since the =drive does not to be bipolar, one of the NPN and PNP
transistors can be deleted. They never turn on. So you are left with
two
opamsa, =each with a simple emitter follower.


   

The original request was for a bipolar drive.
The lack of short circuit protection is poor design practice when
driving an external load.


 

-John

==


   

Bruce


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Re: [time-nuts] Regulating a pendulum clock

2010-08-07 Thread Bruce Griffiths
A high voltage opamp (or a low voltage opamp with a discrete output 
stage with a voltage gain of at least 2) with -3V and + 30V supplies is 
perhaps the simplest method.
The opamp merely senses the current flowing in a current sensing 
resistor and regulates this voltage drop to equal the output of a DAC.


Alternatively it should be feasible to use a pair of opamps (plus output 
buffers) configured in a bridge arrangement to drive the coil from a 
single 30V supply.
If one end of the coil has to remain near ground then a unity gain 
difference amplifier (with a discrete buffer with voltage gain) could be 
employed to implement a current source.
A difference amplifier could also be employed together with an opamp 
(plus unity voltage gain discrete ouput stage) inverter to drive the 
coil from a single 30V supply.


Bruce

Jim Palfreyman wrote:

Hi all,

I have a Seimens master clock with a Reiffler pendulum. A lovely piece
of work that used to provide time services in the 40s.

Being a master clock it has contacts that open and close on each
pendulum swing and so I can monitor it's accuracy quite easily using
gps and my 5370B.

I've adjusted it as best I can and the best I can get is about 50 ms
over 24 hours. However that was a one off. Temp and air pressure cause
variations of up to 300 ms and it changes direction too. Basically
it's hard to keep accurate.

It also has a coil mounted near the pendulum and a fixed magnet on the
pendulum bar and this coil connects to a box down below with a meter
and a knob. They are labelled in sec/day. The electronics in the box
are not clear (being quite old) but by measuring the current in the
coil it quite simply increases the current one way to slow the clock
and the other way to speed it up. (I'll admit the physics of this
doesn't make sense to me - but it works!)

It's about 25v in the coil and goes up to 60mA max. Even at levels of
2mA has an effect.

Using this control it's quite easy to manually bring the clock back to
the right time if it's say half a second fast.

What I want to do is control the current in the coil with a micro
controller which I have attached to a rubidium oscillator. Getting the
pps from the pendulum clock in and comparing to actual time is easy,
but I need a way to control the current through the coil so it can
dynamically adjust the clock.

I need the current to go from say -10 to +10 mA (at 25v) and this
needs to be controlled via a micro controller output (which goes from
0 to 5 with 2.5 being the 0mA point).

I can either use the D/A in the controller (or PWM an output I suppose).

I'd appreciate some thoughts on circuits to do this. Software side is
not a problem.

Jim Palfreyman

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Re: [time-nuts] Regulating a pendulum clock

2010-08-07 Thread Bruce Griffiths
The 60mA load current would be problematic for most common opamps 
without an output buffer stage.

High voltage opamps are relatively rare.

Bruce


J. Forster wrote:

Since it's inside a closed loop, the design is uncritical.

One option is a high voltage Op-Amp with +/- 25 to 30 VDC supplies. You
would set the OA gain to about 10, so 2.5 V in would yield 25 V out. and
sum in a negative offset voltage so that +2.5 from the DAC yields 0.0 V
out. I'd use something like a 100 K FB resistor and a 10K from the DAC,
assuming it's a voltage output DAC. A 1 M to the -25 V supply would
provide the 2.5 V offset.

Another option would be to use two series opamps with the first set up as
above, and the second as a unity gain inverter with input connected to the
output of the first. The coil would connect between the two OA outputs. As
one output swings high, the other mirrors that and goes low (just as in an
H bridge). Stability might be an issue, but this has the advantage of only
needing a +/- 15 supplies.

FWIW,

-John

=




   

Hi all,

I have a Seimens master clock with a Reiffler pendulum. A lovely piece
of work that used to provide time services in the 40s.

Being a master clock it has contacts that open and close on each
pendulum swing and so I can monitor it's accuracy quite easily using
gps and my 5370B.

I've adjusted it as best I can and the best I can get is about 50 ms
over 24 hours. However that was a one off. Temp and air pressure cause
variations of up to 300 ms and it changes direction too. Basically
it's hard to keep accurate.

It also has a coil mounted near the pendulum and a fixed magnet on the
pendulum bar and this coil connects to a box down below with a meter
and a knob. They are labelled in sec/day. The electronics in the box
are not clear (being quite old) but by measuring the current in the
coil it quite simply increases the current one way to slow the clock
and the other way to speed it up. (I'll admit the physics of this
doesn't make sense to me - but it works!)

It's about 25v in the coil and goes up to 60mA max. Even at levels of
2mA has an effect.

Using this control it's quite easy to manually bring the clock back to
the right time if it's say half a second fast.

What I want to do is control the current in the coil with a micro
controller which I have attached to a rubidium oscillator. Getting the
pps from the pendulum clock in and comparing to actual time is easy,
but I need a way to control the current through the coil so it can
dynamically adjust the clock.

I need the current to go from say -10 to +10 mA (at 25v) and this
needs to be controlled via a micro controller output (which goes from
0 to 5 with 2.5 being the 0mA point).

I can either use the D/A in the controller (or PWM an output I suppose).

I'd appreciate some thoughts on circuits to do this. Software side is
not a problem.

Jim Palfreyman

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Re: [time-nuts] Regulating a pendulum clock

2010-08-07 Thread Bruce Griffiths
A high voltage opamp (or a low voltage opamp with a discrete output 
stage with a voltage gain of at least 2) with -3V and + 30V supplies is 
perhaps the simplest method.
The opamp merely senses the current flowing in a current sensing 
resistor and regulates this voltage drop to equal the output of a DAC.


Alternatively it should be feasible to use a pair of opamps (plus output 
buffers) configured in a bridge arrangement to drive the coil from a 
single 30V supply.
If one end of the coil has to remain near ground then a unity gain 
difference amplifier (with a discrete buffer with voltage gain) could be 
employed to implement a current source.
A difference amplifier could also be employed together with an opamp 
(plus unity voltage gain discrete ouput stage) inverter to drive the 
coil from a single 30V supply.


Bruce

J. Forster wrote:

Since it's inside a closed loop, the design is uncritical.

One option is a high voltage Op-Amp with +/- 25 to 30 VDC supplies. You
would set the OA gain to about 10, so 2.5 V in would yield 25 V out. and
sum in a negative offset voltage so that +2.5 from the DAC yields 0.0 V
out. I'd use something like a 100 K FB resistor and a 10K from the DAC,
assuming it's a voltage output DAC. A 1 M to the -25 V supply would
provide the 2.5 V offset.

Another option would be to use two series opamps with the first set up as
above, and the second as a unity gain inverter with input connected to the
output of the first. The coil would connect between the two OA outputs. As
one output swings high, the other mirrors that and goes low (just as in an
H bridge). Stability might be an issue, but this has the advantage of only
needing a +/- 15 supplies.

FWIW,

-John

=




   

Hi all,

I have a Seimens master clock with a Reiffler pendulum. A lovely piece
of work that used to provide time services in the 40s.

Being a master clock it has contacts that open and close on each
pendulum swing and so I can monitor it's accuracy quite easily using
gps and my 5370B.

I've adjusted it as best I can and the best I can get is about 50 ms
over 24 hours. However that was a one off. Temp and air pressure cause
variations of up to 300 ms and it changes direction too. Basically
it's hard to keep accurate.

It also has a coil mounted near the pendulum and a fixed magnet on the
pendulum bar and this coil connects to a box down below with a meter
and a knob. They are labelled in sec/day. The electronics in the box
are not clear (being quite old) but by measuring the current in the
coil it quite simply increases the current one way to slow the clock
and the other way to speed it up. (I'll admit the physics of this
doesn't make sense to me - but it works!)

It's about 25v in the coil and goes up to 60mA max. Even at levels of
2mA has an effect.

Using this control it's quite easy to manually bring the clock back to
the right time if it's say half a second fast.

What I want to do is control the current in the coil with a micro
controller which I have attached to a rubidium oscillator. Getting the
pps from the pendulum clock in and comparing to actual time is easy,
but I need a way to control the current through the coil so it can
dynamically adjust the clock.

I need the current to go from say -10 to +10 mA (at 25v) and this
needs to be controlled via a micro controller output (which goes from
0 to 5 with 2.5 being the 0mA point).

I can either use the D/A in the controller (or PWM an output I suppose).

I'd appreciate some thoughts on circuits to do this. Software side is
not a problem.

Jim Palfreyman

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Re: [time-nuts] Regulating a pendulum clock

2010-08-07 Thread Bruce Griffiths

J. Forster wrote:

OK. You know better.

BTW, op-amp noise is essentially irrelevant in this application, and the
C's across the FB resistors limit slew rates so there is no significant
dI/dt to cause voltage spikes.

   

Noise is never irrelevant.
You havent shown that its insignificant either.

In the real world such dv/dt assumptions with inductive loads lead to 
fried parts.
For example if the circuit oscillates at high frequency because the 
compensation isnt  correct/effective or the feedback wire becomes 
detached or the power supply goes down suddently due to a crowbar event 
then high dv/dt at the opamp/buffer output is possible.




-John



   


Bruce
   

Your naive stabilisation scheme wont work, try simulating it.
741's are somewhat noisier than necessary.
Omitting the diodes with an inductive load almost inevitably leads to
 

transistor or opamp destruction.
   

Bruce

J. Forster wrote:
 

IMO, far too complicated.

I'd use a series pair of u741s each with a complementary emitter follower.
2 u741s, 2x 2N2102, 2x 2N4036, 5 resistors. Maybe 2x .01 caos to stabilize
the thing
 -
   |\| |---|c
DAC --o--| \ |   |\  2N2102
|  | / --o-o |--C
R  |/| |   |/  2N4036
||   | |---|c
||
||
|o-to input of mirror image

Best,

-J

=




   

The attached circuit schematic illustrates the Howland current source
 

plus inverting amplifier drive technique.
   

It also illustrates a method of frequency compensation (series RC
 

connected across the coil).
   

Of course one can either use discrete buffers or high current opamps.
 

However for improved accuracy using a difference amplifier with built
in
   

pretrimmed resistors for the Howland current source may be preferable,
 

in which case a discrete buffer stage or equivalent may be required.
   

Bruce

J. Forster wrote:

 

There are cheap, split supply audio amp ICs that'd work, or you could
   

use
   

a u741 with a complementary-symmetry output buffer of discrete
   

transistors.
   

Crossover distortion would be essentially irrelevant, keeping the parts
count very low.

-John







   

The 60mA load current would be problematic for most common opamps
 

without an output buffer stage.
   

High voltage opamps are relatively rare.

Bruce


J. Forster wrote:


 

Since it's inside a closed loop, the design is uncritical.

One option is a high voltage Op-Amp with +/- 25 to 30 VDC supplies.
   

You
   

would set the OA gain to about 10, so 2.5 V in would yield 25 V
   

out. and
   

sum in a negative offset voltage so that +2.5 from the DAC yields 0.0
V
out. I'd use something like a 100 K FB resistor and a 10K from the
   

DAC,
   

assuming it's a voltage output DAC. A 1 M to the -25 V supply would
   

provide the 2.5 V offset.
   

Another option would be to use two series opamps with the first set up
as
above, and the second as a unity gain inverter with input connected to
the
output of the first. The coil would connect between the two OA
   

outputs.
   

As
one output swings high, the other mirrors that and goes low (just
   

as in
   

an
H bridge). Stability might be an issue, but this has the advantage of
only
needing a +/- 15 supplies.

FWIW,

-John

=







   

Hi all,

I have a Seimens master clock with a Reiffler pendulum. A lovely
 

piece
   

of work that used to provide time services in the 40s.

Being a master clock it has contacts that open and close on each
 

pendulum swing and so I can monitor it's accuracy quite easily
using
   

gps and my 5370B.

I've adjusted it as best I can and the best I can get is about 50 ms
over 24 hours. However that was a one off. Temp and air pressure
 

cause
   

variations of up to 300 ms and it changes direction too. Basically
 

it's hard to keep accurate.
   

It also has a coil mounted near the pendulum and a fixed magnet on
 

the
   

pendulum bar and this coil connects to a box down below with a meter
and a knob. They are labelled in sec/day. The electronics in the box
are not clear (being quite old) but by measuring the current in
 

the coil it quite simply increases the current one way to slow the
clock
   

and the other way to speed it up. (I'll admit the physics of this
 

doesn't make sense to me - but it works!)
   

It's about 25v in the coil and goes up to 60mA max. Even at levels of
2mA has an effect.

Using this control it's quite easy to manually bring the clock
 

back to
   


Re: [time-nuts] Buffer / distribution amplifier for TCXO

2010-08-04 Thread Bruce Griffiths

Henry Hallam wrote:

Dear time nuts,

Background:
I have built a GPS receiver based around the SE4120L front end IC [1].
  I used a KT3225 TCXO [2] at 16.3676MHz driving the front end through
a 10nF series capacitor as in the example circuit in [1].  Inside the
front end, this oscillator is multiplied up to form a local oscillator
at 1571.2896 MHz.  The 16.3676MHz signal is also divided to form a
4.0919MHz sampling clock.  Digital I and Q samples then go to a DSP
where the GPS signal processing is done in software.  My receiver
works nicely, getting it online was a boatload of fun and I'm hoping
to make it available soon along with open-source software as a GPS
experimenter's kit.

Problem:
I'd like to clock multiple receivers from a single 16.3676MHz
oscillator, in order to combine measurements from multiple antennas.
The clocks must be at the same frequency, i.e. from the same source,
but it is not necessary that they have any particular phase
relationship as phase offsets are removed in the navigation
processing.

What sort of distribution amplifier should I use to split the output
of one TCXO into four front ends?  Do I need some kind of impedance
matching network?  How would I go about designing that?  This sort of
analog/RF design is unfamiliar territory for me, though I'd like to
learn.

The TCXO advertises a minimum output level of 0.8Vpp into (10kohm in
parallel with 10pF).  The front end requires a minimum oscillator
drive level of 0.2Vpp.  The front end datasheet lists recommended
crystal parameters including a load capacitance of 10pF (typ),
although I don't know whether or not that refers to the front end
input capacitance.

My guess is that phase noise performance is not particularly crucial,
at least by time-nuts standards.  I guess it would be nice if the
amplifier didn't make the phase noise significantly worse than it
already is from the cheap TCXO.

Many thanks,
Henry Hallam

[1] 
http://www.sige.com/support/download-form.html?dl=DST-00059_SE4120L_Datasheet_Rev_3p5_CYW_May-26-2009.pdf
[2] http://global.kyocera.com/prdct/electro/pdf/tcxo/172_e.pdf

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The TCXO output waveform is presumably a clipped sinewave as required by 
the SE4120L?


In which case a linear distribution amplifier is probably required.

With only a ~3V supply available, options for the distribution amplifier 
topology are somewhat limited.
In principle you could use an emitter follower driving 4 other emitter 
followers with a resistor in series with the emitters of the output 
devices and the AC coupled loads to match the source to the 
interconnecting cable impedance to minimise reflections without 
requiring excessive dissipation in the emitter followers.
With the low voltage supply available, using an RF choke is series with 
the emitter follower's emitter to ground resistor will also be useful in 
achieving the required dynamic range.


Bruce


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Re: [time-nuts] Buffer / distribution amplifier for TCXO

2010-08-04 Thread Bruce Griffiths
The GPS receiver chip actually specifies that a clipped sinewave should 
be used.

Presumably this is necessary to limit the harmonic contents.
In which case low pass filtering the CMOS outputs may be necessary.
The 74AHC04 or equivalent may be a better choice as its ground and Vcc 
bounce is lower than that of a 74AC04.


Bruce

Bob Camp wrote:

Hi

I suspect you will find that the phase noise floor of the distribution 
system does indeed matter.


Likely the easy way to go:

Square the TCXO up with a biased CMOS inverter (at least as fast as a 
74AC04). Run a seperate inverter to drive each of the receivers. A hex 
inverter chip would do it all quite nicely. There should be plenty of 
isolation and far more signal than is needed. Attenuating it at the 
receiver with a pair of resistors should get all the levels to match 
up. If you want to get fancy, transformer couple into each receiver 
after attenuating.


Bob

--
From: Henry Hallam he...@pericynthion.org
Sent: Wednesday, August 04, 2010 1:46 PM
To: Discussion of precise time and frequency measurement 
time-nuts@febo.com

Subject: [time-nuts] Buffer / distribution amplifier for TCXO


Dear time nuts,

Background:
I have built a GPS receiver based around the SE4120L front end IC [1].
I used a KT3225 TCXO [2] at 16.3676MHz driving the front end through
a 10nF series capacitor as in the example circuit in [1].  Inside the
front end, this oscillator is multiplied up to form a local oscillator
at 1571.2896 MHz.  The 16.3676MHz signal is also divided to form a
4.0919MHz sampling clock.  Digital I and Q samples then go to a DSP
where the GPS signal processing is done in software.  My receiver
works nicely, getting it online was a boatload of fun and I'm hoping
to make it available soon along with open-source software as a GPS
experimenter's kit.

Problem:
I'd like to clock multiple receivers from a single 16.3676MHz
oscillator, in order to combine measurements from multiple antennas.
The clocks must be at the same frequency, i.e. from the same source,
but it is not necessary that they have any particular phase
relationship as phase offsets are removed in the navigation
processing.

What sort of distribution amplifier should I use to split the output
of one TCXO into four front ends?  Do I need some kind of impedance
matching network?  How would I go about designing that?  This sort of
analog/RF design is unfamiliar territory for me, though I'd like to
learn.

The TCXO advertises a minimum output level of 0.8Vpp into (10kohm in
parallel with 10pF).  The front end requires a minimum oscillator
drive level of 0.2Vpp.  The front end datasheet lists recommended
crystal parameters including a load capacitance of 10pF (typ),
although I don't know whether or not that refers to the front end
input capacitance.

My guess is that phase noise performance is not particularly crucial,
at least by time-nuts standards.  I guess it would be nice if the
amplifier didn't make the phase noise significantly worse than it
already is from the cheap TCXO.

Many thanks,
Henry Hallam

[1] 
http://www.sige.com/support/download-form.html?dl=DST-00059_SE4120L_Datasheet_Rev_3p5_CYW_May-26-2009.pdf 


[2] http://global.kyocera.com/prdct/electro/pdf/tcxo/172_e.pdf

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Re: [time-nuts] Buffer / distribution amplifier for TCXO

2010-08-04 Thread Bruce Griffiths

Henry Hallam wrote:

On Wed, Aug 4, 2010 at 1:50 PM, Bruce Griffiths
bruce.griffi...@xtra.co.nz  wrote:

   

The TCXO output waveform is presumably a clipped sinewave as required by the
SE4120L?
 

I posted the waveform at
http://www.pericynthion.org/stuff/KT3225_500mV_per_div.jpg
Does that count as clipped sine?  If not, it seems to work anyway.

   

Its something like a clipped sine albeit with some ringing as it is clipped.

It more closely resembles a low pass filtered square wave.



In which case a linear distribution amplifier is probably required.

With only a ~3V supply available, options for the distribution amplifier
topology are somewhat limited.
 

I'm making a custom board that will include the TCXO and distribution
amplifier (as well as some digital stuff to allow the 4 receivers to
communicate), so it can have whatever power supplies it needs.

   

In principle you could use an emitter follower driving 4 other emitter
followers with a resistor in series with the emitters of the output devices
and the AC coupled loads to match the source to the interconnecting cable
impedance to minimise reflections without requiring excessive dissipation in
the emitter followers.
With the low voltage supply available, using an RF choke is series with the
emitter follower's emitter to ground resistor will also be useful in
achieving the required dynamic range.
 

Thanks.


Henry

   

Bruce


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Re: [time-nuts] Buffer / distribution amplifier for TCXO

2010-08-04 Thread Bruce Griffiths
Is that also true for AHC devices which otherwise have similar 
characteristics (apart from ground bounce) to AC devices?


Bruce


Bob Camp wrote:

Hi

The phase noise floor of the HC is *much* higher than the floor of the AC 
gates. The main reason it specifies clipped sine is that's what the cheap 
TCXO's put out.

Bob


On Aug 4, 2010, at 6:42 PM, Bruce Griffiths wrote:

   

The GPS receiver chip actually specifies that a clipped sinewave should be used.
Presumably this is necessary to limit the harmonic contents.
In which case low pass filtering the CMOS outputs may be necessary.
The 74AHC04 or equivalent may be a better choice as its ground and Vcc bounce 
is lower than that of a 74AC04.

Bruce

Bob Camp wrote:
 

Hi

I suspect you will find that the phase noise floor of the distribution system 
does indeed matter.

Likely the easy way to go:

Square the TCXO up with a biased CMOS inverter (at least as fast as a 74AC04). 
Run a seperate inverter to drive each of the receivers. A hex inverter chip 
would do it all quite nicely. There should be plenty of isolation and far more 
signal than is needed. Attenuating it at the receiver with a pair of resistors 
should get all the levels to match up. If you want to get fancy, transformer 
couple into each receiver after attenuating.

Bob

--
From: Henry Hallamhe...@pericynthion.org
Sent: Wednesday, August 04, 2010 1:46 PM
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Subject: [time-nuts] Buffer / distribution amplifier for TCXO

   

Dear time nuts,

Background:
I have built a GPS receiver based around the SE4120L front end IC [1].
I used a KT3225 TCXO [2] at 16.3676MHz driving the front end through
a 10nF series capacitor as in the example circuit in [1].  Inside the
front end, this oscillator is multiplied up to form a local oscillator
at 1571.2896 MHz.  The 16.3676MHz signal is also divided to form a
4.0919MHz sampling clock.  Digital I and Q samples then go to a DSP
where the GPS signal processing is done in software.  My receiver
works nicely, getting it online was a boatload of fun and I'm hoping
to make it available soon along with open-source software as a GPS
experimenter's kit.

Problem:
I'd like to clock multiple receivers from a single 16.3676MHz
oscillator, in order to combine measurements from multiple antennas.
The clocks must be at the same frequency, i.e. from the same source,
but it is not necessary that they have any particular phase
relationship as phase offsets are removed in the navigation
processing.

What sort of distribution amplifier should I use to split the output
of one TCXO into four front ends?  Do I need some kind of impedance
matching network?  How would I go about designing that?  This sort of
analog/RF design is unfamiliar territory for me, though I'd like to
learn.

The TCXO advertises a minimum output level of 0.8Vpp into (10kohm in
parallel with 10pF).  The front end requires a minimum oscillator
drive level of 0.2Vpp.  The front end datasheet lists recommended
crystal parameters including a load capacitance of 10pF (typ),
although I don't know whether or not that refers to the front end
input capacitance.

My guess is that phase noise performance is not particularly crucial,
at least by time-nuts standards.  I guess it would be nice if the
amplifier didn't make the phase noise significantly worse than it
already is from the cheap TCXO.

Many thanks,
Henry Hallam

[1] 
http://www.sige.com/support/download-form.html?dl=DST-00059_SE4120L_Datasheet_Rev_3p5_CYW_May-26-2009.pdf
[2] http://global.kyocera.com/prdct/electro/pdf/tcxo/172_e.pdf

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Re: [time-nuts] Buffer / distribution amplifier for TCXO

2010-08-04 Thread Bruce Griffiths

Bruce Griffiths wrote:


In which case a linear distribution amplifier is probably required.

With only a ~3V supply available, options for the distribution 
amplifier topology are somewhat limited.
In principle you could use an emitter follower driving 4 other emitter 
followers with a resistor in series with the emitters of the output 
devices and the AC coupled loads to match the source to the 
interconnecting cable impedance to minimise reflections without 
requiring excessive dissipation in the emitter followers.
With the low voltage supply available, using an RF choke is series 
with the emitter follower's emitter to ground resistor will also be 
useful in achieving the required dynamic range.


Bruce


A more efficient buffer amplifier circuit schematic is attached.

The series transformer feedback stage has high input impedance and an 
output impedance matched to the transmission line (yes it works well 
with long transmission lines as well).

However a trifilar wound RF transformer is required.

In principle the various GPS receivers could be connected to taps along 
an end terminated transmission line using feedthrough connections with 
compensation for the tap shunt capacitance  if necessary.


A lower impedance line (eg 50 ohms) could also be driven at the expense 
of a higher collector current.
In this case the value of R3 would need to be reduced to around 100 ohms 
or so.


Bruce
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Re: [time-nuts] buffer amp transformers...

2010-08-04 Thread Bruce Griffiths
For this application you'll need a bandwidth of somewhat more than 10MHz 
to preserve the clock slew rate.

Those transformers are better suited to sinewave operation at 5 or 10MHz.

If one uses a pair of transformers (one for the feedback and one to 
isolate the output) then wider bandwidth 1:1 transformers can be used.

Or one could just elect to capacitively couple the load.

Alternatively one can just wind one's own trifilar transformer using a 
suitable binocular ferrite core.


Bruce

Henry Hallam wrote:

The spec sheet lists them as being good to 10MHz; would they be ok at
16MHz with a little more loss, or should I worry about resonances with
parasitic capacitance?

73 de Henry M0HMH in Santa Cruz

On Wed, Aug 4, 2010 at 9:14 PM,k6...@comcast.net  wrote:
   

I think I'm a time-nut; as symptoms I include (1) a lot of Mini-Circuits parts 
on my bench, (2) searches on eBay for Mini-Circuits goodies, and (3) the desire 
to know how my LPRO, 10811, and Thunderbolt are different, and how much better 
a Thunderbolt would be with a 10811 double-oven in it...

Anyway, here's an eBay auction for 25 T-626 1:1:1 transformers -- item number: 
220544907085
http://cgi.ebay.com/25-Mini-Circuits-T-626-RF-Transformers-0-01-10-MHz-/220544907085?cmd=ViewItempt=LH_DefaultDomain_0hash=item335980374d

which look like just the thing for this amp...

73 de bob k6rtm in silicon valley


-
Message: 4
Date: Thu, 05 Aug 2010 10:05:39 +1200
From: Bruce Griffithsbruce.griffi...@xtra.co.nz
Subject: Re: [time-nuts] Buffer / distribution amplifier for TCXO
To: Discussion of precise time and frequency measurement
time-nuts@febo.com
Message-ID:4c59e433.6000...@xtra.co.nz
Content-Type: text/plain; charset=iso-8859-1; Format=flowed

Bruce Griffiths wrote:
 

In which case a linear distribution amplifier is probably required.

With only a ~3V supply available, options for the distribution
amplifier topology are somewhat limited.
In principle you could use an emitter follower driving 4 other emitter
followers with a resistor in series with the emitters of the output
devices and the AC coupled loads to match the source to the
interconnecting cable impedance to minimise reflections without
requiring excessive dissipation in the emitter followers.
With the low voltage supply available, using an RF choke is series
with the emitter follower's emitter to ground resistor will also be
useful in achieving the required dynamic range.

Bruce
   

A more efficient buffer amplifier circuit schematic is attached.

The series transformer feedback stage has high input impedance and an
output impedance matched to the transmission line (yes it works well
with long transmission lines as well).
However a trifilar wound RF transformer is required.

In principle the various GPS receivers could be connected to taps along
an end terminated transmission line using feedthrough connections with
compensation for the tap shunt capacitance if necessary.

A lower impedance line (eg 50 ohms) could also be driven at the expense
of a higher collector current.
In this case the value of R3 would need to be reduced to around 100 ohms
or so.

Bruce
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Re: [time-nuts] Updated Shera controller

2010-07-29 Thread Bruce Griffiths
You can't predict the settling time of an opamp from its slew rate or 
its gain-bandwidth product.

The TS272 datasheet has no settling time spec whatsoever.
In this case, since there is no spec it needs to be measured.
Opamps with 2 or more cascaded gain stages like these are notorious for 
poor settling times.

10us is merely guesswork.
The settling time could well be much longer and it may depend on the 
input signal level.


Bruce



Richard H McCorkle wrote:

FYI,
The TS272/TS274 have a slew rate of 5.5v/us at unity gain, the max
voltage on the cap is 2.7v in the new design, and the voltage is read
  10us after sample complete, so the buffer should have time to
stabilize after the sample before being read.

Richard


Bruce wrote:
   

Not really its both overkill as it doesnt timestamp, it only measures a
time interval and underkill in that theres no DAC.
There are also some concerns about the settling time of the TAC buffer
opamp which isnt strictly necessary for the lower resolution required in
this application.
PPS timestamping only needs a single TAC.

Bruce



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Re: [time-nuts] Updated Shera controller

2010-07-28 Thread Bruce Griffiths
Instead of copying the Shera controller albeit with higher resolution 
its probably more cost effective to choose a microprocessor with built 
in time stamping capability.
The PIC24FJ128GA for example allows 30ns timestamping resolution via its 
external timer capture inputs.
Other microprocessors (or DSPs) are available with even higher 
timestamping resolution.
Since modern GPS timing receivers can have a timing noise of a few ns 
(after sawtooth correction) it may also be useful to use a simple time 
to digital converter (eg TAC + ADC) to achieve a resolution of 1ns or so.
Several microprocessors have built in ADCs with sufficient resolution 
and low leakage to allow trimpots, external buffer opamps etc to be 
dispensed with.

The trimpots being replaced by interleaved software calibration.
The microprocessor initiates a TAC calibration cycle after each external 
PPS event is timestamped.
The resultant sequence of calibration coefficients can then be filtered 
and used to correct the PPS fine time stamp sequence.
If the microprocessor also has a couple of PWM outputs then these can be 
used to implement a high resolution synchronously filtered DAC
The synchronously filtered DAC requires a stable reference, a couple of 
opamps, a few analog switches plus a few resistors and capacitors.
Neither the resistors or capacitors need to be extremely close tolerance 
parts.


Bruce

ewkeh...@aol.com wrote:

What could you help with?   Bert


In a message dated 7/28/2010 3:05:26 P.M. Eastern Daylight Time,
wpxs...@gmail.com writes:

Bert,
I for one, would be interested in  that.

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Re: [time-nuts] Updated Shera controller

2010-07-28 Thread Bruce Griffiths

ewkeh...@aol.com wrote:

One more comment $ 40 would cover every thing including PC board, May go up
  to 50 depending what D/A you use.  Bert


In a message dated 7/28/2010 4:47:46 P.M. Eastern Daylight Time,
p...@phk.freebsd.dk writes:

In  message4c5092fa.2030...@xtra.co.nz, Bruce Griffiths  writes:

   

Instead of copying the Shera controller albeit with higher  resolution
its probably more cost effective to choose a microprocessor  with built
in time stamping capability.
 

Uhm, isn't this exactly  where you want to use the
still-smelling-like-brand-new-car PICTIC II with  a good DAC and
a microcontroller ?

   
Not really its both overkill as it doesnt timestamp, it only measures a 
time interval and underkill in that theres no DAC.
There are also some concerns about the settling time of the TAC buffer 
opamp which isnt strictly necessary for the lower resolution required in 
this application.

PPS timestamping only needs a single TAC.

Bruce



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Re: [time-nuts] Basic question regarding comparing two frequencies

2010-07-26 Thread Bruce Griffiths

Hal Murray wrote:
   

There is another way to compare two frequencies, relevant when they   are
very close together. I divide a reference down to 100KHz and use it to clock
a phase detector made of a pair of D flip flops. The unknown (divided to
100KHz) is fed into the circuit and an output   that is proportional to the
phase difference appears on the output as a changing mark-space ratio.
 

I like it.  Thanks.

How did you pick 100 KHz?

   

Using CMOS and a precise power supply (because under no load, CMOS
output is precisely rail to rail), the averaged output (100ms RC filter) is
fed to a strip chart recorder.
 

Has anybody checked the edge cases and/or linearity of a setup like this?

   

The recorder shows the changing phase difference and folds back each time
a whole cycle passes. A 12 bit analog data logger resolves 2.5ns of phase
and gives data for further analysis.
 

Is 2.5 ns good enough?  What would you gain by using a 16 bit DAC?

   
A ratiometric ADC where the ADC uses the (low pass filtered) CMOS supply 
as its reference is probably advisable when using high resolution ADCs.
A high resolution sigma delta ADC that aloows an external reference to 
be used may be useful for this application.





If 2.5 ns is good enough, I'll bet you can do the whole thing in digital
logic.  Just get a fast FPGA/CPLD.  I haven't done a serious design, but a
quick check at some old data sheets shows it's not silly.  You could probably
bump it up by another factor of 2 with some external (p)ECL chips.


   
If one used an FPGA with an internal 500MHz (use the internal PLL 
available in some FPGAs) clock and dual edge clocking or a 1GHz internal 
clock, 1ns resolution should be readily achievable. However it may be 
advisable to use something like LVDS inputs to alleviate the effects of 
ground and Vcc bounce.
If you need more resolution then one could always sample the outputs of 
an internal tapped delay line using internal gates as delay elements.

With a suitable FPGA a resolution of a few hundred ps is feasible.
If the delay line delay is more than 1 clock period then an embedded 
calibration of the delay line is possible from the coarse (1ns) count 
and the fine count from the internal tapped delay line.



Bruce


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Re: [time-nuts] Info on MTI osc.

2010-07-01 Thread Bruce Griffiths

Luis Cupido wrote:
MTI 230-0546-A 

Is the pinout similar to the other 230 series OCXOs?:
http://www.mti-milliren.com/pdfs/230.pdf

Bruce


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Re: [time-nuts] yet another GPSDO design, or so

2010-06-30 Thread Bruce Griffiths

Chris

All the details are in the article:
http://www.edn.com/contents/images/6607197.pdf

However it would be best to read the article posted by Bob Camp first:


Bruce

Chris Stake wrote:

Hi Bruce,
This sounds like a promising idea, please could you expand on the
synchronous filter technique? I have seen some articles about how such
filters can be used to clean up the data from rotating machinery for
vibration analysis etc. but I don't follow how they can be used in a PWM
application.
Regards
Chris Stake



Its possible to build a 24 bit resolution D/A using a synchronously
filtered PWM circuit.
A pair of PWM outputs and a few relatively low precision resistors and
capacitors together with a low noise low drift reference are required.
The technique takes advantage of the fact that the required EFC voltage
changes slowly and isnt updated at a highg rate.
The synchronous filter technique eliminates the very long time constant
RC filters required with an asynchronously filtered PWM waveform.

Bruce


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Re: [time-nuts] yet another GPSDO design, or so

2010-06-30 Thread Bruce Griffiths
Here's a link to a pdf version of the synchronously filtered low ripple 
pwm dac:


http://www.edn.com/contents/images/6553625.pdf

Bruce

Bruce Griffiths wrote:

Chris

All the details are in the article:
http://www.edn.com/contents/images/6607197.pdf

However it would be best to read the article posted by Bob Camp first:


Bruce

Chris Stake wrote:

Hi Bruce,
This sounds like a promising idea, please could you expand on the
synchronous filter technique? I have seen some articles about how such
filters can be used to clean up the data from rotating machinery for
vibration analysis etc. but I don't follow how they can be used in a PWM
application.
Regards
Chris Stake



Its possible to build a 24 bit resolution D/A using a synchronously
filtered PWM circuit.
A pair of PWM outputs and a few relatively low precision resistors and
capacitors together with a low noise low drift reference are required.
The technique takes advantage of the fact that the required EFC voltage
changes slowly and isnt updated at a highg rate.
The synchronous filter technique eliminates the very long time constant
RC filters required with an asynchronously filtered PWM waveform.

Bruce


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Re: [time-nuts] yet another GPSDO design, or so

2010-06-29 Thread Bruce Griffiths

Attila Kinali wrote:

Moin,

On Sat, 26 Jun 2010 21:14:02 EDT
ewkeh...@aol.com wrote:

   

What you want is basically a Shera Board. That design has been around for
quite some time and has served me very well.
 

Yes. The Shera Board and similar designs serve as an example for me.

   

I have a total of six running
including two controlling Rubidium. There are in my opinion a couple of
problems: not every 4066 works on the design the 18 bit D/A is very hard to
find  and now expensive and the single step of the D/A is intended for a 1.7
E-13  frequency step.
 

Yes. My goal is to update the venerable 4066 with something more
modern and have components that are easy to get trough farnell, digikey,
mouser, and all the other distributors. Yes, 16bit D/A seems to
be the maximum that is currently available. It crossed my mind
to build a 24bit R-2R D/A using discrete components, but this might
have actually a worse performance than a off the shelf 16bit D/A.
(temperature drifft, resistor values missmatch, EMI, etc)


Attila Kinali
   
Its possible to build a 24 bit resolution D/A using a synchronously 
filtered PWM circuit.
A pair of PWM outputs and a few relatively low precision resistors and 
capacitors together with a low noise low drift reference are required.
The technique takes advantage of the fact that the required EFC voltage 
changes slowly and isnt updated at a highg rate.
The synchronous filter technique eliminates the very long time constant 
RC filters required with an asynchronously filtered PWM waveform.


Bruce


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Re: [time-nuts] yet another GPSDO design, or so

2010-06-29 Thread Bruce Griffiths
The problem is that the gain and offset of the 2 DACs changes with time 
and temperature so that the required corrections also change.
Ideally an autocalibration technique would be used to dynamically track 
such changes.


Since changes in the coarse DAC are only required infrequently and the 
mismatch only affects the region around coarse DAC transitions which are 
relatively infrequent (or should be) most designers choose to live with 
the increased loop settling time at such transitions.
With sufficient overlap between the coarse and fine DACs only small fine 
DAC changes should be required to compensate for mismatch between the 
coarse and fine DACs after a change in the coarse DAC output.


The coarse + fine DAC approach is used in some GPSDOs and in particle 
accelerator control systems.


Bruce

ewkeh...@aol.com wrote:

Hi,
  just a clarification, I did write 4066 it is a 4046 that I  replaced. Take
a look at the MCP 4822 dual 12 bit D/A In the data  sheet they have an
example using one for coarse, the other for fine steps, I  realize that the
transition is not perfect but maybe code can compensate for the  transition.
  Bert Kehren

In a message dated 6/29/2010 5:10:39 A.M. Eastern Daylight Time,
att...@kinali.ch writes:

Moin,

On Sat, 26 Jun 2010 21:14:02 EDT
ewkeh...@aol.com  wrote:

   

What you want is basically a Shera Board. That design has  been around
 

for
   

quite some time and has served me very well.
 

Yes. The Shera Board and similar designs serve as an example for  me.

   

I have a total of six running
including two  controlling Rubidium. There are in my opinion a couple of
  problems: not every 4066 works on the design the 18 bit D/A is very hard
 

to
   

find  and now expensive and the single step of the D/A is  intended for a
 

1.7
   

E-13  frequency step.
 

Yes. My goal is  to update the venerable 4066 with something more
modern and have components  that are easy to get trough farnell, digikey,
mouser, and all the other  distributors. Yes, 16bit D/A seems to
be the maximum that is currently  available. It crossed my mind
to build a 24bit R-2R D/A using discrete  components, but this might
have actually a worse performance than a off the  shelf 16bit D/A.
(temperature drifft, resistor values missmatch, EMI,  etc)


Attila Kinali
--
If you want to walk fast, walk alone.
If you want to walk far, walk  together.
-- African  proverb

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Re: [time-nuts] yet another GPSDO design, or so

2010-06-29 Thread Bruce Griffiths

Attila Kinali wrote:

On Tue, 29 Jun 2010 21:32:10 +1200
Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:

   

Its possible to build a 24 bit resolution D/A using a synchronously
filtered PWM circuit.
A pair of PWM outputs and a few relatively low precision resistors and
capacitors together with a low noise low drift reference are required.
The technique takes advantage of the fact that the required EFC voltage
changes slowly and isnt updated at a highg rate.
The synchronous filter technique eliminates the very long time constant
RC filters required with an asynchronously filtered PWM waveform.
 

I've thought about that, but i'm afraid that this will add too
much phase noise trough EFC noise. Though, i have not calculated
how much noise this would generate.

Attila Kinali
   

How do you conclude that?
You don't know what the circuit is and you've never tested it.
Ulrich has, and the output noise is very low.

Bruce


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Re: [time-nuts] yet another GPSDO design, or so

2010-06-29 Thread Bruce Griffiths

Bob Camp wrote:

Hi

Are you referring to something like this:

http://www.electronicsweekly.com/Articles/2008/05/01/43680/fast-settling-syn
chronous-pwm-dac-filter-has-almost-no.htm

as a synchronous filter for the PWM?

Bob

   

Yes, that is the original article.
There's a later one (the link is in the archives) which shows how to use 
a pair of  16 bit PWM signals in conjunction with such a filter.

However there is an error in one of the resistor values.
Ulrich built and tested a 24 bit version using a pair of 16 bit PWM signals.

Bruce


-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Bruce Griffiths
Sent: Tuesday, June 29, 2010 4:07 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] yet another GPSDO design, or so

Attila Kinali wrote:
   

On Tue, 29 Jun 2010 21:32:10 +1200
Bruce Griffithsbruce.griffi...@xtra.co.nz   wrote:


 

Its possible to build a 24 bit resolution D/A using a synchronously
filtered PWM circuit.
A pair of PWM outputs and a few relatively low precision resistors and
capacitors together with a low noise low drift reference are required.
The technique takes advantage of the fact that the required EFC voltage
changes slowly and isnt updated at a highg rate.
The synchronous filter technique eliminates the very long time constant
RC filters required with an asynchronously filtered PWM waveform.

   

I've thought about that, but i'm afraid that this will add too
much phase noise trough EFC noise. Though, i have not calculated
how much noise this would generate.

Attila Kinali

 

How do you conclude that?
You don't know what the circuit is and you've never tested it.
Ulrich has, and the output noise is very low.

Bruce


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Re: [time-nuts] yet another GPSDO design, or so

2010-06-29 Thread Bruce Griffiths

Hal Murray wrote:

bruce.griffi...@xtra.co.nz said:
   

Its possible to build a 24 bit resolution D/A using a synchronously
filtered PWM circuit. A pair of PWM outputs and a few relatively low
precision resistors and  capacitors together with a low noise low drift
reference are required. The technique takes advantage of the fact that the
required EFC voltage  changes slowly and isnt updated at a highg rate. The
synchronous filter technique eliminates the very long time constant  RC
filters required with an asynchronously filtered PWM waveform.
 

24 bits is 16,777,216.  At a reasonable clock rate, that's one second.
   
Not if one uses a pair of 16bit PWM circuits to produce a DAC with 24 
bit resolution.

a few 0.1% resistors then suffice to achieve 24 bit linearity.

Another approach is to distribute the individual bits rather than clump them
together.  If you want 1/2, send 10101010 rather than .  You would
have to do something like build a bit pattern in memory and use a serial port
to send it out.
   


With a synchronous filter the settling time (for small output changes) 
is equal to the PWM period.
The synchronous filter uses a variation of a dual slope error 
integrator, the output of which when sampled is equal to the desired output.
The effect of dielectric absorption in the error integrator can be 
reduced by implementing a mutislope integrator rather than a dual slope 
version.
Its then possible to use a pair of 8 bit PWM signals to achieve 24 bit 
resolution.



That shifts the frequency of the junk so that it's easier to filter out
and/or reduces the amplitude.  If you send 10101010, you have lots of energy
but it's at 8 MHz.  If you send 100, you have energy at 1 Hz, but it's
only 1/1600 as big.  Or something like that.  [Since this is a linear
system, you will get that spur with any odd number of 1s.]

I can't determine if that's good enough.  I think the math is similar to the
spurs you get from a DDS.


   

Simulated that, and Ulrich did some testing, the spurs can be problematic.

The synchronous PWM circuit is much easier to filter as the synchronous 
output noise amplitude (with a constant input) due to sampling charge 
injection need not be more than a few microvolts. That is there is a 
small spur with an amplitude of a few microvolts at the PWM repetition rate.




   



Bruce


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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread Bruce Griffiths

WarrenS wrote:
Long explanations, cause I try to explain, the best I can, when I say 
something is WRONG or misleading


Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and 
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a 
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the 
performance of the reference oscillator in lots of ways.

BUT
Oscillator EFC gain or linearity are not likely to be of much concern 
or a limitation for high end performance.


The gain nonlinearity I've measured can vary two to one over the full 
range of a good Oscillator but it is more like 10% over the normally 
used range, if one stays well away from the end points.

NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the 
full-scale change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the 
nonlinearity effects are generally below the noise level and of little 
concern at all.


The fact that Oscillator gain does differ with the EFC voltage (offset 
voltage), means if you want to get max accuracy out of the TPLL, it 
will need to be calibrated at the EFC offset voltage it is being used 
at.  One simple solution, if the OSC also has a independent manual 
Freq adjustment like the single oven 10811, is to use it always set 
the EFC voltage to be near zero volts.
BTW calibration need not be much of a problem, because it can be a 
static calibration. 

If and only if injection locking isn't significant.
This needs to be established for each setup.
The simplest way to take the effects of injection locking into account 
is to measure the effective EFC gain with the loop closed.



What I use for a finial calibration  check is the 2G turn over, which 
I measure very accurately by other means before hand and then use that 
as a known freq offset to check operation and calibration. Of course 
there are any number of other ways.


As far as temperature having ANY effect on EFC gain, that is a total 
NON issue.
If temperature had any effect on EFC Gain then Temperature would also 
effect Osc Frequency at a fixed EFC voltage,

which would then effect the OSC freq drift and stability,
that would then effect anything that the Osc was used for, NOT just 
the TPLL.

The TPLL actually has a slight advantage over other methods,
because the PLL will adjust the freq to be correct, even if the EFC 
effect should change.





I think it is reasonable to assume that a TPLL weighs in at about
200 USD with all support mixers, amplifiers, ADCs etc.  if you don't 
have the parts

It is still a fairly cheap solution.


Yes I think that is ONE reasonable number to use and a fair conclusion.
BUT there are others.
The EBAY cost of the TPLL can be easy under $10, not including the 
reference Osc and the ADC.


Do note, NONE of items above are plural, Only one is needed per system 
unlike some other methods.
Because the cost of the Ref Osc is so variable and depends so much on 
what one is doing, I have noticed that its cost is generally not 
included in the base price. I think even on the $20K+  TSC 5120A that 
the reference Osc is an extra cost option.


The ADC is another BIG variable, depending on your needs and skill 
level and junk box, almost no limit in cost at the high end,
and can be as low as $0.00 dollars if you are a student doing a 
science project.
It can also be as low as $1.00 if one is good at programming PICS or 
other micros with built in ADC's.


The only other major part in the TPLL with any cost over $1 is the 
Phase detector.
The one I use most is a micro-circuits $15 single price device, but 
I've used all sorts of dual balanced mixers,
and if one is real cheap and good at design, I have found that a PD 
based on a 50 cent XOR gate works fine.


ws

*



Bruce


On 14 June 2010 10:46, Magnus Danielson Posted:



Steve

Still puts it in the mid-tau range as a method. The useful range and
precision of a particular implementation of the method will vary.


By putting a GPSDO in the usual place of the DUT and putting the 10811
in place of the reference oscillator it could work well beyond the
1000s point. CAVEAT: this only works for a DUT that has an EFC that is
reasonably linear.


EFC linearity will remain an issue for analog oscillators. The
oscillator gain will differ depending on offset voltage and temperature.

So if you are just thinking about the TPLL for taking ADEV data 
from 0.1

to 1000 sec, then you're are missing 90% of the other useful stuff it
can do as good or better than most anything thing else out there, and
all for the same $10 (my cost).


The typical price-tag of a 10811 is in 100-150 USD. I think it is 
reasonable
to assume that a TPLL weighs in at about 200 USD with all support 
mixers,
amplifiers, ADCs etc. 

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-14 Thread Bruce Griffiths

WarrenS wrote:

Bruce posted

If and only if injection locking isn't significant.


No problem then, because it is not significant.

For each and every oscillator pair someone may try?

Can place this one under the 'ADVANTAGE' side.


That's descending into the murky realms of pseudoscience.
At best you've only shown this to be true for the particular oscillator 
pair being compared.
Not only must the effect of injection locking be insignificant for the 
reference, it has to be insignificant for the test oscillator as well.
If injection locking is an issue the efc gain with the loop open will 
differ from the efc gain with the loop closed.



I have tested this thoroughly in many ways.
I do understand the concerns and doubts, especially with an unbuffered 
HP 10811 as the reference.

The 10811s are pretty sensitive to injection locking and phase pulling.
Unlike most other methods, one of the many unique properties that the 
TPLL method has is that injection locking is normally not a problem 
with it.

It will change the loop parameters in particular the efc gain.
Its just a matter of how much it affects the efc gain.
I find it is generally unnecessary to buffer either the Ref Osc or the 
DUT.
This is one of the many features that helps make the simple TPLL so 
simple.

(also it does not hurt or change anything to add a proper buffer)
The lack of injection locking is one of the advantages that 
contributes to its exceptional and unbelievable performance.


But Adler's equation indicates that an oscillator is much more to 
susceptible to injection effects when the injected signal frequency is 
very close to the oscillator frequency.


I did not leave the buffers out of the simple TPLL BB that was tested 
because of my lack of knowledge, but because of my extra knowledge 
on the subject that showed that they were unnecessary.
More than once, I have tried to explain the reason why injection 
locking is not a problem with my version of the TPLL method, but until 
one proves it for their self, more words from me will not help.
I do understand the skepticism and doubt, and I know why it is so hard 
to believe this for those that have not worked with is this type of 
method before.
I guess someone should write one of those fancy math papers, if it has 
not already been done, that explains it in more convincing terms than 
I've been able to.
It is hard for me to believe that paper has not already been written, 
But then it is hard for me to believe that the TPLL is not used more 
often. There are plenty of places that one of the TPLL methods well 
give the best overall solution.


ws

***


Bruce

[time-nuts] Advantages  Disadvantages of the TPLL Method
Bruce Griffiths bruce.griffiths at xtra.co.nz

WarrenS wrote:

Long explanations, cause I try to explain, the best I can, when I say
something is WRONG or misleading

Magnus Posted:

EFC linearity will remain an issue for analog oscillators.
The oscillator gain will differ depending on offset voltage and
temperature.


TRUE it is an issue, but somewhat misleading because it need NOT be a
problem or limitation (mostly)
EFC Linearity can be an issue because the TPLL is limited by the
performance of the reference oscillator in lots of ways.
BUT
Oscillator EFC gain or linearity are not likely to be of much concern
or a limitation for high end performance.

The gain nonlinearity I've measured can vary two to one over the full
range of a good Oscillator but it is more like 10% over the normally
used range, if one stays well away from the end points.
NOT so good but livable if you are not making something real accurate.
BUT
For all my accurate stuff, when using a HP 10811, I limit the
full-scale change to 1e-9 or 1e-8 at most.
This uses such a small part of the total EFC range, that the
nonlinearity effects are generally below the noise level and of little
concern at all.

The fact that Oscillator gain does differ with the EFC voltage (offset
voltage), means if you want to get max accuracy out of the TPLL, it
will need to be calibrated at the EFC offset voltage it is being used
at.  One simple solution, if the OSC also has a independent manual
Freq adjustment like the single oven 10811, is to use it always set
the EFC voltage to be near zero volts.
BTW calibration need not be much of a problem, because it can be a
static calibration.

If and only if injection locking isn't significant.
This needs to be established for each setup.
The simplest way to take the effects of injection locking into account
is to measure the effective EFC gain with the loop closed.



What I use for a finial calibration  check is the 2G turn over, which
I measure very accurately by other means before hand and then use that
as a known freq offset to check operation and calibration. Of course
there are any number of other ways.

As far as temperature having ANY effect on EFC gain, that is a total
NON issue.
If temperature had any effect on EFC Gain then Temperature

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths

WarrenS wrote:

subject: Advantages  Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or  how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a  couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.
   
This isn't necessarily correct, one could use a pair of tight PLL loops 
and use correlation techniques to reduce the contribution of the 
reference oscillator noise.



The ref osc (or the DUT)  needs to have an Analog/or Digital EFC control input 
with a bandwidth that is wider than the desired Tau0

#2)  It basically measures Freq and not Phase differences, and few understand 
how and why it works so well or it's many advantages.
   
This is not true, there is no inherent SNR advantage in measuring 
frequency changes as opposed to measuring phase differences.
When the phase measurement system and the frequency measurement systems 
being compared have the same noise bandwidth then the measurement floors 
are comparable.
For example, the TSC5120A is a narrow band system based on measuring 
phase differences with a comparable or lower noise floor than your 
implementation of the tight PLL.


The common technique of using a time interval counter to measure the 
phase difference between 2 RF signals once ever second or so is a 
wideband technique with severe undersampling, consequently the system 
noise floor is much higher than for narrow bandwidth techniques. If the 
phase difference between the 2 signals were measured more frequently and 
digitally low pass filtered the noise will be much lower.


Since one has to calculate average frequency from the frequency samples 
by integration/averaging this is mathematically equivalent to 
reconstructing the phase change between the start and end of the 
averaging time (Tau0).


One effect of undersampling is to convert (in the sampled data) a 
proportion of any flicker phase noise (and other non white phase noise 
components) to white phase noise.

The effect of this is to change the ADEV vs Tau plots from their true shape.

With a single pole RC filter the required minimum sampling rate to 
ensure that such effects are acceptably small cannot be known unless the 
phase  noise spectra of the 2 oscillators being compared is known.


However the extra phase noise filtering due to the finite PLL bandwidth 
(including any EFC filtering built in to the reference oscillator) 
allows an estimate of the maximum sampling rate likely to be required to 
ensure that such phase noise whitening effects are acceptably small.



#3) TBD



ADVANTAGES of the TPLL method:
---
1 thru 30) same as I've posted several times before.
I'm sure others will find many more if they try it or at least understand it 
better.

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Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths

Magnus Danielson wrote:

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.

This isn't necessarily correct, one could use a pair of tight PLL loops
and use correlation techniques to reduce the contribution of the
reference oscillator noise.


True. The same technique is being used for LPLL phase noise 
measurements. The reference oscillator will still be a limit, but 
wither you can go below the reference oscillator noise or not is what 
makes the difference. Such a setup costs about twice of a 
single-channel TPLL. Usually there is two ADC channels available.


Yes the cost of the reference oscillator dominates the system cost, the 
additional $10 (omitting the cost of the phase detector) to implement 
the tight PLL is relatively insignificant.
The cross-correlation processing isn't too hard to achieve and is 
efficiently performed using FFTs and a little support-processing. FFTW 
is a good tool to toss the FFT processing to. The remaining wrapping 
is in a few ten lines of codes or so. Going down the FFT path will 
give the frequency plot for free, getting it back into the time-domain 
cost extra.


If one is calculating the FFT then it is possible to calculate ADEV 
directly from the FFT (of the frequency samples) with little additional 
effort, for the relevant formulae see:


http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

Note such processing doesn't increase the cost of the system as one 
needs a PC to calculate frequency stability measures, unless one 
wants/needs to do it in real time.


One disadvantage of a tight PLL system is that finite EFC range and EFC 
non linearity may preclude its application to noisier sources.
Linearising the EFC transfer function will help but the reference 
oscillator EFC range will ultimately provide an upper limit to the 
measurable noise.





The ref osc (or the DUT) needs to have an Analog/or Digital EFC
control input with a bandwidth that is wider than the desired Tau0

#2) It basically measures Freq and not Phase differences, and few
understand how and why it works so well or it's many advantages.

This is not true, there is no inherent SNR advantage in measuring
frequency changes as opposed to measuring phase differences.
When the phase measurement system and the frequency measurement systems
being compared have the same noise bandwidth then the measurement floors
are comparable.
For example, the TSC5120A is a narrow band system based on measuring
phase differences with a comparable or lower noise floor than your
implementation of the tight PLL.

The common technique of using a time interval counter to measure the
phase difference between 2 RF signals once ever second or so is a
wideband technique with severe undersampling, consequently the system
noise floor is much higher than for narrow bandwidth techniques. If the
phase difference between the 2 signals were measured more frequently and
digitally low pass filtered the noise will be much lower.


Using time-stamping counters at high rate would be possible if being 
able to cope with the rate of samples. You want a frontend to do that 
if you want to run continously.


As for digital filtering. When doing measurements in the 0,1 - 1000 s 
range for the G.813 measurements, a 10 Hz low-pass filter is being 
required.



Since one has to calculate average frequency from the frequency samples
by integration/averaging this is mathematically equivalent to
reconstructing the phase change between the start and end of the
averaging time (Tau0).


Depends on the details. Some counters (SR620 for instance) can have 
biases for frequency data which their time-difference measures do not 
have. A TPLL does not suffer from that particular problem, as it 
cranks out its frequency estimation by a different method.
Yes, but I thought that we were calculating the required averages from 
the frequency (EFC) samples by approximating the required integrals.







One effect of undersampling is to convert (in the sampled data) a
proportion of any flicker phase noise (and other non white phase noise
components) to white phase noise.
The effect of this is to change the ADEV vs Tau plots from their true
shape.


Care to hand a reference or two for this statement?

References for the whitening effect of undersampling:
http://www.obs-besancon.fr/tf/publis/metrologia98a.pdf
http://www.obs-besancon.fr/tf/publis/metrologia98b.pdf

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths
Another disadvantage of the Tight PLL system that only applies to 
multichannel systems is that a dedicated reference oscillator is 
required for each channel.

i.e. for an N channel system N reference oscillators are required.
If correlation techniques were to be employed then an N channel system 
requires 2N reference oscillators.


N channel versions of Dual Mixer systems by contrast only need a single 
offset oscillator and a single reference oscillator.
Similarly an N channel heterodyne system only requires a single offset 
oscillator.


An N channel direct RF phase sampling system (like that employed by the 
2 channel TSC5120A) only requires a single samplign clock source.


An N channel time interval counter that periodically (eg at a 1Hz rate) 
measures phase differences between 2 RF signals only requires a single 
reference source.
The above system can be regarded as an undersampled version of the 
direct RF phase sampling system.


The poor cost scaling of the tight PLL system is another reason why it 
has fallen out of favour for those who have more than 2 frequency 
standards to compare simultaneously.


Bruce


WarrenS wrote:


Great start
Now if we just had a list that someone would add the advantages and 
disadvantages to, so that any non relevant stuff could be easily seen 
and removed or moved to a third list, It would all become much clearer.


ws



Magnus Danielson wrote:

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already know,
or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.

This isn't necessarily correct, one could use a pair of tight PLL loops
and use correlation techniques to reduce the contribution of the
reference oscillator noise.


True. The same technique is being used for LPLL phase noise
measurements. The reference oscillator will still be a limit, but
wither you can go below the reference oscillator noise or not is what
makes the difference. Such a setup costs about twice of a
single-channel TPLL. Usually there is two ADC channels available.


Yes the cost of the reference oscillator dominates the system cost, the
additional $10 (omitting the cost of the phase detector) to implement
the tight PLL is relatively insignificant.

The cross-correlation processing isn't too hard to achieve and is
efficiently performed using FFTs and a little support-processing. FFTW
is a good tool to toss the FFT processing to. The remaining wrapping
is in a few ten lines of codes or so. Going down the FFT path will
give the frequency plot for free, getting it back into the time-domain
cost extra.


If one is calculating the FFT then it is possible to calculate ADEV
directly from the FFT (of the frequency samples) with little additional
effort, for the relevant formulae see:

http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

Note such processing doesn't increase the cost of the system as one
needs a PC to calculate frequency stability measures, unless one
wants/needs to do it in real time.

One disadvantage of a tight PLL system is that finite EFC range and EFC
non linearity may preclude its application to noisier sources.
Linearising the EFC transfer function will help but the reference
oscillator EFC range will ultimately provide an upper limit to the
measurable noise.




The ref osc (or the DUT) needs to have an Analog/or Digital EFC
control input with a bandwidth that is wider than the desired Tau0

#2) It basically measures Freq and not Phase differences, and few
understand how and why it works so well or it's many advantages.

This is not true, there is no inherent SNR advantage in measuring
frequency changes as opposed to measuring phase differences.
When the phase measurement system and the frequency measurement systems
being compared have the same noise bandwidth then the measurement 
floors

are comparable.
For example, the TSC5120A is a narrow band system based on measuring
phase differences with a comparable or lower noise floor than your
implementation of the tight PLL.

The common technique of using a time interval counter to measure the
phase difference between 2 RF signals once ever second or so is a
wideband technique with severe undersampling, consequently the system
noise floor is much higher than for narrow bandwidth techniques. If the
phase difference between the 2 signals were measured more frequently 
and

digitally low pass filtered the noise will be much lower.


Using time-stamping counters at high rate

Re: [time-nuts] Advantages Disadvantages of the TPLL Method

2010-06-12 Thread Bruce Griffiths

WarrenS wrote:


Thanks for the positive contrbution,  A good example of one of the 
TPLL's obvious disadvantages.
The simple cheap analog version of the TPLL is limited by it's need to 
have a dedicated Ref OSC.


One way I have got around that problem, which would not apply to all, 
is to put the DUT unit as the controlled OSC, and use a special Tbolt 
as the reference Oscillator.
The other way around the problem is the Digital version of the TPLL 
that uses DSS.


BTW that limitation is not nearly as big as one would think. This is 
because the long term accuracy is already limited by the reference 
osc, so one would not generally use this kind of system out past 1000 
sec or so anyway.  So If doing long term multichannel Osc, One would 
likely be MUCH better off with a more basic  undersampled Phase system 
for long term testing and just go thru and cheek each Osc one at time 
for a short time with a low tau tester such as this type.


Keep the advantages and disadvantages coming in, so the Time Nuts can 
compare which methods work best for their application.

Now if we just had some place to log the responses.

Summery: If you have multi oscillators to test simultaneously that do 
not have EFC input, and that you want to do continuous sampling on, 
and do not have multiple TSC boxes,  the TPLL is not the right tool 
for the job.
Be better off with one simple lower resolution multiplexed time 
stamped TI phase system and a single TPLL.


If one has a production requirement to test/compare several hundred 
oscillators simultaneously, the TSC5120A and its variants, being 2 
channel instruments, aren't really that useful even if one could afford 
several hundred of them. Such a requirement may be difficult to meet 
within a modest budget whilst still achieving the performance 
requirements (eg 1E-13/tau system noise).


Even with a much smaller number of oscillators (eg 8 -16) devising an 
affordable measurement system may be challenging.



Bruce

Bruce posted:

The poor cost scaling of the tight PLL system is another reason
why it has fallen out of favour for those who have more than
2 frequency standards to compare simultaneously.


Thanks for that opinion, but I don't think we should list the above as 
a unique disadvantage.

Maybe need a new column heading for that one, Any name suggestions?
Does not sound all that valid or unique of a reason to me.
It seems the same can be said about a TSC or any new high cost system.
I would think a more important reason is that the simple TPLL is not a 
universal do all system.
Because the simple analog version is Limited by it's reference Osc 
in many ways,
This does give it some possible major disadvantages like not working 
so good with a CS or Rb standard.

If one has more time than money, there are ways around that.

ws

***

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sun Jun 13 01:25:13 UTC 2010

Another disadvantage of the Tight PLL system that only applies to
multichannel systems is that a dedicated reference oscillator is
required for each channel.
i.e. for an N channel system N reference oscillators are required.
If correlation techniques were to be employed then an N channel system
requires 2N reference oscillators.

N channel versions of Dual Mixer systems by contrast only need a single
offset oscillator and a single reference oscillator.
Similarly an N channel heterodyne system only requires a single offset
oscillator.

An N channel direct RF phase sampling system (like that employed by the
2 channel TSC5120A) only requires a single samplign clock source.

An N channel time interval counter that periodically (eg at a 1Hz rate)
measures phase differences between 2 RF signals only requires a single
reference source.
The above system can be regarded as an undersampled version of the
direct RF phase sampling system.

The poor cost scaling of the tight PLL system is another reason why it
has fallen out of favour for those who have more than 2 frequency
standards to compare simultaneously.

Bruce


WarrenS wrote:


Great start
Now if we just had a list that someone would add the advantages and
disadvantages to, so that any non relevant stuff could be easily seen
and removed or moved to a third list, It would all become much clearer.

ws



Magnus Danielson wrote:

On 06/12/2010 11:29 PM, Bruce Griffiths wrote:

WarrenS wrote:

subject: Advantages Disadvantages of the TPLL Method.

Here is a new and unique Idea that may be useful for many.
Rather than focusing on what some members may or may not already 
know,

or how good or bad one specific working BB configuration is.
How about focusing on what the TPLL method can and can not do well.
If someone will make a place to post and compile a couple of list,
I can start it off with what I've learned so far:


DISADVANTAGES of the TPLL method:
---
#1) The TPLL method is limited by it's reference OSC.
This isn't necessarily

Re: [time-nuts] UTC and leap seconds

2010-06-11 Thread Bruce Griffiths

Tom Van Baak wrote:
Beside the general theoretical considerations as of what answer is 
more acceptable (sincerely I agree so far)  and  what method could be 
used to solve the matter, can anybody out there point me please to 
any article on actual measurements of the variation rate of the 
earth's rotational speed, not based on clocks?


Antonio,

Consider that you need at least two clocks before you can
make a rate measurement. One is the DUT; the other the
REF. So it is not possible to measure the earth (DUT) without
using some other clock (REF). Make sense?

(Speculative hint: We accept that the universe is expanding. Might 
this affect the fine structure of matter, including cesium atoms? Is 
there any adverse proof? What is easier to think? a) the expansion of 
the universe doesn't affect at all the properties of matter. b) it 
might.).


There is no small amount of effort being put into this question.
The results are not usually given as yes/no, zero or non-zero.
Instead they just calmly establish a new lower bound on what
the drift rate might be.

Whether the answer is (a) or (b) doesn't change the fact that
the earth day is a poor clock compared with other clocks now
available. Besides tidal friction effects which might be hard to
imagine, or lunar effects which you already know about, note
that every time it rains or glaciers form and melt it changes the
angular momentum of the poor spinning planet. 


Surely you mean that it changes the moment of inertia of the planet???



Then again,
many OCXO are also affected by humidity...

/tvb


Bruce


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Re: [time-nuts] Tight-PLL - YOU DON'T NEED TO READ IT IF YOUR FED-UP WITH THE THREAD SO HIT DELETE NOW!

2010-06-05 Thread Bruce Griffiths

Wrong again.

The integration/averaging referred to occurs when one counts the output 
transitions of the VFC for a fixed time interval.
This process needs to be replicated using the sampled EFC data if one is 
to measure ADEV.


Bruce

Steve Rooke wrote:

I think I have found the source of the integration issue. I've spent
some considerable time ploughing through as many sources of
descriptions on ADEV, AVAR and the tight-PLL method. I've even tried
looking for the infamous finite time interval integrator which seems
to be highly notable by it's complete absence on Google. Well,
eventually the answer struck me directly in the eye, the source of the
integrate issue comes directly down to the original paper that Warren
posted a link for:-

D. Tight phase lock loop method

The second type of phase lock loop method (shown in figure 1.7) is
essentially the same as the first in figure 1.6 except that in this
case the loop is in a tight phase lock condition; i.e., the response
time of the loop is much shorter than the sample times of
interest--typically a few milliseconds. In such a case, the phase
fluctuations are being integrated so that the voltage output is
proportional to the frequency fluctuations between the two oscillators
and is no longer proportional to the phase fluctuations (for sample
times longer than the response time of the loop). A bias box is used
to adjust the voltage on the varicap to a tuning point that is fairly
linear and of a reasonable value. The voltage fluctuations prior to
the bias box (biased slightly away from zero) may be fed to a voltage
to frequency converter which in turn is fed to a frequency counter
where one may read out the frequency fluctuations with great
amplification of the instabilities between this pair of oscillators.
The frequency counter data are logged with a data logging device. The
coefficient of the varicap and the coefficient of the voltage to
frequency converter are used to determine the fractional frequency
fluctuations, yi, between the oscillators, where i denotes the ith
measurement as shown in figure 1.7. It is not difficult to achieve a
sensitivity of a part in 1014 per Hz resolution of the frequency
counter, so one has excellent precision capabilities with this system.

http://tf.nist.gov/phase/Properties/one.htm

The relevant section here is the response time of the loop is much
shorter than the sample times of interest--typically a few
milliseconds. In such a case, the phase fluctuations are being
integrated so that the voltage output is proportional to the frequency
fluctuations. So what this says is that by incorporating a PLL-loop
filter that has a B/W much wider than the sample time, the phase
fluctuations are integrated into the reference oscillator such that
the control voltage of the tight-PLL now reads frequency which is
unlike the loose-PLL which directly records the phase relationship
between the oscillators. So the term integrated here is used a verb
and not a noun, therefore it is an intrinsic function of the design
not a separate process.

Steve
--
Steve Rooke - ZL3TUV  G8KVD
The only reason for time is so that everything doesn't happen at once.
- Einstein

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Re: [time-nuts] Small DMTD System

2010-06-05 Thread Bruce Griffiths

Richard H McCorkle wrote:

Time-Nuts,
There has been much discussion on this list about methods
of measuring short-term stability. I wanted to make the
list aware of a new paper describing a small DMTD system.
The system was developed by William Riley, author of
STABLE32, and is described in detail with schematics
and test results at:

http://www.wriley.com/A%20Small%20DMTD%20System.pdf

Richard
   
Its amazing what one can do with a ZCD design that totally ignores the 
principles of low noise design.
With a little redesign and addition of a few inexpensive parts it should 
be capable of much better performance.


Bruce


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Re: [time-nuts] Tight-PLL - YOU DON'T NEED TO READ IT IF YOUR FED-UP WITH THE THREAD SO HIT DELETE NOW!

2010-06-05 Thread Bruce Griffiths

Steve Rooke wrote:

On 5 June 2010 19:07, Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:
   

Wrong again.
 

No, I'm not wrong Bruce.

   

Your contribution is largely irrelevant to the original discussion.
The effect of the PLL itself is (or should be) well understood.

However various assertions about the minimum usable value of Tau take no 
account of the low pass filtering built into the 10811 EFC circuit.
The 100k series resistors plus the capacitance of the EFC varicap 
(50-100pF??) will limit the minimum usable value of Tau.



The integration/averaging referred to occurs when one counts the output
transitions of the VFC for a fixed time interval.
This process needs to be replicated using the sampled EFC data if one is to
measure ADEV.
 

This process is exactly replicated by oversampling the EFC and
determining the average for a fixed time period.

   
A various times Warren has both claimed to do this and at others appears 
to deny it.
A clear description of the details of the actual signal processing used 
is sadly lacking.


If and only if the average is calculated sufficiently accurately.
Using a rectangular approximation with sampled data may not be as 
accurate as one may expect.


It never ceases to amaze me why the well established and more accurate 
methods known aren't used (details are all given in the paper I cited), 
all it requires is a suitable program running on a PC.  The correct 
processing should have no effect on the hardware cost.
The $10 cost is also misleading as the mixers aren't free nor is the 
10811 or its equivalent.


The assertion that this technique is new seems to be somewhat dubious as 
it appears to have been known for several decades.



If you can't see that this performs exactly the same function, I don't
know what will convince you.

Steve

   

Bruce


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Re: [time-nuts] Z3816a

2010-06-05 Thread Bruce Griffiths

Robert Benward wrote:

Joe,
Thank you for your inputs!  The Z3815A I suspect is low voltage

If and only if a ~24-48V supply is considered low voltage.
The 10MHz outputs level is only around +4dBm though there are 4 10MHz 
outputs.


, it has a large PC card/motherboard type of connector with a large 
molex/amphenol power connector.  There appears to be a pair of DC-DC 
modules inside.  You would need to make some internal taps to get the 
10MHz out to a BNC.  I also read somewhere an author's disappointment 
on the performance of the (his?) E1938A compare to the 10811.  I have 
one that is stand alone, running continuously.


I was under the impression that the maximum number of satellites in 
view is about 12 (24 active in a constellation hemisphere view), the 
other channels I think are used for WAAS and other data channels.


Bob


Bruce



- Original Message - From: J. L. Trantham jlt...@att.net
To: 'Discussion of precise time and frequency measurement' 
time-nuts@febo.com

Sent: Friday, June 04, 2010 10:56 PM
Subject: Re: [time-nuts] Z3816a



Correction.  Z3805A tracks 16 satellites.

Joe

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of J. L. Trantham
Sent: Friday, June 04, 2010 9:51 PM
To: 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Z3816a

I have Z3816A's and TBolt's.  Both do a great job.  For the TBolt, I use
TBoltMon.exe to monitor and for the Z3816A, I use SatStat.  The Z3816A
requires a 'null modem' adapter or an appropriately wired serial 
cable to

connect to the serial port of the computer where as the TBolt uses a
straight serial cable.

The only potential advantage of the Z3815A that I know of is the fact 
that

it uses the E1938A oscillator.  I have a couple of these oscillators and
they are superior in performance.  However, I have no firsthand 
knowledge of

performance of the Z3816A versus the Z3815A.

The Z3816A and the TBolt tracks up to 8 satellites.  The Z3816A also 
tells
you what other satellites are under consideration but are not being 
tracked,
perhaps up to 8 other non-used satellites.  I have at most seen the 
Z3816A

refer to a total of 11 satellites (8 tracked and 3 not tracked) but my
antenna is not in an ideal location.  I do not know about the 
Z3815A.  The

Z3805A tracks up to 12 satellites, if I recall correctly, and probably
should also be included in the comparison list if you are looking for a
GPSDO.

The Z3816A comes in at least two variants, one powered by a DC supply 
(I use
30 VDC for mine) and the other powered by 120 VAC.  I don't know 
about the

Z3815A.

Good luck,

Joe



-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Robert Benward
Sent: Friday, June 04, 2010 7:13 PM
To: time-nuts
Subject: [time-nuts] Z3816a

Hi All,
Is there any downside to a model Z3816A?  I also see a Z3815A on 
Ebay, but
the connector arrangement is not attractive.  Does anyone have a link 
to a

comparison chart between all these models?
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Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-04 Thread Bruce Griffiths

Steve Rooke wrote:

On 4 June 2010 08:32, Charles P. Steinmetz
charles_steinm...@lavabit.com  wrote:
   

If I may be allowed to summarize, it appears that Warren and Bruce agree
that integration is necessary to produce true ADEV results.  Warren asserts
that the low-pass filtering his method uses is close enough to integration
to provide a useful approximation to ADEV, while Bruce disagrees.  So, the
remaining points of contention seem to be:

1.  How close can a LPF implementation come to integration in ADEV
calculations, and
 

Well, Warren uses two stages of integration. There has already been
talk of the simple R/C filter in the feedback loop. Unless my
education in electronics was completely wrong, the series R/C circuit
forms a simple LPF and is an integrator (assuming that the resistor is
in series with the input and the capacitor is in parallel with the
output). See http://en.wikipedia.org/wiki/Integrator_circuit,
http://en.wikipedia.org/wiki/RC_filter. Sorry these are not academic
papers but if you spot something wrong please feel free to edit them
appropriately. This first stage of integration is set at a much wider
frequency than tau0 and forms the PLL-loop filter allowing it to track
the FAST changes of a noisy unknown oscillator. That last bit is very
important and something some previous attempts at this method failed
to resolve.
   
A cascaded low pass filter and and a finite time interval integrator are 
required.

A single RC LP filter can't approximate this.
Its either a low pass filter or a crude approximation to an integrator 
not both.



Now there is a noisy control voltage on the reference oscillator and
it is absolutely no good trying to make a single measurement at tau0
because the settling time of the filter has not been constrained to it
so it will not give an integrated mean value. This where the second
stage of integration comes in which is the oversampling which takes a
number of readings during tau0 (please correct me if I have the
terminology wrong here) which are then averaged to give a mean,
integrated, value of the control voltage for tau0.
   
Speculative nonsense sampling by itself integrates nothing unless one 
uses an integrator to do the sampling.
Even when the finite bandwidth of the sampler is taken into account the 
equivalent averaging time will be too short and not under user control.
However the samples (if the sampling rate is sufficiently large) contain 
sufficient information for the required finite time integrator output 
values (or frequency averages) to be calculated.
A simple rectangular integration approximation may not be sufficient in 
all cases.


The sampling process actually tends to whiten the sampled phase noise 
spectrum.
The amount of false white phase noise contributed by the sampling 
decreases as the sampling rate increases.
A simple RC low pass filter may not be a a particularly good choice in 
this regard.



So why two stages, look closely above, until the idea of oversampling
was tried, the PLL-loop filter had to have a settling time, IE. cutoff
frequency, equal to tau0 so that the measurement at tau0 reflected the
mean, average, integrated, value for that tau0 period. But if a filter
with that sort of cutoff is used then the reference oscillator is not
able to track noise on the unknown oscillator at all and it would give
results for things like flicker noise, random walk, etc, which were
lower than the actual values. Now have a look at the top end of John's
graphs where there is a divergence.
   
The divergence at the top end of the graphs should be treated with 
extreme caution one needs to know the size of the associated error bars 
to be able to make statistically meaningful conclusions. In general the 
error bars tend to be large in this region.


   

2.  How close to true ADEV is good enough?
 

well, considering we have integrated frequency measurements at tau0
intervals, there is little wonder that it correlates closely to ADEV
because that's exactly what it is.

   
This cannot be so for each and every signal source if the weighting 
function (equivalent filter) doesn't closely match that used in the 
definition of AVAR.
Without the integration/averaging the equivalent filter closely match 
the required filter at all frequencies.



I humbly submit that trading insults has become too dreary for words, and
that neither Warren nor Bruce will ever convince the other on the latter
point.
 

Well, I've been on this list long enough to know that Bruce will
always resort to that sort of behaviour when he is boxed into a corner
or cannot get his point of view accepted. Anyone who speaks up against
him is usually put in their place. This saga has come about because
someone dared to challenge him so we have been subjected to his
tantrums.

   
The saga originated because of the wildly inaccurate claims and very 
woolly explanation as to what signal processing was used.
A few equations and a circuit diagram or 2 would have 

Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-03 Thread Bruce Griffiths

WarrenS wrote:

Bruce posted

The RC filter doesn't accurately integrate the frequency difference 
over time interval Tau0.
For you to even state that means you still have NO idea what I'm 
doing, It is getting sort of sad.


Correct the RC filter is not an integrator, it is used for the 
combination Bandwidth and anti-aliasing filter.

It is the oversampling average that does the integration.
How? Rectangular integration isnt particularly accurate or efficient, 
better techniques exist.
What would explain a lot is, if you do not know what oversampling even 
is?
Try to desist from the pathetic attempts at insults as they merely 
distract from the real questions about the signal processing techniques 
adopted.
You need to get yourself a refresher course on the advantages of 
oversampling to do integration, brick wall filtering, anti-aliasing and
why a single RC works just fine for integration when oversampling is 
used and why you don't need anything but simple averaging of sum n 
samples /n when oversampling is used.

Don't need all the unnecessary fir filter crap, just oversample.



Not so, as anyone with a comprehensive understanding of the subject will 
attest.
Seat of the pants methods produce misleading predictions when noise isnt 
statistically stationary.


If you have spare bandwidth like I have, then it sure saves a lot of  
stuff. Ever hear of KISS'.
Most are aware of the principle but over simplification leads to 
erroneous results.


You need to ask someone to explain that to you some day, along with 
close enough
Hint, the simple Tester BB only takes ONE IC and it is just a single 
op Amp.
That performance metric is irrelevant if it doesnt measure the desired 
quantity for all cases of interest.
NB the case spectrum will vary from one user to another so the 
limitations of the technique need to be well known.
These limitations will include limits on the phase noise spectra of the 
devices being compared.


And Although John's Software makes it all much more user friendly and 
makes user mistakes less likely to occur, It is not needed. Works just 
fine with no special S/W code or filter S/W.


AND it still does integration just fine. (Send me that data file if 
you want to see how it works).


You seem to be unaware of just how easy it is to create a dataset for 
which any given algorithm will fail catastrophically.




ws

**
Bruce last posted:

John Miles wrote:

The integration secret  (which is no secret to anyone but


Bruce)  is to analog filter, Oversample, then average the
Frequency data at a rate much faster than the tau0 data rate.




Which again is misleading as you specify neither the averaging method
nor the analog filter.

I can't speak for the analog side as I never saw a schematic of the 
PLL, but
it may be worthwhile to point out that the averaging code in question 
is in

SOURCE_DI154_proc() in ti.cpp, which is installed with
http://www.ke5fx.com/gpib/setup.exe .  This is my code, not 
Warren's.  It
does a simple boxcar average on phase-difference data, the same as my 
TSC

5120 acquisition routine does.  Previous tests indicated that simple
averaging yields a good match to most ADEV graphs on TSC's LCD 
display, so I

used it for the PLL DAQ code as well.

I also tried a Kaiser-synthesized FIR kernel for decimating the 
incoming TSC

data, but found that its conformance against the TSC's display was worse
than what I saw with the simple average.  More work needs to be done 
here.




When will you understand that phase differences and differences of
average frequency (unit weight to frequency measures over the sampling
interval zero weight outside) are equivalent.

One subtlety is the question of whether to average (or otherwise 
filter) the
DAQ voltage readings immediately after they're acquired and linearly 
scaled

to frequency-difference values, versus after conversion of the
frequency-difference values to phase differences.  I found that the best
agreement with the TSC plots was obtained by doing the latter:

 val = (read and scale the DAQ voltage)

 // val is now a frequency difference
 // averaging val here yields somewhat higher
 // sigma(tau) values in the first few bins
 // after tau0

 val = last_phase + (val / DI154_RATE_HZ);
 last_phase = val;



This appears to use a rectangular approximation to the required integral.
A trapezoidal or even Simpson's rule integration technique should be
more accurate for a given sample rate.
One could even try a higher order polynomial fit to the sample points,
however this isnt the optimum technique to use.

If one uses WKS interpolation to reconstruct the continuous frequency vs
time function and integrates the result for a finite time interval
(Tau0) then one ends up with a digital filter with infinite number of 
terms.

Since an infinite number of samples is required to do this using a
suitable window function is probably advisable.

The paper (below) illustrates how AVAR etc can be calculated from the
sampled 

Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-03 Thread Bruce Griffiths

Steve Rooke wrote:

On 3 June 2010 15:46, Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:
   

WarrenS wrote:
 

As Bruce says It remains a mystery  to him why this works.
   

It doesnt, it only appears to in a very restricted set of circumstances.
 

Bruce, I don't understand you, when presented with visual evidence
that this method works you still deny it.

   

What visual evidence??
There is no proof that the technique works well in every case.
Only that for the range of Tau tested and for the particular source pair 
used that it appears to.



Not one of my best skills, but I'll try to explain it once again.
Now that they see it works, maybe someone else will be able to put this
into words that Bruce will be able to finally understand.

The only requirement needed for the Frequency data log to be give correct
ADEV readings, is to get good, Averaged, integrated, Frequency data, with no
dead time, and no aliasing, over the tau0 time period.
Each Tau0 Frequency sample is ideally completely independent from all
others. If it can do one right then it can get them ALL right.
In a single tau0 sample there is NO SUCH THING as a certain type of long
term noise, Just the average freq over that single time period.


   

Misleading as usual, your knowledge of statistics is woefully inadequate
leading to incorrect conclusions.
 

Well, what are are the woefully inadequate conclusions then? Please
give us your full reasoning.

   
A simple example is that for a small number of samples a stability 
metric like the ordinary (unfiltered) phase variance standard deviation 
may appear to be stable, whereas with a sufficiently large number of 
samples the instability of the metric itself becomes evident whenever 
divergent noise processes like flicker phase noise, random walk 
frequency noise are present.


/Each Tau0 Frequency sample is ideally completely independent from all
others.
/

The above statement is incorrect as the finite bandwidth necessarily 
imparts a correlation between samples they can only be strictly 
independent if the bandwidth is infinite.


/In a single tau0 sample there is NO SUCH THING as a certain type of long
term noise, Just the average freq over that single time period.
/

The above statement imparts no useful information.
It would be much easier and less bandwidth wasted if the circuit 
schematics and useful documentation on the  algorithms employed were 
available.

Extracting any useful information seems somewhat akin to pulling teeth.


The crucial integration/averaging to get good tau0 data, that Bruce can not
see for some unknown reason, is done

Only in your imagination.
 

One would assume that this method only works when Warren does it as
his imagination is required for it to work, but wait, John Miles has
managed to get point for point identical data against a TSC, how can
that be Bruce? Please give answers, not insults.

   

Read the following paper:

http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

which shows the relationship between AVAR etc, filters and the ordinary 
phase variance.
The paper also outlines the techniques that should be used with the 
sampled frequency difference data from a tight PLL.




with an analog filter  set to about the Tau0 Freq and by oversampling at
about about a 10 to one ratio, and averaging the oversampled frequency
readings down to tau0.
   

That doesn't work as it has the wrong transfer function.
 

Again, it it does not work, how come the evidence shows that it does,
how do you explain that Bruce?
   

The evidence doesn't show this at all.
It merely indicates that for the devices tested that the phase noise 
spectral components in the region where the filter responses of the ADEV 
and WDEV differ (its not ADEV so it shouldnt be labelled as such) dont 
appear to be significant for the 2 sources compared and the tau range 
over which the testing was done.
Extrapolation of such results to predict that the technique will produce 
such agreement with other devices with differing phase noise 
characteristics is unrelaible.


You are confusing producing the same numbers in specific cases with the 
ability to do so in general.
There is no guarantee that such agreement will occur with a given pair 
of sources.
Such agreement in general isnt possible as the equivalent phase noise 
filters have different frequency responses.


Stability measures like AVAR can be shown to be the equal to the 
ordinary variance of the phase difference at the output of a very 
specific phase noise filter.
WDEV has a phase noise filter with a different frequency response so 
that it doesnt actually measure ADEV.



It is not perfect, but plenty close enough for the plot to match the
output of the TSC 5120A over the whole tau range.
There are a few other subtle details on how to insure that aliasing and
over filtering do not become a problem, but first things first,
one needs to understand how the integration is 

Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-03 Thread Bruce Griffiths

WarrenS wrote:

Bruce posted:

It would be much easier if Warren limited his commentary to the 
actual results and omitted the wild speculation
OK, It works with everything that it has been tried on and gives the 
same answers as the TSC5120A, including the Osc shake test.
Now your turn to try and find something that it does not work on.  ( 
see end  Item)



Phase is the integral of frequency so phase differences sampled at 
intervals of say T are equivalent to frequencies averaged over time T 
and sampled at the end of the sample interval. Thus sampling the time 
average frequency every T seconds is equivalent to sampling the phase 
difference every T seconds.

Equivalent Information Yes, but not equal to at all.
Please tell me you think you can now process both of those data set 
with the same algorithm and get the same results?

Then we can all have something to laugh at.

Another somewhat misleading statement since the frequency averages can 
be calculated from the phase differences.
The algorithm is exactly the same as integrating the frequency error is 
the same as calculating the phase change accumulated over the averaging 
time.





Warrens implementation improves on the original NIST implementation 
by oversampling.


Actually it degrades the simplicity and accuracy of the NIST 
implementation by replacing the integration inherent when using the 
counter and VFC with an approximation to the required frequency 
integral. Fortunately the accuracy can largely be recovered by using 
the appropriate signal processing algorithms.



Think so?  Lets see how well the VFC does at 1 ms and $10.00.
I have NO trouble doing 1 sec integration, with errors that are far 
less than theirs.

( see end  item)

Yet again you seem to miss the point, cost is not relevant to the 
discussion of the correct signal processing technique.




Why Warren omits this crucial step when all it requires is a little
digital signal processing as all the required information is 
available

from the sampled EFC voltage remains a mystery.
Hay, The tester logs raw data, if you want to make a S/W filter to run 
the Raw data thru go for it,
BUT before you waste your time, you should try and find at least one 
case that the current system does not work on.

( see end item)

Yet again you demonstrate a profound lack of understanding of higher 
order numerical integration techniques.






Its not that the method cant be easily fixed so that it produces 
accurate ADEV measures for an extremely wide range of sources with 
divergent phase noise spectra, its the extreme reluctance to do the 
signal processing correctly (its not that this even incurs extra 
hardware costs) that is perplexing.


See above and  Send me the easily fixed S/W.  I'm ready to try it.
The first test is to make sure it does not brake what is already working,
then I can try it on anything that the existing S/W does not work on.
Oh yet, that is going to be a bit of a problem, there is no known 
device the existing software does not work on.

You'll need to send that along with the Software.

How about hydrogen masers and cryogenic sapphire resonators?



this is the END ITEM
If you want to save a whole lot of time and not do extra S/W etc,
I'll just make the oversample to tau0 ratio larger. That will fix any 
integration and phase noise and errors that you can come up with.
If you do not understand why that is the case, then you still have no 
understanding of what I'm doing.




Lets forget all the other BS for now, and just concentrate on the 
single statement.

I'll  increase the oversample to tau0 ratio, that will fix it

That isnt always even possible or even a cost effective option.
Another problem with the tight PLL method is that the PLL bandwidth is 
limited by the variable bandwidth of the EFC circuit (a few kHz for a 
10811A).

Thus accurate operation down to Tau =1ms may be somewhat problematic.
If you think it is false, you really do need to go back to 
oversampling school.
If you admit it is true, then we really do not have much else to talk 
about, because it fixes all your present concerns.
It is now as simple as that.  To discuss anything else is a total 
waste of time.


Which is your way of saying that you don't understand the alternative 
more accurate methods and won't consider them.

ws

***


Bruce
- Original Message - From: Bruce Griffiths 
bruce.griffi...@xtra.co.nz
To: Discussion of precise time and frequency measurement 
time-nuts@febo.com

Sent: Thursday, June 03, 2010 12:27 AM
Subject: Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A



Steve Rooke wrote:
On 3 June 2010 15:46, Bruce Griffithsbruce.griffi...@xtra.co.nz  
wrote:



WarrenS wrote:


As Bruce says It remains a mystery  to him why this works.

It doesnt, it only appears to in a very restricted set of 
circumstances.



Bruce, I don't understand you, when presented with visual evidence
that this method works you still deny it.



What

Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-03 Thread Bruce Griffiths

WarrenS wrote:

Bruce Posted

   

  Rectangular integration isn't particularly accurate or efficient, better 
techniques exist.
 

True, but in this case it is the easiest and at these speeds, efficiency is not 
a big concern, It is made up for with faster oversampling.
and it is obvious so far, better is not needed here, this is 'Good enough'.
(and that answers your other question, why don't I do it better.)

   

Why do that when its so easy to do much better?

You do bring up an interesting point.   There is lots of things that could be 
(and have been) done better than on that  simple one IC BB circuit that was 
tested, and yet it was good enough to match the TSC 5120A pretty much point for 
point over the whole tau range and ADEV range.(limited only by it's Ref 
Osc.)  Think KISS, enought said.


   
You've entirely missed the point, such errors need to be quantified not 
swept under the carpet.
Trapezoidal integration is almost as simple as rectangular integration 
and comes at low cost.
However if you look at equation 44 in the paper I cited an even better 
technique is described.

Try to desist from the pathetic attempts at insults
 

I don't know what that even means, but sorry about the oversampling comments.
  It did seem you did not know what that was or at least its advantages when it 
comes to simplifying things.
Ditto on the Phase and Freq differences comment, which I fear still may be the 
case.

   
Sure if one has a sufficiently high oversampling factor crude 
approximations may work reasonably well.
However one ought to strive to do better particularly when its easy to 
do so and requires no additional hardware.

One doesn't always have the luxury of an extremely high oversampling ratio.
A better filter than a single pole RC filter may also be required to 
take full advantage.

You seem to be unaware of just how easy it is to create a dataset for which any 
given algorithm will fail catastrophically.
 

True, I'm unaware of ANYTHING Normal that will make this fail.
send me something, It'll be fun to try it, If you can break it, I can fix it.

Lets start small, give me any two numbers, I'll give you the average
Now  three, then four, how far do you want to go? I'm sure I can still give you 
the average value.
Now for the big test, can I give you the average of several of the previous 
averages, This is not going to be a problem either.
I can give you the average for any reasonable numbers that could be presented 
to the ADC in normal operation thru the restricted PLL BW and the BW filter.
That IS about ALL there is to it.   It needs to give the AVERAGE Frequency  of 
the oversampled average frequencies.
Then it needs to give the average of these averages. As long all samples are 
taken at the same rate, it works good.  (Average = Sum_nSamples / n )
The oversampled has to be done fast enough and with the appropriate B/W limit 
so there is no dead time or aliasing or significant change happens during one 
sample period.
  The other H/W takes care of that.  Oversampling  TC  filter.

To understand why that is all that is needed, one need to only look at what 
basic Allan deviation is.
Allan deviation is the Average of the neighboring frequency differences that 
have been averaged for a given length of time. That  length of time is called 
tau.
   

Actually you should be using fractional frequency differences.

That is needed then is to find (the Average_Freq over a tau period) -  (the 
Average_Freq over the next  same length time period).
Do some squaring of the differences and some more averaging and scaling and 
some sq root and out pops an ADEV answer.
The important point is that it ALL just starts with the Average Frequency  over 
a period of time called tau.
If you can get accurate average freq over tau0  time then any standard Allan 
calculation S/W can turn it into ADEV and  at any tau.


ws

***

   

Bruce

WarrenS wrote:
   

Bruce posted

 

The RC filter doesn't accurately integrate the frequency difference
over time interval Tau0.
   

For you to even state that means you still have NO idea what I'm
doing, It is getting sort of sad.

Correct the RC filter is not an integrator, it is used for the
combination Bandwidth and anti-aliasing filter.
It is the oversampling average that does the integration.
 

How? Rectangular integration isnt particularly accurate or efficient,
better techniques exist.
   

What would explain a lot is, if you do not know what oversampling even
is?
 

Try to desist from the pathetic attempts at insults as they merely
distract from the real questions about the signal processing techniques
adopted.
   

You need to get yourself a refresher course on the advantages of
oversampling to do integration, brick wall filtering, anti-aliasing and
why a single RC works just fine for integration when oversampling is
used and why you don't need anything but simple averaging of sum n
samples /n when oversampling is 

Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-03 Thread Bruce Griffiths
, The tester logs raw data, if you want to make a S/W filter to run
the Raw data thru go for it,
BUT before you waste your time, you should try and find at least one
case that the current system does not work on.
( see end item)


Yet again you demonstrate a profound lack of understanding of higher
order numerical integration techniques.






Its not that the method cant be easily fixed so that it produces
accurate ADEV measures for an extremely wide range of sources with
divergent phase noise spectra, its the extreme reluctance to do the
signal processing correctly (its not that this even incurs extra
hardware costs) that is perplexing.


See above and  Send me the easily fixed S/W.  I'm ready to try it.
The first test is to make sure it does not brake what is already 
working,

then I can try it on anything that the existing S/W does not work on.
Oh yet, that is going to be a bit of a problem, there is no known
device the existing software does not work on.
You'll need to send that along with the Software.

How about hydrogen masers and cryogenic sapphire resonators?



this is the END ITEM
If you want to save a whole lot of time and not do extra S/W etc,
I'll just make the oversample to tau0 ratio larger. That will fix any
integration and phase noise and errors that you can come up with.
If you do not understand why that is the case, then you still have no
understanding of what I'm doing.




Lets forget all the other BS for now, and just concentrate on the
single statement.
I'll  increase the oversample to tau0 ratio, that will fix it

That isnt always even possible or even a cost effective option.
Another problem with the tight PLL method is that the PLL bandwidth is
limited by the variable bandwidth of the EFC circuit (a few kHz for a
10811A).
Thus accurate operation down to Tau =1ms may be somewhat problematic.

If you think it is false, you really do need to go back to
oversampling school.
If you admit it is true, then we really do not have much else to talk
about, because it fixes all your present concerns.
It is now as simple as that.  To discuss anything else is a total
waste of time.


Which is your way of saying that you don't understand the alternative
more accurate methods and won't consider them.

ws

***


Bruce

- Original Message - From: Bruce Griffiths
bruce.griffiths at xtra.co.nz
To: Discussion of precise time and frequency measurement
time-nuts at febo.com
Sent: Thursday, June 03, 2010 12:27 AM
Subject: Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A



Steve Rooke wrote:

On 3 June 2010 15:46, Bruce Griffithsbruce.griffiths at xtra.co.nz
wrote:


WarrenS wrote:


As Bruce says It remains a mystery  to him why this works.


It doesnt, it only appears to in a very restricted set of
circumstances.


Bruce, I don't understand you, when presented with visual evidence
that this method works you still deny it.



What visual evidence??
There is no proof that the technique works well in every case.
Only that for the range of Tau tested and for the particular source
pair used that it appears to.


Not one of my best skills, but I'll try to explain it once again.
Now that they see it works, maybe someone else will be able to put
this
into words that Bruce will be able to finally understand.

The only requirement needed for the Frequency data log to be give
correct
ADEV readings, is to get good, Averaged, integrated, Frequency
data, with no
dead time, and no aliasing, over the tau0 time period.
Each Tau0 Frequency sample is ideally completely independent from 
all

others. If it can do one right then it can get them ALL right.
In a single tau0 sample there is NO SUCH THING as a certain type
of long
term noise, Just the average freq over that single time period.




Misleading as usual, your knowledge of statistics is woefully
inadequate
leading to incorrect conclusions.


Well, what are are the woefully inadequate conclusions then? Please
give us your full reasoning.



A simple example is that for a small number of samples a stability
metric like the ordinary (unfiltered) phase variance standard
deviation may appear to be stable, whereas with a sufficiently large
number of samples the instability of the metric itself becomes
evident whenever divergent noise processes like flicker phase noise,
random walk frequency noise are present.

/Each Tau0 Frequency sample is ideally completely independent from all
others.
/

The above statement is incorrect as the finite bandwidth necessarily
imparts a correlation between samples they can only be strictly
independent if the bandwidth is infinite.

/In a single tau0 sample there is NO SUCH THING as a certain type of
long
term noise, Just the average freq over that single time period.
/

The above statement imparts no useful information.
It would be much easier and less bandwidth wasted if the circuit
schematics and useful documentation on the  algorithms employed were
available.
Extracting any useful information seems

Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-03 Thread Bruce Griffiths

Steve Rooke wrote:

Bruce,

On 3 June 2010 19:27, Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:
   

Bruce, I don't understand you, when presented with visual evidence
that this method works you still deny it.
   

What visual evidence??
There is no proof that the technique works well in every case.
Only that for the range of Tau tested and for the particular source pair
used that it appears to.
 

I have already commented on this in another thread but to reiterate.
The test that John performed that for a range of Tau that was possible
to be calculated for the given measurement period, both methods
produced the same results for each and every value of Tau, not for a
single value of Tau.

   


   

Well, what are are the woefully inadequate conclusions then? Please
give us your full reasoning.
   

A simple example is that for a small number of samples a stability metric
like the ordinary (unfiltered) phase variance standard deviation may appear
to be stable, whereas with a sufficiently large number of samples the
instability of the metric itself becomes evident whenever divergent noise
processes like flicker phase noise, random walk frequency noise are present.
 

OK, we need to run the test for a longer period but, as John has
indicated, he is not able to devote any further time to this. That
fact does not mean that this method has no value, it is just like
every other area of theoretical physics, we can never prove it true so
we try to look at ways of proving it false. The important words there
are proving it false.

   

Lots of stuff deleted.
 

Lets explore frequency measurement in a way that we all can
understand. No oscillator can be measured in isolation, it has to be
measured against another standard oscillator. Conventional frequency
measurement is performed by counting the number of cycles of the
unknown oscillator over a known period or gate time. This averages the
unknown frequency over the gate time so that an instrument built using
this method can only provide an accuracy down to a single cycle over
the number of cycles that are counted during the gate time. What this
means is that the conventional method of frequency measurement
averages the measured value and is subject to an error of the period
of the frequency.

So how does Warren's system measure the frequency. Using the tight-PLL
method the feedback voltage controlling the reference oscillator is
constantly tracking any difference between both oscillators. If
measurements of the PLL feedback are only taken at the required Tau
frequency, the result would only show the instantaneous value which
would be equivalent to basically measuring the period of the last (or
last few, depending upon the Tc of the PLL feedback filter) cycles. By
oversampling, IE. taking many measurements during the desired period
of minimum Tau, these measurements can be averaged to produce the
averaged frequency of that Tau period. This means that the PLL filter
loop can be made much faster to keep the unknown and reference
oscillators tightly tracking. Without some dampening in the PLL loop,
the circuit would become unstable and quite unusable. All that is
required in this filter is a very simple integrator as it's Tc is
faster than the oversampling rate which is in turn faster than the Tau
period.

   

Only in your imagination.
 

One would assume that this method only works when Warren does it as
his imagination is required for it to work, but wait, John Miles has
managed to get point for point identical data against a TSC, how can
that be Bruce? Please give answers, not insults.
   

Read the following paper:

http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf
 

This is a fine paper but is only relevant to the method they are using
for AVAR determination. As I have explained above, oversampling
enables the implementation of a very simple filter in the PLL loop.

   

which shows the relationship between AVAR etc, filters and the ordinary
phase variance.
The paper also outlines the techniques that should be used with the sampled
frequency difference data from a tight PLL.
 

Agreed, but they had not thought about oversampling..

   

Again, it it does not work, how come the evidence shows that it does,
how do you explain that Bruce?

   

The evidence doesn't show this at all.
It merely indicates that for the devices tested that the phase noise
spectral components in the region where the filter responses of the ADEV and
WDEV differ (its not ADEV so it shouldnt be labelled as such) dont appear to
be significant for the 2 sources compared and the tau range over which the
testing was done.
 

OK, for all intents and purposes ADEV measurements are only carried
out on a limited variety of oscillators as it would be pointless to,
say, perform such a measurement on an LC disciplined oscillator. So we
are looking at xtal, Rb, Cs and Hm at the moment. For practical
purposes the xtal has good 

Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-02 Thread Bruce Griffiths

John Miles wrote:

For those following this strange and wonderful saga:

http://www.ke5fx.com/tpll.htm

-- john, KE5FX

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The problem with that page is that you show the original NIST 
implementation which actually produces valid ADEV measures whereas 
Warren's implementation omits the crucial integration/averaging (his 
figurative handwaving antics don't change this) and hence actually has a 
different phase noise frequency response than that of the filter implied 
by the definition of AVAR.


Why Warren omits this crucial step when all it requires is a little 
digital signal processing as all the required information is available 
from the sampled EFC voltage remains a mystery.


The method as implemented by Warren produces a frequency stability 
metric which may be useful for comparing the stability of some sources, 
however it does not measure ADEV.


Under a restricted set of circumstances such as when white phase noise 
or drift dominate the measures so calculated my be close to the measured 
ADEV obtained by a method wth the correct response to the various phase 
noise frequency components, however this doesnt mean that the measures 
are actually ADEV measures it merely means that the phase noise 
frequency components in the region where the frequency response of the 2 
methods differ significantly, are not significant.


Bruce


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Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-02 Thread Bruce Griffiths

WarrenS wrote:

As Bruce says It remains a mystery  to him why this works.

   

It doesnt, it only appears to in a very restricted set of circumstances.

Not one of my best skills, but I'll try to explain it once again.
Now that they see it works, maybe someone else will be able to put this into 
words that Bruce will be able to finally understand.

The only requirement needed for the Frequency data log to be give correct ADEV 
readings, is to get good, Averaged, integrated, Frequency data, with no dead 
time, and no aliasing, over the tau0 time period.
Each Tau0 Frequency sample is ideally completely independent from all others. 
If it can do one right then it can get them ALL right.
In a single tau0 sample there is NO SUCH THING as a certain type of long term 
noise, Just the average freq over that single time period.

   
Misleading as usual, your knowledge of statistics is woefully inadequate 
leading to incorrect conclusions.


The crucial integration/averaging to get good tau0 data, that Bruce can 
not see for some unknown reason, is done


Only in your imagination.


with an analog filter  set to about the Tau0 Freq and by oversampling at about 
about a 10 to one ratio, and averaging the oversampled frequency readings down 
to tau0.
   

That doesn't work as it has the wrong transfer function.


It is not perfect, but plenty close enough for the plot to match the output of 
the TSC 5120A over the whole tau range.
There are a few other subtle details on how to insure that aliasing and over 
filtering do not become a problem, but first things first,
one needs to understand how the integration is being done.

   

Sloppy and misleading explanation as usual.


The integration secret  (which is no secret to anyone but Bruce)  is to analog 
filter, Oversample, then average the Frequency data at a rate much faster than 
the tau0 data rate.
   
Which again is misleading as you specify neither the averaging method 
nor the analog filter.



That alone should be enough information for any knowledgeable designer to 
understand.

   

Its not and you should know that it isnt.
You draw conclusions that are neither supported by measurement nor theory.


ws

ps)
Do note, I'm working with Frequency here and not phase, that may be what is 
confusing some.

   
When will you understand that phase differences and differences of 
average frequency (unit weight to frequency measures over the sampling 
interval zero weight outside) are equivalent.

***

   


 

The problem with that page is that you show the original NIST
implementation which actually produces valid ADEV measures whereas
Warren's implementation omits the crucial integration/averaging (his
figurative handwaving antics don't change this) and hence actually has a
different phase noise frequency response than that of the filter implied
by the definition of AVAR.

Why Warren omits this crucial step when all it requires is a little
digital signal processing as all the required information is available
from the sampled EFC voltage remains a mystery.

The method as implemented by Warren produces a frequency stability
metric which may be useful for comparing the stability of some sources,
however it does not measure ADEV.

Under a restricted set of circumstances such as when white phase noise
or drift dominate the measures so calculated my be close to the measured
ADEV obtained by a method wth the correct response to the various phase
noise frequency components, however this doesnt mean that the measures
are actually ADEV measures it merely means that the phase noise
frequency components in the region where the frequency response of the 2
methods differ significantly, are not significant.

Bruce
*
John Miles wrote:
   

For those following this strange and wonderful saga:

http://www.ke5fx.com/tpll.htm

-- john, KE5FX
 

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Re: [time-nuts] Notes on tight-PLL performance versus TSC 5120A

2010-06-02 Thread Bruce Griffiths

John Miles wrote:

The integration secret  (which is no secret to anyone but
   

Bruce)  is to analog filter, Oversample, then average the
Frequency data at a rate much faster than the tau0 data rate.
 
   

Which again is misleading as you specify neither the averaging method
nor the analog filter.
 

I can't speak for the analog side as I never saw a schematic of the PLL, but
it may be worthwhile to point out that the averaging code in question is in
SOURCE_DI154_proc() in ti.cpp, which is installed with
http://www.ke5fx.com/gpib/setup.exe .  This is my code, not Warren's.  It
does a simple boxcar average on phase-difference data, the same as my TSC
5120 acquisition routine does.  Previous tests indicated that simple
averaging yields a good match to most ADEV graphs on TSC's LCD display, so I
used it for the PLL DAQ code as well.

I also tried a Kaiser-synthesized FIR kernel for decimating the incoming TSC
data, but found that its conformance against the TSC's display was worse
than what I saw with the simple average.  More work needs to be done here.

   

When will you understand that phase differences and differences of
average frequency (unit weight to frequency measures over the sampling
interval zero weight outside) are equivalent.
 

One subtlety is the question of whether to average (or otherwise filter) the
DAQ voltage readings immediately after they're acquired and linearly scaled
to frequency-difference values, versus after conversion of the
frequency-difference values to phase differences.  I found that the best
agreement with the TSC plots was obtained by doing the latter:

val = (read and scale the DAQ voltage)

// val is now a frequency difference
// averaging val here yields somewhat higher
// sigma(tau) values in the first few bins
// after tau0

val = last_phase + (val / DI154_RATE_HZ);
last_phase = val;

   

This appears to use a rectangular approximation to the required integral.
A trapezoidal or even Simpson's rule integration technique should be 
more accurate for a given sample rate.
One could even try a higher order polynomial fit to the sample points, 
however this isnt the optimum technique to use.


If one uses WKS interpolation to reconstruct the continuous frequency vs 
time function and integrates the result for a finite time interval 
(Tau0) then one ends up with a digital filter with infinite number of terms.
Since an infinite number of samples is required to do this using a 
suitable window function is probably advisable.


The paper (below) illustrates how AVAR etc can be calculated from the 
sampled frequency difference data using DFT techniques:


http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf


// val is now a phase difference
// averaging val here matches the TSC better

The difference is not huge but it's readily noticeable.

This is subtly disturbing because the RC filter before the DAQ *does*
integrate the frequency-difference data directly.  If it's correct to
band-limit the frequency-to-voltage data in the last analog stage of the
pipeline, it should be correct to do it in the first digital stage, I'd
think.

   
The RC filter doesnt accurately integrate the frequency difference over 
time interval Tau0.

Further complicating matters is the question of whether the TSC 5120A's
filtering process is really all that 'correct,' itself.  When they
downsample their own data by a large fraction, e.g. when you select tau0=100
msec / NEQ BW = 5 Hz, there is often a slight droop near tau0 that does not
correspond to anything visible at higher rates.  To some extent we may be
attempting to match someone else's bug.
   
This is the result of the choice of the low pass filter bandwidth made 
by the designers.

The filter bandwidth increases as Tau0 decreases.
The traditional analyses of the dependence of AVAR on bandwidth of this 
filter assume a brickwall filter.



At any rate I've run out of time/inclination to pursue it, at least for now.
The SOURCE_DI154_proc() routine in TI.CPP is open for inspection and
modification by any interested parties, lines 6753-7045 in the current
build. :)  Warren has his hardware back now, and would presumably be able to
try any modifications.

-- john, KE5FX


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Bruce


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Re: [time-nuts] Digital tight PLL method

2010-05-28 Thread Bruce Griffiths

Steve Rooke wrote:

On 28 May 2010 07:42, Bruce Griffithsbruce.griffi...@xtra.co.nz  wrote:
   

Steve Rooke wrote:
 

On 28 May 2010 04:40, David Martindaledave.martind...@gmail.comwrote:

   

Hmm.  From here in Vancouver Canada, the name resolves to the same
address,
pings fail, and the given URL gets me the web page.

Try using the top-level page address:
http://tf.nist.gov/phase/Properties/main.htm
(Looks like the whole set of pages is worth reading anyway).

 

I've just discovered that if I use Tor it works fine. Perhaps it does
not like New Zealand :(

Steve


   

 Dave

 


   

Only those in the South Island.
 

We call it The Mainland here mate!

Steve

   

Bruce
 
   

I debated using that term but others on the list wouldnt be aware of it.

Bruce


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Re: [time-nuts] Digital tight PLL method

2010-05-26 Thread Bruce Griffiths

Ulrich

Close in spurs generated by the synthesiser may also be problematic.
One feature being that the spur levels will depend (in a complex way) on 
the synthesiser output frequency.


One of the first problems to solve is making the close in spurs 
sufficiently low.
Another problem is to ensure that the synthesiser output is phase 
continuous (not a problem with DDS but close in spurs may be).


Bruce

Ulrich Bangert wrote:

Warren,

you are not the only person to have ideas like this!

I managed to get me a Stanford Research DS345 generator which gives 1E-6 Hz
frequency resolution for any frequency below 30 MHz (Can be locked to any 10
MHz reference). At 10 MHz this resembles a relative resolution of 1E-13. I
used this generator in a digital pll where the phase error was measured by a
DBM and a a HP3457. The digital PLL was a simple script written with my
EZGPIB utility which controlled the DS345 and read the HP3457 via IEEE488.
The main difference to your analogue solution is that it delivers a
frequency measurement value immediately (= the current setting of the DS345)
without any knowledge needed about the mixer's phase gain properties. And it
is not limited to a certain frequency. Of course, the generator may be
exchanged by an DIY DDS and the multimeter may be exchanged against a DIY
A/D converter. Injection locking is not a topic with the DDS circuit.

Nevertheless my measurement were not exactly encouraging. May be that I
missed to apply the important math that Bruce has been suggesting in the
discussion with you. All the stuff is on my workbench and is ready to use.
May be I give it another try.

Best regards
Ulrich Bangert

   

-Ursprungliche Nachricht-
Von: time-nuts-boun...@febo.com
[mailto:time-nuts-boun...@febo.com] Im Auftrag von WarrenS
Gesendet: Montag, 24. Mai 2010 18:49
An: John Miles; Tom Van Baak; Discussion of precise time and
frequency measurement
Betreff: [time-nuts] Digital tight PLL method



Concerning the simple, $10, Low cost, Tight PLL method of doing ADEV.

If you accept that the measurement is going to be limited by
the Reference
Osc,
Then for Low COST and SIMPLE, with the ability to measure
ADEVs at very low
levels,
Can't beat a simple analog version of  NIST's Tight
Phase-Lock Loop Method
of measuring Freq stability.
http://tf.nist.gov/phase/Properties/one.htm#oneoneFig 1.7

Here is some more information on the subject that may help
inspire some of
the great minds out there.

In spite of all the unjustified criticism, the latest test
will show, at
least to the more open minded nuts,
There is NOTHING inherently wrong with the tight PLL method
as I have done
it. It gives about as good of answers as anything out there.
As I've implemented it, there are some disadvantages, because
there is just
so much one can do with a single Op amp design.
If one does the calculation they will also see the OP amp is
not a limiting
factor in the performance of this method.

AS I have said before, the disadvantage of my simple BB
version that was
tested, is that it is limited by the Ref Osc and the way it's freq is
modified.
The accuracy is limited by the fact the first simple BB
version I built is
an all analog system.
That is solely because the frequency control I used on the
simple version is
the analog EFC input of the reference Osc.
I've also pointed out, that is not a limitation of the
method, there are
solutions for that.
Now I'm amazed that no one has had a New inspiration.

Maybe a more direct approach will help some to see the next
logical step. Using the same basic tight PLL method, make
some of the unit digital. Do not modify the freq of the
reference osc with analog,  GET it yet? That way the device
would be half digital without any of the analog
shortcoming or the need to physically change the reference
freq. Do I really need to explain more?

Have fun
ws

***


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Re: [time-nuts] Z3805 utility, Was: AW: (no subject)

2010-05-22 Thread Bruce Griffiths

Didier Juges wrote:

Bill, I think you got it backwards. +/- 12V is typical for RS-232, 0/+5V is
for RS-422 and RS-485.

No RS-232 receiver should be damaged with +/- 12V or even +/- 15V because
that is their normal operating voltage.

Also, RS-422 and RS-485 have something like 25V common mode tolerance (not
sure what the actual spec is there,) so that the RS-422 and RS-485 receivers
should not be damaged by 15V either. The RS-422 drivers are pretty low
impedance, while the RS-232 drivers are current limited, so I don't think
that connecting an RS-232 driver into an RS-422 driver will damage either.
   
Picking one RS485 receiver (ADM1485) at random the receiver absolute 
maximum (no damage) input range is -14V to +14V.

The RS485 receiver operating common mode range is -7V to +12V.
RS422 receivers have an input operating range of -7V to +7V.
The no damage RS422 receiver input ratings may be higher.

However, most recent (10 years?) RS-232 receivers will work with a 0/+3V or
0/+5V input, conveniently having a threshold a few 10's or 100's of mV above
ground, even though the original RS-232 spec required receivers that work
with as low as +/- 3V, and drivers that deliver +/- 9V minimum. Many
commercial systems use +/- 5V drivers for RS-232 (BB Electronics sells a
lot of converters with these voltages). This is a deliciously sloppy spec
that nobody has met in the last 25 years probably, yet works most of the
time.

The one thing to avoid is to short an RS-422 (or RS-485) driver to ground,
as that can actually cause damage, maybe not every time, but definitely not
recommended. These have relatively high current output capability to drive
long lines.

Didier KO4BB


   

Bruce

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Bill Hawkins
Sent: Saturday, May 22, 2010 3:09 PM
To: 'Discussion of precise time and frequency measurement'
Subject: Re: [time-nuts] Z3805 utility, Was: AW: (no subject)

When all else fails, get out the voltmeter.

Do you have power to the antenna? Is it the right voltage? All the way to
the antenna?

What volts are on pins 2 or 3 relative to pin 7 in the comm connector?

If you see 12 volts, that's RS-422. You may have burned out your computer's
serial port.

If you see less than 5 volts, that's RS-232 and all should be well, unless
you see zero volts.

I may have the RS-xxx volts somewhat off because my memory isn't what it
used to be.

The guy you bought it from should be able to help with comm basics.

Bill Hawkins


-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Robert Benward
Sent: Saturday, May 22, 2010 2:08 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Z3805 utility, Was: AW: (no subject)

Hi All,
I hooked everything up and I still get nothing.  I can't seem to establish
communications  with the Z3805.  I tried a
null modem as well, in case the cable (supplied) was wired with the wrong
connector gender.  I see a green blinking
light inside, it he left rear corner of the box.  Everything is warm, but
nothing else.  Any ideas?

Bob




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Re: [time-nuts] Dual Mixer

2010-05-12 Thread Bruce Griffiths

WarrenS wrote:

Bruce

Good, It does seem like we are finally making some good progress.
You now seem to acknowledge that my tester could work if I integrate.
You now seem to acknowledge that I am integrating by using a filter.
In a sampled data system integration is equivalent to a filter but not 
just any arbitrary low pass filter.
The errors in your method are explicitly spelled out in the paper I gave 
the link to:

http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf
In this paper xi is a phase sample and yi is a frequency sample.
I acknowledge that my integration method is not perfect, BUT it is 
simple and good enough.

Not yet proven nor quantified.
It would seem the only issue left is to show you just how good of 
answers my integration method gives.

At least now we are JUST talking about what the S/W needs to do.
Hopefully you now see that the hardware is adequate.
What would you consider an acceptable error band, 3 dB, 1 dB, 0.1 dB?  
Pick a number  zero.


The answer depends on how long one is willing to spend making the 
measurements.

Certainly 0.1dB or better would require heroic efforts to demonstrate.
Since the error will also depend on the phase noise spectra of the 
oscillators being compared a single figure answer isnt feasible.
However for the case where white phase noise dominates the error should 
be not more than 1dB but potentially much less.
The errors due to digital signal processing should be at least an order 
of magnitude lower.
For a typical high speed data log taken at say 1 K samples per second, 
one would generally run a quick test with maybe a minute's worth of data.
That would provide enough data to give a good tau plot up to about 10 
seconds.
That's a rather sweeping statement given that no estimates of the 
contribution to measurement noise due to the finite number of samples 
has been made.
The maximum usable tau for a given record length depends on the maximum 
acceptable error due to the finite number of samples.
Now if you can supply me with a 60K data log with any type of 
reasonably typical noise that you want to include in it
I'll show you how close my approximate Integration comes to your 
perfect integration.


You can't because your method of perfect integration isnt and its errors 
cannot be made sufficiently small with so few samples.


I can set this up to do as many times as you want, until I have 
demonstrated by example that it is close enough,
for every data log case that you will provide. Near enough IS good 
enough for me and most Nuts.

Quantify near enough else all is just noise.


As John pointed out, this is measuring noise. One is not going to get 
the exact same answer twice in a row anyway.
My answer will not be perfect, but it will be simple and fast and easy 
and below the noise uncertainty band.
Your turn to put a data log where your math is.  Do try and remember 
I'm working with Frequency and not phase.



Thats idle speculation as you havent quantified anything at all.
The repeatability of the measurements needs to be quantified.
BTW. just a heads-up warning to be fair. I have set up this situation 
so that I can not loose.
Its actually almost trivial to produce a set of samples for which any 
given method will fail.

Doing so is an unproductive exercise.
If you want to setup your own situation go for it. I'll see if I can 
do it.
Only requirement is that it should be broken down into no more than 
60K sample sizes max for each test at the start.
After I pass that,  if you want to go for millions of samples or 
whatever, fine as long as I can read the text data log file.


ws


Bruce


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Re: [time-nuts] Dual Mixer

2010-05-11 Thread Bruce Griffiths
As long as one is aware that your method (as implemented by you) doesn't 
actually measure Allan variance, it may be useful for comparing the 
relative stability some sources for small Tau (unfortunately the range 
of Tau for which the method may produce useful results depends on the 
phase noise characteristics of the sources being compared).
To measure AVAR the technique has to have the same response to all phase 
noise spectral components as does AVAR.
Since you do not integrate/average the frequency measures the phase 
noise response of the method is not identical to that used in 
calculating AVAR.
This technique probably works best when white phase noise dominates the 
phase noise spectral region of interest (usually for small Tau).


For those who can follow the theory, the following paper shows how the 
above method is affected by aliasing etc:

http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

The paper also shows how the required integration (needed to actually 
measure AVAR) can be approximated from the discrete sample sequence.
Alternatively one could avoid the numerical integration by replacing the 
ADC with a zero deadtime (ie not a dual slope converter. A multislope 
algorithm like that used in the 34401A (but not the 3458A) should work 
as the signal is integrated continuously) integrating ADC. One 
possibility is to use a VFC as NIST did when they used this technique 
some decades ago.


Of course, the classical DMTD setup undersamples the phase noise 
spectrum and thus may suffer from aliasing artifacts.
Such aliasing artifacts have no significant effect when the phase noise 
spectrum is flat.


Bruce

WarrenS wrote:

For the Really cheap time nuts,

It sounds like Bert Kehren has done a great Job building a Dual Mixer 
tester.
There are other simpler, less standard ways to get good data for Allan 
Variance and small frequency differences.
My VERY simple $10.00 analog tight PLL Tester BB (Previoulsy posted) 
pretty much accomplishes the same goals as his,
and it can do 1e-13 in a second, and 1e-11 in 10ms  (limited of course 
by the single reference Oscillator used)


A simple test that most can do at home, and still challenges the best 
high end testers out there is Tom's the swinging Oscillator test.

http://www.leapsecond.com/pages/10811-g/
(The results from my PLL tester is attached)

ws

**
- Original Message - From: ewkeh...@aol.com
To: time-nuts@febo.com
Sent: Tuesday, May 11, 2010 7:02 AM
Subject: [time-nuts] Dual Mixer



The Dual Mixer project is nearing completion.
Let me refresh every ones memory as to my goals.
a)  Total cost less than $ 200
b)  1 E-13 with a one second offset
c)  use parts attainable by every one
d)  easy to assemble only a few surface mount parts
e)  a five channel counter that yields 1 E 15 resolution and  interfaces
directly to a PC via  RS232 or USB
f)   A counter that also gives you instant frequency  difference at the
sample rate, not only Allan Variance
g)  Modular so one can use only the Dual Mixer
h)  Modular so one can use multiple units to do simultaneous  
comparison of

more than two oscillators.
i)   Isolation between D/M and counter so that the counter can be  
powered

by the PC USB port

I am happy to report that all goals have been accomplished, attached 
is a
picture of the D/M, limitation of the file size does not allow me to 
attach
an  actual board picture, but if you contact me direct I will send 
you one,
the  final board is actually nicer since the first layout had to 
accommodate

several  variances.

The D/M part leans heavy on the original NIST unit with a few 
substitutions

and recommendations from Bob Camp. Also beside Opto Couplers SN65LVDS1's
have  been included for those that want to use other counting methods.
Selection of  filter capacitors allow the use at other offset 
frequencies such as
10 and 100  Hz. The D/M fits in a standard 74 X 111 X 20 mm Euro case 
and
the counter can be  stacked below or next to it using the Opto 
Isolators as
the inter connect. The  SYPD-1's fit right on the board but 
connections are
included to use the HP 10514  A. As a matter of fact removing the HP 
mixer
board from its housing   fits it nicely on the board and every thing 
is still

inside the housing.
The counter will handle 1 an 10 Hz offset with a 1 E 14 resolution at 10
Hz. Thanks to Richard Mc Corkle we have great drawings and code, 
available to

every one.
Code, drawings, list of material and PC board layouts and its  file, 
will

be available to every one once the project is completed.
I need help in the following areas
a)  help me create a nice set of drawings that are computer generated
something I am not able to do
b) create the computer program that takes the output of the counter 
board
and allows Allan Variance plots, frequency difference and dual 
temperature

readings and plots using RS232 and USB.
c) an independent test by a third party.
As I said previously, I am not getting 

Re: [time-nuts] Dual Mixer

2010-05-11 Thread Bruce Griffiths

Warren

So you now actually integrate/average the frequency over the sampling 
interval (Tau) after rejecting the need to do this for months?


Bruce

WarrenS wrote:

Bruce

Before we go around again and discuses what my simple tester can and 
can not do and why,
It would be helpful if you would take the time to better understand 
how it works and why it works the way I have done it.

You really should try one yourself if you can't see why it works.
You are going to be surprised and embarrassed at how good it works.
Why you're at it, try the swing test with anything you have. Let me 
know how that goes.


I'm not saying that may tester will match someone's Latest ever 
changing NEW idea of what the correct AVAR should be,
After all it just Logs correct, integrated, Freq difference data of 
ANY noise type
and does it without adding any dead time or aliasing all by uisng 
pretty much using ANY ADC capability of over sampling at the tau Zero 
rate.
If one then uses the data log with something like the classic Stable 
32 S/W or Ulrich's Plotter,
it gives is the exact same results as other methods costing much much 
more, over the whole tau range.
This is limited only be its reference oscillator (Same way that all 
others are limited of course, Doen't get much better than that).
If that is not good enough for you, them you need to discuss the 
results with Symmetricon and others that give the same answer as mine, 
not me.


If for some reason you want to set one up wrong so that it matches the 
results of some other special instrument, I'd be glad to tell you how 
to have it add back in the dead time or aliasing artifact problems or 
whatever else you would like it to do wrong, that it presently does 
correctly.


ws

**
Bruce wrote

As long as one is aware that your method (as implemented by you) doesn't
actually measure Allan variance, it may be useful for comparing the
relative stability some sources for small Tau (unfortunately the range
of Tau for which the method may produce useful results depends on the
phase noise characteristics of the sources being compared).
To measure AVAR the technique has to have the same response to all phase
noise spectral components as does AVAR.
Since you do not integrate/average the frequency measures the phase
noise response of the method is not identical to that used in
calculating AVAR.
This technique probably works best when white phase noise dominates the
phase noise spectral region of interest (usually for small Tau).

For those who can follow the theory, the following paper shows how the
above method is affected by aliasing etc:
http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

The paper also shows how the required integration (needed to actually
measure AVAR) can be approximated from the discrete sample sequence.
Alternatively one could avoid the numerical integration by replacing the
ADC with a zero deadtime (ie not a dual slope converter. A multislope
algorithm like that used in the 34401A (but not the 3458A) should work
as the signal is integrated continuously) integrating ADC. One
possibility is to use a VFC as NIST did when they used this technique
some decades ago.

Of course, the classical DMTD setup undersamples the phase noise
spectrum and thus may suffer from aliasing artifacts.
Such aliasing artifacts have no significant effect when the phase noise
spectrum is flat.

Bruce

*
WarrenS wrote:

For the Really cheap time nuts,

It sounds like Bert Kehren has done a great Job building a Dual Mixer
tester.
There are other simpler, less standard ways to get good data for Allan
Variance and small frequency differences.
My VERY simple $10.00 analog tight PLL Tester BB (Previously posted)
pretty much accomplishes the same goals as his,
and it can do 1e-13 in a second, and 1e-11 in 10ms  (limited of course
by the single reference Oscillator used)

A simple test that most can do at home, and still challenges the best
high end testers out there is Tom's the swinging Oscillator test.
http://www.leapsecond.com/pages/10811-g/
(The results from my PLL tester is attached)

ws

**
- Original Message - From: EWKehren at aol.com
To: time-nuts at febo.com
Sent: Tuesday, May 11, 2010 7:02 AM
Subject: [time-nuts] Dual Mixer



The Dual Mixer project is nearing completion.
Let me refresh every ones memory as to my goals.
a)  Total cost less than $ 200
b)  1 E-13 with a one second offset
c)  use parts attainable by every one
d)  easy to assemble only a few surface mount parts
e)  a five channel counter that yields 1 E 15 resolution and  
interfaces

directly to a PC via  RS232 or USB
f)   A counter that also gives you instant frequency  difference at the
sample rate, not only Allan Variance
g)  Modular so one can use only the Dual Mixer
h)  Modular so one can use multiple units to do simultaneous
comparison of
more than two oscillators.
i)   Isolation between D/M and counter so that the counter can be

Re: [time-nuts] Dual Mixer

2010-05-11 Thread Bruce Griffiths
You cannot approximate the sinc function frequency response of an ideal 
integrator with an arbitrary low pass filter.
Your scheme will tend to misbehave (in that it will produce anomalous 
ADEV estimates) when flicker phase noise is significant.


You actually need to use an analog low pass filter (or its equivalent) 
and an integrator to produce useful ADEV measures


Bruce

WarrenS wrote:


(My apologies to all, this is a game Bruce and I play every time I 
bring up my simple tester.)


Bruce wrote:

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?


Yes, I integrate/average just the same as I have always done it from 
day one.

Did you finally understand how the integration works using most any ADC?
Hint: it's done with oversampling the tau zero time.
(and a LP filter set to a value above the tau zero but below the 
oversamping rate)
The VERY SAME thing I have been trying to tell you from day one, 
something that you have chosen to ignore.
The very original Block diagram that I posted shows it, if you need 
more information.


ws

***
Warren

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?

Bruce

*
WarrenS wrote:

Bruce

Before we go around again and discuses what my simple tester can and
can not do and why,
It would be helpful if you would take the time to better understand
how it works and why it works the way I have done it.
You really should try one yourself if you can't see why it works.
You are going to be surprised and embarrassed at how good it works.
Why you're at it, try the swing test with anything you have. Let me
know how that goes.

I'm not saying that may tester will match someone's Latest ever
changing NEW idea of what the correct AVAR should be,
After all it just Logs correct, integrated, Freq difference data of
ANY noise type
and does it without adding any dead time or aliasing all by using
pretty much using ANY ADC capability of over sampling at the tau Zero
rate.
If one then uses the data log with something like the classic Stable
32 S/W or Ulrich's Plotter,
it gives is the exact same results as other methods costing much much
more, over the whole tau range.
This is limited only be its reference oscillator (Same way that all
others are limited of course, Doesn't get much better than that).
If that is not good enough for you, them you need to discuss the
results with Symmetricon and others that give the same answer as mine,
not me.

If for some reason you want to set one up wrong so that it matches the
results of some other special instrument, I'd be glad to tell you how
to have it add back in the dead time or aliasing artifact problems or
whatever else you would like it to do wrong, that it presently does
correctly.

ws

**
Bruce wrote

As long as one is aware that your method (as implemented by you) doesn't
actually measure Allan variance, it may be useful for comparing the
relative stability some sources for small Tau (unfortunately the range
of Tau for which the method may produce useful results depends on the
phase noise characteristics of the sources being compared).
To measure AVAR the technique has to have the same response to all phase
noise spectral components as does AVAR.
Since you do not integrate/average the frequency measures the phase
noise response of the method is not identical to that used in
calculating AVAR.
This technique probably works best when white phase noise dominates the
phase noise spectral region of interest (usually for small Tau).

For those who can follow the theory, the following paper shows how the
above method is affected by aliasing etc:
http://hal.archives-ouvertes.fr/docs/00/37/63/05/PDF/alaa_p1_v4a.pdf

The paper also shows how the required integration (needed to actually
measure AVAR) can be approximated from the discrete sample sequence.
Alternatively one could avoid the numerical integration by replacing the
ADC with a zero deadtime (ie not a dual slope converter. A multislope
algorithm like that used in the 34401A (but not the 3458A) should work
as the signal is integrated continuously) integrating ADC. One
possibility is to use a VFC as NIST did when they used this technique
some decades ago.

Of course, the classical DMTD setup undersamples the phase noise
spectrum and thus may suffer from aliasing artifacts.
Such aliasing artifacts have no significant effect when the phase noise
spectrum is flat.

Bruce

*
WarrenS wrote:

For the Really cheap time nuts,

It sounds like Bert Kehren has done a great Job building a Dual Mixer
tester.
There are other simpler, less standard ways to get good data for Allan
Variance and small frequency differences.
My VERY simple $10.00 analog tight PLL Tester BB (Previously posted)
pretty much accomplishes the same goals as his,
and it can do 1e-13 in a second, and 1e-11 in 

Re: [time-nuts] Dual Mixer

2010-05-11 Thread Bruce Griffiths
The results have so far only been shown to be useful when white phase 
noise dominates.
When the phase noise is white almost anything can be made to produce a 
result that differs from ADEV by at scale factor.


In practice its sometimes difficult to know over what range of Tau that 
the phase noise is in fact white.


The various tests and comparisons that have been made or are underway 
are necessary but not sufficient proof of the usefulness of this technique.
The phase noise frequency response of the technique is also required so 
that its limitations can be delineated.


1000 samples of a divergent noise process are insufficient, spreadsheet 
analysis of the millions of samples that are probably necessary is 
impossible/impractical.
Using something like Matlab is probably necessary to achieve meaningful 
results.


Bruce

WarrenS wrote:


OK, So, It is not perfect, but its simple and does give answers that 
are GOOD enough.
At least you now understand if the integrator works then the tester 
works.


So that we do not go down hill again after all this progress,
If you would like to send me a data file of say 1000 + samples of any 
noise type of your choice
I'll send you back an excel spread sheet to show the insignificant 
error that this integration method produces.


ws



You cannot approximate the sinc function frequency response of an ideal
integrator with an arbitrary low pass filter.
Your scheme will tend to misbehave (in that it will produce anomalous
ADEV estimates) when flicker phase noise is significant.

You actually need to use an analog low pass filter (or its equivalent)
and an integrator to produce useful ADEV measures

Bruce

***
WarrenS wrote:


(My apologies to all, this is a game Bruce and I play every time I
bring up my simple tester.)

Bruce wrote:

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?


Yes, I integrate/average just the same as I have always done it from
day one.
Did you finally understand how the integration works using most any ADC?
Hint: it's done with oversampling the tau zero time.
(and a LP filter set to a value above the tau zero but below the
oversamping rate)
The VERY SAME thing I have been trying to tell you from day one,
something that you have chosen to ignore.
The very original Block diagram that I posted shows it, if you need
more information.

ws

***
Warren

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?

Bruce

*
WarrenS wrote:

Bruce

Before we go around again and discuses what my simple tester can and
can not do and why,
It would be helpful if you would take the time to better understand
how it works and why it works the way I have done it.
You really should try one yourself if you can't see why it works.
You are going to be surprised and embarrassed at how good it works.
Why you're at it, try the swing test with anything you have. Let me
know how that goes.

I'm not saying that may tester will match someone's Latest ever
changing NEW idea of what the correct AVAR should be,
After all it just Logs correct, integrated, Freq difference data of
ANY noise type
and does it without adding any dead time or aliasing all by using
pretty much using ANY ADC capability of over sampling at the tau Zero
rate.
If one then uses the data log with something like the classic Stable
32 S/W or Ulrich's Plotter,
it gives is the exact same results as other methods costing much much
more, over the whole tau range.
This is limited only be its reference oscillator (Same way that all
others are limited of course, Doesn't get much better than that).
If that is not good enough for you, them you need to discuss the
results with Symmetricon and others that give the same answer as mine,
not me.

If for some reason you want to set one up wrong so that it matches the
results of some other special instrument, I'd be glad to tell you how
to have it add back in the dead time or aliasing artifact problems or
whatever else you would like it to do wrong, that it presently does
correctly.

ws

**
Bruce wrote

As long as one is aware that your method (as implemented by you) 
doesn't

actually measure Allan variance, it may be useful for comparing the
relative stability some sources for small Tau (unfortunately the range
of Tau for which the method may produce useful results depends on the
phase noise characteristics of the sources being compared).
To measure AVAR the technique has to have the same response to all 
phase

noise spectral components as does AVAR.
Since you do not integrate/average the frequency measures the phase
noise response of the method is not identical to that used in
calculating AVAR.
This technique probably works best when white phase noise dominates the
phase noise spectral region of interest (usually for small Tau).

For 

Re: [time-nuts] Dual Mixer

2010-05-11 Thread Bruce Griffiths
Spreadsheets can be a snare and a delusion if not carefully applied with 
full recognition of their limitations.
Unfortunately the divergent nature of flicker phase noise etc doesn't 
become evident until one processes a very large number of samples.
1000 samples is never enough as many tests and simulations both 
published and unpublished have shown.


Your assertion about scale factors is questionable as the equivalent 
noise bandwidth needs to be identical when comparing measures produced 
by different systems.

If they differ the results will differ by a scale factor.
Aliasing will increase the equivalent noise bandwidth somewhat so exact 
matching may be difficult.


Also its not possible to reconstruct the necessary samples that would be 
produced by an ideal integrator using a spreadsheet from a finite 
sequence of samples that the spreadsheet can handle as the number of 
filter coefficients required is too large for the spreadsheet to cope.


WarrenS wrote:

Bruce

So why are you saying I need millions of samples?
Is it that this method of integration may give the wrong answer one 
out a million times?
And you will not let up until you find that one in a million times 
that it may error?
I don't think you're going to find it, but if you want we can go with 
that.
BTW It does NOT need ANY scale factors, special or otherwise to give 
the right answers.

It uses the same scale factor of ONE for ALL noise sources.
If you can't give me an example of a data log that it may fail on,
that I can run thru excel to prove otherwise, then
We're done here until next time.

ws

***
*
The results have so far only been shown to be useful when white phase
noise dominates.
When the phase noise is white almost anything can be made to produce a
result that differs from ADEV by at scale factor.

In practice its sometimes difficult to know over what range of Tau that
the phase noise is in fact white.

The various tests and comparisons that have been made or are underway
are necessary but not sufficient proof of the usefulness of this 
technique.

The phase noise frequency response of the technique is also required so
that its limitations can be delineated.

1000 samples of a divergent noise process are insufficient, spreadsheet
analysis of the millions of samples that are probably necessary is
impossible/impractical.
Using something like Matlab is probably necessary to achieve meaningful
results.

Bruce

***
WarrenS wrote:


OK, So, It is not perfect, but its simple and does give answers that
are GOOD enough.
At least you now understand if the integrator works then the tester
works.

So that we do not go down hill again after all this progress,
If you would like to send me a data file of say 1000 + samples of any
noise type of your choice
I'll send you back an excel spread sheet to show the insignificant
error that this integration method produces.

ws



You cannot approximate the sinc function frequency response of an ideal
integrator with an arbitrary low pass filter.
Your scheme will tend to misbehave (in that it will produce anomalous
ADEV estimates) when flicker phase noise is significant.

You actually need to use an analog low pass filter (or its equivalent)
and an integrator to produce useful ADEV measures

Bruce

***
WarrenS wrote:


(My apologies to all, this is a game Bruce and I play every time I
bring up my simple tester.)

Bruce wrote:

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?


Yes, I integrate/average just the same as I have always done it from
day one.
Did you finally understand how the integration works using most any 
ADC?

Hint: it's done with oversampling the tau zero time.
(and a LP filter set to a value above the tau zero but below the
oversamping rate)
The VERY SAME thing I have been trying to tell you from day one,
something that you have chosen to ignore.
The very original Block diagram that I posted shows it, if you need
more information.

ws

***
Warren

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?

Bruce

*
WarrenS wrote:

Bruce

Before we go around again and discuses what my simple tester can and
can not do and why,
It would be helpful if you would take the time to better understand
how it works and why it works the way I have done it.
You really should try one yourself if you can't see why it works.
You are going to be surprised and embarrassed at how good it works.
Why you're at it, try the swing test with anything you have. Let me
know how that goes.

I'm not saying that may tester will match someone's Latest ever
changing NEW idea of what the correct AVAR should be,
After all it just Logs correct, integrated, Freq difference data of
ANY noise type
and does it without adding any dead time or aliasing all by 

Re: [time-nuts] Dual Mixer

2010-05-11 Thread Bruce Griffiths

Warren

Calculating an integral using a sampled data system when the Nyquist 
criterion is met is exactly equivalent to filtering albeit using just 
the right coefficients.
Using rectangular approximation to the integral of the underlying 
continuous function is also equivalent to a filter albeit a very simple one.
Unfortunately rectangular integration (which you use) isnt particularly 
accurate, using trapezoidal integration is far more accurate in most cases.
Since this isnt a control system the instability associated with 
trapezoidal integration and higher order integration algorithms in 
feedback systems isnt an issue.


Whittaker-Shannon-Kotelnikov interpolation allows an exact 
reconstruction (when the Nyquist sampling criterion is met) of the 
underlying continuous function from the samples.
The result can then be integrated term by term to produce a set of 
weights/filter coefficients for the data samples.


In other words in a sampled data system integration is equivalent to 
using a filter.


Near enough is never good enough if you cant estimate the errors 
involved in the various approximations.
This is particularly true when one is attempting to evaluate the 
deviation of an approximate method from that achieved using the correct 
method.


Bruce


WarrenS wrote:

Bruce

So why are you saying I need millions of samples?
Is it that this method of integration may give the wrong answer one 
out a million times?
And you will not let up until you find that one in a million times 
that it may error?
I don't think you're going to find it, but if you want we can go with 
that.
BTW It does NOT need ANY scale factors, special or otherwise to give 
the right answers.

It uses the same scale factor of ONE for ALL noise sources.
If you can't give me an example of a data log that it may fail on,
that I can run thru excel to prove otherwise, then
We're done here until next time.

ws

***
*
The results have so far only been shown to be useful when white phase
noise dominates.
When the phase noise is white almost anything can be made to produce a
result that differs from ADEV by at scale factor.

In practice its sometimes difficult to know over what range of Tau that
the phase noise is in fact white.

The various tests and comparisons that have been made or are underway
are necessary but not sufficient proof of the usefulness of this 
technique.

The phase noise frequency response of the technique is also required so
that its limitations can be delineated.

1000 samples of a divergent noise process are insufficient, spreadsheet
analysis of the millions of samples that are probably necessary is
impossible/impractical.
Using something like Matlab is probably necessary to achieve meaningful
results.

Bruce

***
WarrenS wrote:


OK, So, It is not perfect, but its simple and does give answers that
are GOOD enough.
At least you now understand if the integrator works then the tester
works.

So that we do not go down hill again after all this progress,
If you would like to send me a data file of say 1000 + samples of any
noise type of your choice
I'll send you back an excel spread sheet to show the insignificant
error that this integration method produces.

ws



You cannot approximate the sinc function frequency response of an ideal
integrator with an arbitrary low pass filter.
Your scheme will tend to misbehave (in that it will produce anomalous
ADEV estimates) when flicker phase noise is significant.

You actually need to use an analog low pass filter (or its equivalent)
and an integrator to produce useful ADEV measures

Bruce

***
WarrenS wrote:


(My apologies to all, this is a game Bruce and I play every time I
bring up my simple tester.)

Bruce wrote:

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?


Yes, I integrate/average just the same as I have always done it from
day one.
Did you finally understand how the integration works using most any 
ADC?

Hint: it's done with oversampling the tau zero time.
(and a LP filter set to a value above the tau zero but below the
oversamping rate)
The VERY SAME thing I have been trying to tell you from day one,
something that you have chosen to ignore.
The very original Block diagram that I posted shows it, if you need
more information.

ws

***
Warren

So you now actually integrate/average the frequency over the sampling
interval (Tau) after rejecting the need to do this for months?

Bruce

*
WarrenS wrote:

Bruce

Before we go around again and discuses what my simple tester can and
can not do and why,
It would be helpful if you would take the time to better understand
how it works and why it works the way I have done it.
You really should try one yourself if you can't see why it works.
You are going to be surprised and embarrassed at how good it works.
Why you're at it, try the swing test 

Re: [time-nuts] oscillator choice question

2010-05-02 Thread Bruce Griffiths

Hal Murray wrote:

bruce.griffi...@xtra.co.nz said:
   

If there is no electronic tuning available one can use a DDS based
synthesiser to produce a corrected output frequency. However close in spurs
will be problematic unless one use a couple of  simple mix and divide stages
or resorts to a Diophantine synthesiser  using phase noise truncation spur
free output frequencies from the DDS  chip(s).
 

I think I understand the classic spurs from a DDS.

I wasn't familiar with Diophantine techniques.  Google found this
   http://www.hindawi.com/journals/ijno/2008/416958.html
which is readable at my level.

But I don't think I understand the big picture.  The example numbers they
give involve mixing 500 Hz with 10 MHz.  Assuming I want the sum, how do I
get rid of the difference?  It's going to be a good strong signal, as strong
as the one I want.  I think anything that leaks through the filter into the
next mixer is likely to make mirror sidebands that are right where we don't
want them.

Why is that going to be easier to get rid of than traditional spurs?

   
A DDS can generate some close in spurs that are very close to the 
desired frequency and thus are difficult to filter even with a narrow 
band PLL as the spur offset and amplitude varies with the DDS output 
frequency in a very complex way.
A very narrow PLL requires a VCO with good short (for averaging times up 
to the inverse PLL bandwidth) term stability.
However if the offset is 500Hz its relatively easy to filter out the 
unwanted sum (or difference) frequency with a PLL using a VCO with good 
short term stability for averaging times of a few tens of millisec. The 
rejection can be improved by using an SSB mixer.


N.B. the author of the paper (and his web page) that you found has 
vanished without trace.
It turns out that the Diophantine frequency synthesis technique was 
patented (US Patent 5267182) some 17 years ago.
His literature search for previous papers/patents cant have been very 
effective/extensive.
Fortunately I managed to download all of his papers before they vanished 
along with the web page.


   

Alternatively if one implements the DDS in an FPGA its possible to
virtually eliminate such spurs using a modified algorithm. However this
requires an external DAC to produce the required output.
 

Got a URL?  What's magic about a FPGA?  Why don't traditional DDS chips use
that modified algorithm?



   


http://www.sdrforum.org/pages/sdr06/sdr06_papers/1.3/1.3-01.pdf
(thanks to Bob Camp for finding this gem)

There's nothing magic about an FPGA, its merely a convenient way of 
implementing the improved algorithm.
There's no way to implement it with a traditional DDS chip as the 
digital section needs to be extensively modified.


DDS chips do not use it because it has only recently been devised.

Bruce


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Re: [time-nuts] oscillator choice question

2010-05-02 Thread Bruce Griffiths

Bob Camp wrote:

Hi

A coupe of issues with mechanical servo tuning:

1) It wears out the tuning capacitor pretty fast. They are designed for a 
limited number of adjustments. They loosen up with a lot of tuning and this 
degrades their stability.

2) It would be much easier to tear apart the mechanical tune OCXO and put in a 
tuning diode than to rig a thermally isolated high resolution servo stepper

3) Mechanical tune arrangements normally  have backlash. That's not an issue as 
long as the servo only goes one way. It becomes a real pain to correct for each 
time you reverse direction.
   
One solution to which is to add (in addition to the servo motor) a 
torque motor to preload the gear train so that the same flank of each 
gear tooth is in contact for both directions of rotation. Zero backlash 
drive reduction systems are also available at some considerable cost.



4) Making a mechanical setup with a minimum step below 1 ppt is going to be 
more than just a simple stepper. A gear chain based system will be pretty 
exciting to work up. Backlash in the gears will add to what ever you have in 
the tune it's self.

5) The tuning on the OCXO may not be monotonic. That's especially true if you 
do indeed run the trimmer at a higher resolution than a normal human could 
adjust it. Tuning reversals tend to drive servo loops a bit crazy.

None of that says that it can't be done. All it says is that it will be hard to 
do well.

What kind of accuracy are you trying to obtain?

Bob

   

Bruce


On May 2, 2010, at 3:18 PM, ch...@yipyap.com wrote:

   

That is a really cool picture.

Can I be like you when I grow up?


I've figured out which of these silvered modules
in this Schomandl sig gen is the oscillator (the one that
got warm).  I have to figure out if it is voltage adjustable
in some way.

Does anyone use mechanical adjustment with a servo,
gear train and microcontroller?

I did hear all of those good advisers telling me to
buy the Thunderbolt.  But I already have these pieces
so...

--
Chris
w0ep


Niels Lueddecke wrote:

 

You see? Don't do it, don't even think about starting.
Go buy a trimble thunderbolt, it will save you LOTS of time!
http://www.dulli.org/pics/20100502%20-%20Clock.jpg
   

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Re: [time-nuts] oscillator choice question

2010-05-01 Thread Bruce Griffiths
If there is no electronic tuning available one can use a DDS based 
synthesiser to produce a corrected output frequency.
However close in spurs will be problematic unless one use a couple of 
simple mix and divide stages or resorts to a Diophantine synthesiser 
using phase noise truncation spur free output frequencies from the DDS 
chip(s).


Alternatively if one implements the DDS in an FPGA its possible to 
virtually eliminate such spurs using a modified algorithm.

However this requires an external DAC to produce the required output.

Bruce

Robert Atkinson wrote:

Hi Chris,The Racal high stability units usually use the 9420 series OCXO's. 
These are good oscillators but do not have electronic tuning as standard. 'they 
are also normally 5MHz. What is the best oscillaor depends on your 
requirements. The two main parameters are phase noise and hold-over 
performance. Hold over is how much the oscillator will drift if the GPS loses 
signal.
Robert G8RPI.  


--- On Sat, 1/5/10, ch...@yipyap.comch...@yipyap.com  wrote:

From: ch...@yipyap.comch...@yipyap.com
Subject: [time-nuts] oscillator choice question
To: time-nuts@febo.com
Date: Saturday, 1 May, 2010, 20:28


I'd like to build a GPS disciplined frequency standard.

I am slowly gathering up pieces.

I have a Trimble Resolution T GPS card that appears to work,
and an antenna for it.

I'm thinking now of the oscillator part.

I have two Racal 1992 counters with the stable oscillator option (probably 04E 
since these are former military units).  I also have an old Schomandl  ND-100M 
Frequenzdecade signal source with an  (I assume) ovenized oscillator w/unknown 
properties.

I'm wondering if I could use an oscillator from one of these
gizmos instead of shelling out real money on ebay?  Speaking of
which, it seems like half the people in China are selling oscillators.
I assume some of them are good for this application and some not
so good?  The usual suspects from HP and Agilent are there, and
they seem to command a pretty good (high) price.  Which is why
I'm eyeing the Schomandl.

Chris
w0ep




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Re: [time-nuts] Frequency Stability of An Individual Oscillator:Negative Values?

2010-04-23 Thread Bruce Griffiths
There has been some work done on the effect of finite correlation 
between oscillator outputs.
In some cases allowing a finite correlation coefficient improves the N 
cornered hat ADEV estimates.
In most cases the oscillators being compared share the same ambient 
environment and thus may exhibit correlated fluctaution due to ambient 
paramaeter (temperature, pressure humidity etc) variations.


Bruce

Bob Camp wrote:

Hi

How to treat a negative is up to you, it's obviously indicating a not real
outcome. Zero is also a not real for realizable oscillators. Most simply
note the result as below floor, drop it, and proceed.

Since the variability of the data is driving the negative results, it's
unlikely that another approach will massively improve things (with the same
data set). The practical answer is to use oscillators with closer noise
performance to reduce the scatter or to improve the data collection method
if it's the limiting factor.

Bob

-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of Kyle Wesson
Sent: Thursday, April 22, 2010 5:07 PM
To: time-nuts@febo.com
Subject: [time-nuts] Frequency Stability of An Individual
Oscillator:Negative Values?

Hello,

I am working to determine the Allan variance of an individual
oscillator from a series of three paired measurements as described in
the paper by Gray and Allan A Method for Estimating the Frequency
Stability of An Individual Oscillator (NIST, 1974,
tf.nist.gov/general/pdf/57.pdf). In this report they make reference to
the statistical uncertainty of the measurement due to ensemble noise
and potential clock phase correlation which can potentially make the
Allan variance for an individual oscillator have a negative value.
They write:

If the noise level of the oscillator being measured is low enough,
and the scatter high enough, equation (4) may occasionally give a
negative value for the variance.

My question is: how should I treat negative variance values in this
case? For example, if my data set were to produce an individual
oscillator Allan variance with a value of -5e-12, should I convert
this value to 0 (ie. the closest valid sigma value to the number since
0= sigma  inf ), take the absolute value of the result (ie. turn
-5e-12 to +5e-12), or drop the result from my estimate of individual
oscillator frequency stability altogether?

Is there another method that will produce estimates of individual
oscillators from an ensemble approach but assures non-negative output
variances?

Thank you in advance,
Kyle

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Re: [time-nuts] FEI FE-5680A

2010-04-01 Thread Bruce Griffiths

Leigh L. Klotz, Jr WA5ZNU wrote:

On 03/24/2010 03:18 PM, Magnus Danielson wrote:

Fellow time-nuts,
...
Second, anything I should keep in mind as I power one up?

...
Cheers,
Magnus


There's a bit of discussion in the archives about the need for a heat 
sink, and also about the whether it's necessary to anneal the case in 
a 400C Hydrogen reducing oven after the SMA modification.  (Although I 
do have access to one, it is over the threshold for things I'm willing 
to do.)


Leigh.

If one were to use a trepaning tool with loose abrasive and plenty of 
water coolant and slowly grinds the required hole through the mu metal 
cover, the thermal stress and mechanical disturbance of the mu-metal 
shield should be minimised precluding the need for hydrogen annealing. 
This is easily done using a drill press and a suitable tool.
The tool can be assembled from brass tubing and rod. Since the forces 
involved are low even soft soldering should suffice.


Water jet cutting should also work well.

Bruce


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Re: [time-nuts] GPS Display clock

2010-03-31 Thread Bruce Griffiths

b...@lysator.liu.se wrote:

Zealand is an island between Denmark and Sweden.
 

Was not aware of that. Lat/Lon?

   

Zeeland is a province of the Netherlands
 

Been there...

   

Bruce
 

--

Björn


   

The name New Zealand originates from the latter via Dutch Cartographers.

Bruce


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Re: [time-nuts] HP10514B Mixers

2010-03-31 Thread Bruce Griffiths

Upload it to the manuals section of Didier's site:
http://www.ko4bb.com/cgi-bin/manuals.pl

Bruce

Brian Kirby wrote:

The manual is about a megabyte - the list will not accept it.

ewkeh...@aol.com wrote:

Is there a way you can post it on time-nuts?
Thank you Bert Kehren


In a message dated 3/30/2010 9:10:19 P.M. Eastern Daylight Time,  
kilodelta4foxm...@gmail.com writes:


We'll  the As are the package with the BNC connector.

The Bs are for OEM  equipment, they had 6 pins and a smaller 
plastic black case  


Turns out they have some of the lowest phase noise specs on  record

I can send the manual, if you  like...

Brian

Mike Feher wrote:
I do not believe that I  am familiar with the 10514B. I probably have 

about 6
or so 10514As  with BNC connectors (most in a metal case and a few in 

epoxy),
and, I  recall from about 40 years ago a 10514A that was a small little 

black
 cube with leads for mounting on a PC board. Naturally, I had to 
take  one
apart back then as that was the fun part. In the late 60's I  
designed a
thick-film phase detector that was used in an ASW system,  where I 
simply

matched the hot carrier HP diodes for a fixed voltage  drop at a given
current. We also wound the toroids, and had an op-amp  on the 
output. Wow,

that was ages ago. Regards - Mike

 Mike B. Feher, N4FS
89 Arnold Blvd.
Howell, NJ, 07731
 732-886-5960





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