Re: [U-Boot] [PATCH] gpio: Adapt PCA9698 to standard GPIO API
On Monday 31 October 2011 09:39:12 Dirk Eibach wrote: > Signed-off-by: Dirk Eibach Acked-by: Stefan Roese Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 05/11] arm, davinci: add support for new spl framework
Hello Scott, Scott Wood wrote: > On 10/30/2011 11:53 PM, Heiko Schocher wrote: >> diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c >> b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c >> new file mode 100644 >> index 000..efc0521 >> --- /dev/null >> +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c >> @@ -0,0 +1,57 @@ [...] >> +#include >> +#include >> +#include > > Does this file use anything from asm/io.h? removed. >> +/* >> + * The main entry for NAND booting. It's necessary that SDRAM is already >> + * configured and available since this code loads the main U-Boot image >> + * from NAND into SDRAM and starts it from there. >> + */ [...] >> +/* >> + * Jump to U-Boot image >> + */ >> +uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; >> +(*uboot)(); >> +} > > This is common to most NAND SPLs. It would be nice to stick this in a > common place (at least the loading part, maybe not the jump). Not > nand_spl_simple.c, as it's utility is not limited to the simple driver. > Maybe drivers/mtd/nand/nand_spl_load.c? moved to drivers/mtd/nand/spl_nand_load.c, also I want to let the jump in this file. I prefer the name "spl_nand_load.c as we have already a CONFIG_SPL_NAND_SIMPLE -> CONFIG_SPL_NAND_LOAD -> spl_nand_load.c Is this OK for you? Shouldn;t we rename nand_spl_simple.c to spl_nand_simple.c also? bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-nds32
Dear Wolfgang, Please pull these 3 patches to your tree. Thanks, Macpaul The following changes since commit ce5207e191c59b3135303fd03b98dd2ac3701ba2: e1000: Allow direct access to the E1000 SPI EEPROM device (2011-10-28 00:37:01 +0200) are available in the git repository at: git://git.denx.de/u-boot-nds32.git master Macpaul Lin (3): nds32: Use getenv_ulong() in place of getenv(), strtoul nds32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment nds32: asm/io.h: add __iormb __iowmb and inline io support arch/nds32/include/asm/cache.h | 11 ++ arch/nds32/include/asm/io.h| 72 +--- arch/nds32/lib/board.c | 12 +- 3 files changed, 65 insertions(+), 30 deletions(-) -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 01/11] usb, davinci: add enable_vbus() weak function
Hello Igor,
Igor Grinberg wrote:
> Hi Heiko,
>
> On 10/31/11 06:53, Heiko Schocher wrote:
>> Signed-off-by: Heiko Schocher
>> Cc: Remy Bohmer
>> Cc: Albert ARIBAUD
>> Cc: Igor Grinberg
>>
>> ---
>> changes for v4:
>> - patch is new since v4, as Igor Grinberg suggested.
>>
>> drivers/usb/musb/davinci.c | 12
>> 1 files changed, 12 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
>> index f56f2df..27dc4bc 100644
>> --- a/drivers/usb/musb/davinci.c
>> +++ b/drivers/usb/musb/davinci.c
>> @@ -78,6 +78,18 @@ static void phy_off(void)
>> writel(USBPHY_OSCPDWN | USBPHY_PHYPDWN, USBPHY_CTL_PADDR);
>> }
>>
>> +#ifndef DAVINCI_DM365EVM
>> +__attribute__((weak))
>> +void enable_vbus(void)
>> +{
>> +/*
>> + * nothing to do, vbus is handled through the cpu.
>> + * Define this function in board code, if it is
>> + * different on your board.
>> + */
>> +}
>> +#endif
>
> I'd suggest, instead of closing the weak declaration inside
> ifdef/ifndef, make it available to all boards with alias.
OK, done.
Thanks for the review.
bye,
Heiko
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Re: [U-Boot] [PATCH v2] nds32: asm/io.h: add __iormb __iowmb and inline io support
Hi Macpaul, 2011/10/25 Macpaul Lin : > 1. This patch add required __iormb and __iowmb to io.h. > This also fix some misbehavior to periphal drivers. > This io.h has been fixed with referencing arm/include/asm/io.h. > 2. This patch replaced macro writeb and readb into inline function. > > Signed-off-by: Macpaul Lin > --- > Changes for v2: > - translate writeb macro into inline function. > > arch/nds32/include/asm/io.h | 72 > +++ > 1 files changed, 52 insertions(+), 20 deletions(-) > Applied to u-boot-nds32/master, thanks. Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Move the SC520 specific pci.h header into an sc520 directory.
Hi Gabe, On Mon, Oct 31, 2011 at 4:23 PM, Gabe Black wrote: > Ok, never mind then. I'm using a script Simon Glass wrote to prepare patches > for submission, so that option will probably need to be added there. > Gabe Yes he should probably add --find-renames to the script! Regards, Simon > > On Fri, Oct 28, 2011 at 9:00 PM, Graeme Russ wrote: >> >> Gabe, >> >> I have already submitted a patch for this: >> >> http://patchwork.ozlabs.org/patch/120011/ >> >> Also, you patch does a delete then create rather than a file rename - When >> you use git-format-patch, use the --find-renames option >> >> Regards, >> >> Graeme >> >> On 29/10/11 09:34, Gabe Black wrote: >> > The arch/i386/include/asm/ic/pci.h header file include definitions which >> > were >> > not generic to i386 and where specifically for SC520. This change moves >> > that >> > header into a directory which more accurately reflects that. >> > >> > Signed-off-by: Gabe Black >> > --- >> > arch/x86/include/asm/ic/pci.h | 79 >> > --- >> > arch/x86/include/asm/ic/sc520/pci.h | 79 >> > +++ >> > 2 files changed, 79 insertions(+), 79 deletions(-) >> > delete mode 100644 arch/x86/include/asm/ic/pci.h >> > create mode 100644 arch/x86/include/asm/ic/sc520/pci.h >> > >> > diff --git a/arch/x86/include/asm/ic/pci.h >> > b/arch/x86/include/asm/ic/pci.h >> > deleted file mode 100644 >> > index 12ba656..000 >> > --- a/arch/x86/include/asm/ic/pci.h >> > +++ /dev/null >> > @@ -1,79 +0,0 @@ >> > -/* >> > - * (C) Copyright 2002 >> > - * Daniel Engström, Omicron Ceti AB . >> > - * >> > - * See file CREDITS for list of people who contributed to this >> > - * project. >> > - * >> > - * This program is free software; you can redistribute it and/or >> > - * modify it under the terms of the GNU General Public License as >> > - * published by the Free Software Foundation; either version 2 of >> > - * the License, or (at your option) any later version. >> > - * >> > - * This program is distributed in the hope that it will be useful, >> > - * but WITHOUT ANY WARRANTY; without even the implied warranty of >> > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> > - * GNU General Public License for more details. >> > - * >> > - * You should have received a copy of the GNU General Public License >> > - * along with this program; if not, write to the Free Software >> > - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, >> > - * MA 02111-1307 USA >> > - */ >> > - >> > -#ifndef _ASM_IC_SC520_PCI_H_ >> > -#define _ASM_IC_SC520_PCI_H_ 1 >> > - >> > -/* bus mapping constants (used for PCI core initialization) */ >> > >> > >> > >> > >> > /* >> > bus mapping constants */ >> > -#define SC520_REG_ADDR 0x0cf8 >> > -#define SC520_REG_DATA 0x0cfc >> > - >> > -#define SC520_ISA_MEM_PHYS 0x >> > -#define SC520_ISA_MEM_BUS 0x >> > -#define SC520_ISA_MEM_SIZE 0x0100 >> > - >> > -#define SC520_ISA_IO_PHYS 0x >> > -#define SC520_ISA_IO_BUS 0x >> > -#define SC520_ISA_IO_SIZE 0x1000 >> > - >> > -/* PCI I/O space from 0x1000 to 0xdfff >> > - * (make 0xe000-0xfdff available for stuff like PCCard boot) */ >> > -#define SC520_PCI_IO_PHYS 0x1000 >> > -#define SC520_PCI_IO_BUS 0x1000 >> > -#define SC520_PCI_IO_SIZE 0xd000 >> > - >> > -/* system memory from 0x to 0x0fff */ >> > -#define SC520_PCI_MEMORY_PHYS 0x >> > -#define SC520_PCI_MEMORY_BUS 0x >> > -#define SC520_PCI_MEMORY_SIZE 0x1000 >> > - >> > -/* PCI bus memory from 0x1000 to 0x26ff >> > - * (make 0x2700 - 0x27ff available for stuff like PCCard boot) >> > */ >> > -#define SC520_PCI_MEM_PHYS 0x1000 >> > -#define SC520_PCI_MEM_BUS 0x1000 >> > -#define SC520_PCI_MEM_SIZE 0x1700 >> > - >> > -/* pin number used for PCI interrupt mappings */ >> > -#define SC520_PCI_INTA 0 >> > -#define SC520_PCI_INTB 1 >> > -#define SC520_PCI_INTC 2 >> > -#define SC520_PCI_INTD 3 >> > -#define SC520_PCI_GPIRQ0 4 >> > -#define SC520_PCI_GPIRQ1 5 >> > -#define SC520_PCI_GPIRQ2 6 >> > -#define SC520_PCI_GPIRQ3 7 >> > -#define SC520_PCI_GPIRQ4 8 >> > -#define SC520_PCI_GPIRQ5 9 >> > -#define SC520_PCI_GPIRQ6 10 >> > -#define SC520_PCI_GPIRQ7 11 >> > -#define SC520_PCI_GPIRQ8 12 >> > -#define SC520_PCI_GPIRQ9 13 >> > -#define SC520_PCI_GPIRQ10 14 >> > - >> > -extern int sc520_pci_ints[]; >> > - >> > -void pci_sc520_init(struct pci_controller *hose); >> > -int pci_set_regions(struct pci_controller *hose); >> > -int pci_sc520_set_irq(int pci_pin, int irq); >> > - >> > -#endif >> > diff --git a/arch/x86/include/asm/ic/sc520/pci.h >> > b/arch/x86/include/asm/ic/sc520/pci.h >> > new file mode 100644 >> > index 000..12ba656 >> > --- /dev/null >> > +++ b/arch/x86/include/asm/ic/sc520/pci.h >> > @@ -
Re: [U-Boot] [PATCH 2/3] nds32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Hi Macpaul, 2011/10/25 Anton Staaf : > On Mon, Oct 24, 2011 at 2:46 AM, Macpaul Lin wrote: >> Add ARCH_DMA_MINALIGN definition to asm/cache.h >> >> Signed-off-by: Macpaul Lin > > Acked-by: Anton Staaf > Applied to u-boot-nds32/master, thanks. Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] nds32: Use getenv_ulong() in place of getenv(), strtoul
Hi Macpaul, 2011/10/24 Macpaul Lin : > This changes the board code to use the new getenv_ulong() function. > > Signed-off-by: Macpaul Lin > --- > arch/nds32/lib/board.c | 12 ++-- > 1 files changed, 2 insertions(+), 10 deletions(-) Applied to u-boot-nds32/master, thanks. Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] cmd_cache: use cache/invalidate functions available in common.h
flush_dcache()/flush_icache() aren't defined in common.h,
flush_dcache_all()/invalidate_icache_all() however are.
Let the icache and dcache commands use those instead.
Signed-off-by: Stefan Kristiansson
---
common/cmd_cache.c | 16
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/common/cmd_cache.c b/common/cmd_cache.c
index 9778d3b..360136c 100644
--- a/common/cmd_cache.c
+++ b/common/cmd_cache.c
@@ -30,10 +30,10 @@
static int parse_argv(const char *);
-void __weak flush_icache(void)
+void __weak invalidate_icache_all(void)
{
- /* please define arch specific flush_icache */
- puts("No arch specific flush_icache available!\n");
+ /* please define arch specific invalidate_icache_all */
+ puts("No arch specific invalidate_icache_all available!\n");
}
int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -45,7 +45,7 @@ int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
break;
case 1: icache_enable ();
break;
- case 2: flush_icache();
+ case 2: invalidate_icache_all();
break;
}
/* FALL TROUGH */
@@ -59,10 +59,10 @@ int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[])
return 0;
}
-void __weak flush_dcache(void)
+void __weak flush_dcache_all(void)
{
- puts("No arch specific flush_dcache available!\n");
- /* please define arch specific flush_dcache */
+ puts("No arch specific flush_dcache_all available!\n");
+ /* please define arch specific flush_dcache_all */
}
int do_dcache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -74,7 +74,7 @@ int do_dcache ( cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
break;
case 1: dcache_enable ();
break;
- case 2: flush_dcache();
+ case 2: flush_dcache_all();
break;
}
/* FALL TROUGH */
--
1.7.5.4
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Re: [U-Boot] [PATCH 2/3] nds32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Hi Mike, 2011/10/31 Mike Frysinger : > On Friday 28 October 2011 00:46:38 馬克泡 wrote: > you've got a maintainer tree now: >http://git.denx.de/?p=u-boot/u-boot-nds32.git > > so you should be gathering all the NDS32 patches and pushing to wolfgang. > please see the documentation here for the process: >http://www.denx.de/wiki/U-Boot/DevelopmentProcess > > short answer: >- fixes should get pushed at any time >- everything else should get pushed during merge window > -mike > Thanks for your hint. Will do patch collections soon. -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/85xx: Add support for Book-E MMU Arch v2.0
A few of the config registers changed definition between MMU v1.0 and
MMUv2.0. The new e6500 core from Freescale implements v2.0 of the
architecture.
Specifically, how we determine the size of TLB entries we support in the
variable size (or TLBCAM/TLB1) array is specified in a new register
(TLBnPS - TLB n Page size) instead of via TLBnCFG.
Signed-off-by: Kumar Gala
---
arch/powerpc/cpu/mpc85xx/tlb.c | 12
arch/powerpc/include/asm/processor.h |6 ++
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 01a3561..80ad04a 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -252,16 +252,20 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int
memsize_in_meg)
unsigned int tlb_size;
unsigned int wimge = 0;
unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
- unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
+ unsigned int max_cam;
u64 size, memsize = (u64)memsize_in_meg << 20;
#ifdef CONFIG_SYS_PPC_DDR_WIMGE
wimge = CONFIG_SYS_PPC_DDR_WIMGE;
#endif
size = min(memsize, CONFIG_MAX_MEM_MAPPED);
-
- /* Convert (4^max) kB to (2^max) bytes */
- max_cam = max_cam * 2 + 10;
+ if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
+ /* Convert (4^max) kB to (2^max) bytes */
+ max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
+ } else {
+ /* Convert (2^max) kB to (2^max) bytes */
+ max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
+ }
for (i = 0; size && i < 8; i++) {
int ram_tlb_index = find_free_tlbcam();
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 1b96b84..4e32639 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -513,7 +513,13 @@
#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */
#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */
+#define SPRN_TLB0PS0x158 /* TLB 0 Page Size Register */
+#define SPRN_TLB1PS0x159 /* TLB 1 Page Size Register */
#define SPRN_MMUCSR0 0x3f4 /* MMU control and status register 0 */
+#define SPRN_MMUCFG0x3F7 /* MMU Configuration Register */
+#define MMUCFG_MAVN0x0003 /* MMU Architecture Version Number */
+#define MMUCFG_MAVN_V1 0x /* v1.0 */
+#define MMUCFG_MAVN_V2 0x0001 /* v2.0 */
#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */
#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
--
1.7.3.4
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Re: [U-Boot] [PATCH] The type expected by %zd is ssize_t, but it was being passed a size_t.
This was necessary at one point, but I've been trying to get that warning to happen again so I can add it to the change message and it won't. These early patches were done 5 or 6 months ago with a different version of the repository, a different compiler, on a different system, etc., so it'd be tricky to figure out exactly what was triggering this before. I think the changed version is genuinely more correct, but since I can't get gcc to complain now it doesn't seem like that serious a problem. I'd say take it or leave it as you see fit, and I'll try a few more things to see if I can get it to happen again. Gabe On Fri, Oct 28, 2011 at 4:23 PM, Mike Frysinger wrote: > generally the subject/changelog should be more of the form: > > cmd_nvedit: fix printf warning > > gcc warns when using %zd with size_t types since the correct format is %zu: > > > otherwise, the change (in theory) makes perfect sense to me ... i > would ack if not for the commit summary/log ;) > -mike > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Conflicting definitions of flush_dcache
On 11/01/2011 02:32 AM, Mike Frysinger wrote: > On Monday 31 October 2011 03:56:25 Stefan Kristiansson wrote: >> so my gut feeling is that nios2 and the 2 ethernet drivers should be >> changed to use for example flush_dcache_range(?) > > correct Thanks. I will fix the nios2 and the two net drivers to use flush_dcache_range(?). - Thomas > >> Perhaps cmd_cache.c should also be fixed to use flush_dcache_all()? >> flush_icache() ofcourse suffer from the same problem. > > that sounds reasonable. the prototypes also need to get added to > include/common.h ... > -mike > > > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Porting U-boot
I am trying to port u-boot to multiple soc/boards from an arm vendor. I would appreciate any input on the following approach 1)The controller instance on various SOC are the same with minor differences in the fifo size, gpios, clocks. 2)In order to help the porting effort, my idea is to add soc/board neutral driver header files under the include/asm/ directory. Possibly creating a vendor directory under there ie arch/arm/include/asm/($vendor)/ (Different from the soc specific header files arch-$SOC) 3)Implement driver in respective driver category drivers/<$category> 4)Allow the SOC specific files to define the resources for specific peripherals based on the header files from 2) Thanks ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/4] EHCI: adjust for mx5
> Add macros and structures needed by Efika USB support code. > Move shared offset and bits definitions into common header file. > > Signed-off-by: Jana Rapava > Cc: Marek Vasut > Cc: Remy Bohmer > Cc: Stefano Babic > Cc: Igor Grinberg > --- > Changes for v2: > - whitespace and coding style changes (no actual changes) Do you see the contradiction here ? M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/4] EHCI: adjust for mx5
Add macros and structures needed by Efika USB support code.
Move shared offset and bits definitions into common header file.
Signed-off-by: Jana Rapava
Cc: Marek Vasut
Cc: Remy Bohmer
Cc: Stefano Babic
Cc: Igor Grinberg
---
Changes for v2:
- whitespace and coding style changes (no actual changes)
drivers/usb/host/ehci-mxc.c | 31 +
include/usb/ehci-fsl.h | 146 ++-
2 files changed, 148 insertions(+), 29 deletions(-)
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index fde1f0f..2c1295f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -27,31 +27,6 @@
#include
#include
-#define USBCTRL_OTGBASE_OFFSET 0x600
-
-#ifdef CONFIG_MX25
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6)
-#define MX25_USB_CTRL_HSTD_BIT (1<<5)
-#define MX25_USB_CTRL_USBTE_BIT(1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT(1<<3)
-#endif
-
-#ifdef CONFIG_MX31
-#define MX31_OTG_SIC_SHIFT 29
-#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
-#define MX31_OTG_PM_BIT(1 << 24)
-
-#define MX31_H2_SIC_SHIFT 21
-#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
-#define MX31_H2_PM_BIT (1 << 16)
-#define MX31_H2_DT_BIT (1 << 5)
-
-#define MX31_H1_SIC_SHIFT 13
-#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
-#define MX31_H1_PM_BIT (1 << 8)
-#define MX31_H1_DT_BIT (1 << 4)
-#endif
-
static int mxc_set_usbcontrol(int port, unsigned int flags)
{
unsigned int v;
@@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
switch (port) {
case 0: /* OTG port */
- v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+ v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK)
- << MX31_OTG_SIC_SHIFT;
+ << MXC_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
- v |= MX31_OTG_PM_BIT;
+ v |= MXC_OTG_PM_BIT;
break;
case 1: /* H1 port */
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..f957c65 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -169,6 +169,106 @@
#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
#endif
+#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
+#define USBCTRL_OTGBASE_OFFSET 0x600
+#endif
+
+#ifdef CONFIG_MX25
+#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1 << 6)
+#define MX25_USB_CTRL_HSTD_BIT (1 << 5)
+#define MX25_USB_CTRL_USBTE_BIT(1 << 4)
+#define MX25_USB_CTRL_OCPOL_OTG_BIT(1 << 3)
+#endif
+
+#ifdef CONFIG_MX31
+#define MX31_H2_SIC_SHIFT 21
+#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
+#define MX31_H2_PM_BIT (1 << 16)
+#define MX31_H2_DT_BIT (1 << 5)
+
+#define MX31_H1_SIC_SHIFT 13
+#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
+#define MX31_H1_PM_BIT (1 << 8)
+#define MX31_H1_DT_BIT (1 << 4)
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
+/* offset for first USB CTRL register */
+#define MX5_CTRL_REGS_OFFSET 0x800
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
+/* USB_CTRL register bits of interest */
+#define MXC_OTG_SIC_SHIFT 29
+#define MXC_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
+#define MXC_OTG_WUE(1 << 27)
+#define MXC_OTG_PM (1 << 24)
+#endif
+
+#ifdef CONFIG_MX51
+#define MX51_REGISTER_LAYOUT_LENGTH0x200
+
+/* Register offsets for MX51 */
+#define MX51_OTG_ID0x000
+#define MX51_UH1_ID0x200
+#define MX51_UH2_ID0x400
+
+/* USB_CTRL register bits of interest */
+#define MX51_OTG_PM(1 << 24)
+#define MX51_H1_ULPI_IE(1 << 12)
+#define MX51_H1_WUE(1 << 11)
+#define MX51_H1_PM (1 << 8)
+
+/* PHY_CTRL_0 register bits of interest */
+#define MX51_OTG_OVERCURD (1 << 8)
+#define MX51_EHCI_POWERPINSE (1 << 5)
+
+/* PHY_CTRL_1 register bits of interest */
+#define MX51_SYSCLOCK_24_MHZ (1 << 0)
+#define MX51_SYSCLOCK_MASK (0x3)
+
+/* USB_CTRL_1 register bits of interest */
+#define MX51_H1_EXTCLKE(1 << 25)
+
+/* USB Host 2 CTRL register bits of interest */
+#define MX51_H2_ULPI_IE(1 << 8)
+#define MX51_H2_WUE(1 << 7)
+#define MX51_H2_PM (1 << 4)
+
+/* PORTSCx bits of interest */
+#define MX51_ULPI_MODE_MASK(2 << 30)
+#define MX51_16BIT_UTMI(1 << 28)
+
+/* USBCMD bits of interest */
+#define MX51_ITC_IMMEDIATE_MASK(0xff << 16)
+#endif
+
+/*
+* ULPI
+*/
+#define ULPI_ID_REGS_COUNT 4
+#define ULPI_TEST_VALUE0x55
+#define ULPI_TIMEOUT 1000 /* some re
Re: [U-Boot] [PATCH] Move the SC520 specific pci.h header into an sc520 directory.
Ok, never mind then. I'm using a script Simon Glass wrote to prepare patches for submission, so that option will probably need to be added there. Gabe On Fri, Oct 28, 2011 at 9:00 PM, Graeme Russ wrote: > Gabe, > > I have already submitted a patch for this: > > http://patchwork.ozlabs.org/patch/120011/ > > Also, you patch does a delete then create rather than a file rename - When > you use git-format-patch, use the --find-renames option > > Regards, > > Graeme > > On 29/10/11 09:34, Gabe Black wrote: > > The arch/i386/include/asm/ic/pci.h header file include definitions which > were > > not generic to i386 and where specifically for SC520. This change moves > that > > header into a directory which more accurately reflects that. > > > > Signed-off-by: Gabe Black > > --- > > arch/x86/include/asm/ic/pci.h | 79 > --- > > arch/x86/include/asm/ic/sc520/pci.h | 79 > +++ > > 2 files changed, 79 insertions(+), 79 deletions(-) > > delete mode 100644 arch/x86/include/asm/ic/pci.h > > create mode 100644 arch/x86/include/asm/ic/sc520/pci.h > > > > diff --git a/arch/x86/include/asm/ic/pci.h > b/arch/x86/include/asm/ic/pci.h > > deleted file mode 100644 > > index 12ba656..000 > > --- a/arch/x86/include/asm/ic/pci.h > > +++ /dev/null > > @@ -1,79 +0,0 @@ > > -/* > > - * (C) Copyright 2002 > > - * Daniel Engström, Omicron Ceti AB . > > - * > > - * See file CREDITS for list of people who contributed to this > > - * project. > > - * > > - * This program is free software; you can redistribute it and/or > > - * modify it under the terms of the GNU General Public License as > > - * published by the Free Software Foundation; either version 2 of > > - * the License, or (at your option) any later version. > > - * > > - * This program is distributed in the hope that it will be useful, > > - * but WITHOUT ANY WARRANTY; without even the implied warranty of > > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > - * GNU General Public License for more details. > > - * > > - * You should have received a copy of the GNU General Public License > > - * along with this program; if not, write to the Free Software > > - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > > - * MA 02111-1307 USA > > - */ > > - > > -#ifndef _ASM_IC_SC520_PCI_H_ > > -#define _ASM_IC_SC520_PCI_H_ 1 > > - > > -/* bus mapping constants (used for PCI core initialization) */ > > > > >/* > bus mapping constants */ > > -#define SC520_REG_ADDR 0x0cf8 > > -#define SC520_REG_DATA 0x0cfc > > - > > -#define SC520_ISA_MEM_PHYS 0x > > -#define SC520_ISA_MEM_BUS0x > > -#define SC520_ISA_MEM_SIZE 0x0100 > > - > > -#define SC520_ISA_IO_PHYS0x > > -#define SC520_ISA_IO_BUS 0x > > -#define SC520_ISA_IO_SIZE0x1000 > > - > > -/* PCI I/O space from 0x1000 to 0xdfff > > - * (make 0xe000-0xfdff available for stuff like PCCard boot) */ > > -#define SC520_PCI_IO_PHYS0x1000 > > -#define SC520_PCI_IO_BUS 0x1000 > > -#define SC520_PCI_IO_SIZE0xd000 > > - > > -/* system memory from 0x to 0x0fff */ > > -#define SC520_PCI_MEMORY_PHYS 0x > > -#define SC520_PCI_MEMORY_BUS0x > > -#define SC520_PCI_MEMORY_SIZE0x1000 > > - > > -/* PCI bus memory from 0x1000 to 0x26ff > > - * (make 0x2700 - 0x27ff available for stuff like PCCard boot) > */ > > -#define SC520_PCI_MEM_PHYS 0x1000 > > -#define SC520_PCI_MEM_BUS0x1000 > > -#define SC520_PCI_MEM_SIZE 0x1700 > > - > > -/* pin number used for PCI interrupt mappings */ > > -#define SC520_PCI_INTA 0 > > -#define SC520_PCI_INTB 1 > > -#define SC520_PCI_INTC 2 > > -#define SC520_PCI_INTD 3 > > -#define SC520_PCI_GPIRQ0 4 > > -#define SC520_PCI_GPIRQ1 5 > > -#define SC520_PCI_GPIRQ2 6 > > -#define SC520_PCI_GPIRQ3 7 > > -#define SC520_PCI_GPIRQ4 8 > > -#define SC520_PCI_GPIRQ5 9 > > -#define SC520_PCI_GPIRQ6 10 > > -#define SC520_PCI_GPIRQ7 11 > > -#define SC520_PCI_GPIRQ8 12 > > -#define SC520_PCI_GPIRQ9 13 > > -#define SC520_PCI_GPIRQ10 14 > > - > > -extern int sc520_pci_ints[]; > > - > > -void pci_sc520_init(struct pci_controller *hose); > > -int pci_set_regions(struct pci_controller *hose); > > -int pci_sc520_set_irq(int pci_pin, int irq); > > - > > -#endif > > diff --git a/arch/x86/include/asm/ic/sc520/pci.h > b/arch/x86/include/asm/ic/sc520/pci.h > > new file mode 100644 > > index 000..12ba656 > > --- /dev/null > > +++ b/arch/x86/include/asm/ic/sc520/pci.h > > @@ -0,0 +1,79 @@ > > +/* > > + * (C) Copyright 2002 > > + * Daniel Engström, Omicron Ceti AB . > > + * > > + * See file CREDITS for list of people who contributed to this > > + * project. > > + * > > + * This program is free software; you can redistribute it and/or > > + * modify it under the terms of the
Re: [U-Boot] [PATCH 3/4] OneNAND: Add simple OneNAND SPL
On 10/31/2011 08:23 AM, Marek Vasut wrote:
> +inline uint16_t onenand_readw(uint32_t addr)
> +{
> + return readw(CONFIG_SYS_ONENAND_BASE + addr);
> +}
> +
> +inline void onenand_writew(uint16_t value, uint32_t addr)
> +{
> + writew(value, CONFIG_SYS_ONENAND_BASE + addr);
> +}
static
> +#define onenand_block_address(block)(block)
> +#define onenand_sector_address(page)(page << 2)
> +#define onenand_buffer_address()((1 << 3) << 8)
> +#define onenand_bufferram_address(block)(0)
Space rather than tab after #define
> +void spl_onenand_get_geometry(struct spl_onenand_data *data)
> +{
> + uint32_t tmp;
> + uint32_t dev_id, density;
> +
> + /* Default geometry -- 2048b page, 128k erase block. */
> + data->pagesize = 2048;
> + data->erasesize = 0x2;
> +
> + tmp = onenand_readw(ONENAND_REG_TECHNOLOGY);
> + if (tmp)
> + goto dev_4k;
> +
> + dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
> + density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
> + density &= ONENAND_DEVICE_DENSITY_MASK;
> +
> + if (density < ONENAND_DEVICE_DENSITY_4Gb)
> + return;
> +
> + if (dev_id & ONENAND_DEVICE_IS_DDP)
> + return;
> +
> + /* 4k device geometry -- 4096b page, 256k erase block. */
> +dev_4k:
> + data->pagesize = 4096;
> + data->erasesize = 0x4;
> +}
This seems like a gratuitous use of goto...
> +int spl_onenand_read_block(uint32_t block, uint8_t *buf, uint32_t *read)
> +{
> + struct spl_onenand_data data;
> + uint32_t page;
> + int ret;
> +
> + spl_onenand_get_geometry(&data);
> +
> + for (page = 0; page < ONENAND_PAGES_PER_BLOCK; page++) {
> + ret = spl_onenand_read_page(block, page, buf, data.pagesize);
> + if (ret)
> + return ret;
> + buf += data.pagesize;
> + }
Shouldn't this do bad block skipping rather than error on the first bad
block it sees? The current onenand IPL does this.
> + *read = ((block * ONENAND_PAGES_PER_BLOCK) + page) * data.pagesize;
We only read one block here, but we return the byte address of the next
block? A little odd, and if it's really what's intended, needs to be
documented.
> diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h
> index 92279d5..66828ce 100644
> --- a/include/onenand_uboot.h
> +++ b/include/onenand_uboot.h
> @@ -16,6 +16,8 @@
>
> #include
>
> +#ifndef CONFIG_SPL_BUILD
> +
> /* Forward declarations */
> struct mtd_info;
> struct mtd_oob_ops;
> @@ -52,4 +54,20 @@ extern int flexonenand_set_boundary(struct mtd_info *mtd,
> int die,
> extern void s3c64xx_onenand_init(struct mtd_info *);
> extern void s3c64xx_set_width_regs(struct onenand_chip *);
>
> +#else
> +
> +#define ONENAND_PAGES_PER_BLOCK 64
> +
> +struct spl_onenand_data {
> + uint32_tpagesize;
> + uint32_terasesize;
> +};
> +
> +void spl_onenand_get_geometry(struct spl_onenand_data *data);
> +int spl_onenand_read_page(uint32_t block, uint32_t page,
> + uint8_t *buf, int pagesize);
> +int spl_onenand_read_block(uint32_t block, uint8_t *buf, uint32_t *read);
> +
> +#endif
Do these really need to be #ifdeffed?
-Scott
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Re: [U-Boot] [PATCH 4/4] PXA: Adapt Voipac PXA270 to OneNAND SPL
On 10/31/2011 08:23 AM, Marek Vasut wrote:
> Signed-off-by: Marek Vasut
> Cc: Albert ARIBAUD
> ---
> board/vpac270/Makefile|6 ++
> board/vpac270/onenand.c | 136
> +
> board/vpac270/vpac270.c |2 +
> include/configs/vpac270.h | 25 +++--
> 4 files changed, 164 insertions(+), 5 deletions(-)
> create mode 100644 board/vpac270/onenand.c
>
> diff --git a/board/vpac270/Makefile b/board/vpac270/Makefile
> index b5c60fd..f25822f 100644
> --- a/board/vpac270/Makefile
> +++ b/board/vpac270/Makefile
> @@ -23,7 +23,13 @@ include $(TOPDIR)/config.mk
>
> LIB = $(obj)lib$(BOARD).o
>
> +ifndef CONFIG_SPL_BUILD
> COBJS:= vpac270.o
> +endif
> +
> +ifdefCONFIG_SPL_BUILD
> +COBJS:= onenand.o
> +endif
else?
> SRCS := $(COBJS:.o=.c)
> OBJS := $(addprefix $(obj),$(COBJS))
> diff --git a/board/vpac270/onenand.c b/board/vpac270/onenand.c
> new file mode 100644
> index 000..50de2ab
> --- /dev/null
> +++ b/board/vpac270/onenand.c
> @@ -0,0 +1,136 @@
> +/*
> + * Voipac PXA270 OneNAND SPL
> + *
> + * Copyright (C) 2011 Marek Vasut
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +
> +extern void pxa_dram_init(void);
> +
> +inline void spl_copy_self(void)
> +{
> + extern uint32_t _end;
> + struct spl_onenand_data data;
> + uint32_t page;
> + uint32_t total_bytes = (uint32_t)&_end - CONFIG_SPL_TEXT_BASE;
> + uint32_t total_pages;
> + uint8_t *addr = (uint8_t *)CONFIG_SPL_TEXT_BASE;
> + int ret;
> +
> + spl_onenand_get_geometry(&data);
> +
> + /* The page can be either 2k or 4k, avoid using DIV_ROUND_UP. */
> + total_pages = total_bytes >> 11;
> + if (data.pagesize == 4096)
> + total_pages >>= 1;
total_bytes / 2048 and total_pages / 2 are more readable and should
generate exactly the same code.
> + for (page = 0; page <= total_pages; page++) {
> + ret = spl_onenand_read_page(0, page, addr, data.pagesize);
> + if (ret)
> + total_pages++;
> + else
> + addr += data.pagesize;
> + }
> +}
You want to skip to the next block if spl_onenand_read_page() fails
(which can occur after you've already read some of the block).
How much of this is board-specific?
> +inline void spl_copy_uboot(void)
> +{
> + uint8_t *addr = (uint8_t *)CONFIG_SYS_TEXT_BASE;
> + struct spl_onenand_data data;
> + uint32_t total_pages;
> + uint32_t block;
> + uint32_t page, rpage;
> + int ret;
> +
> + spl_onenand_get_geometry(&data);
> +
> + /* The page can be either 2k or 4k, avoid using DIV_ROUND_UP. */
> + total_pages = CONFIG_SPL_ONENAND_LOAD_SIZE >> 11;
> + page = CONFIG_SPL_ONENAND_LOAD_ADDR >> 11;
> + if (data.pagesize == 4096) {
> + total_pages >>= 1;
> + page >>= 1;
> + }
> +
> + for (; page <= total_pages; page++) {
> + block = page >> 6;
> + rpage = page & 0xff;
> + ret = spl_onenand_read_page(block, rpage, addr, data.pagesize);
> + if (ret)
> + total_pages++;
> + else
> + addr += data.pagesize;
> + }
> +}
What is so different about this compared to spl_copy_self, that warrants
such duplication? Can't you just pass in offset, length, and
destination as parameters? Or just have the OneNAND SPL driver export
nand_spl_load_image(), as any other NAND SPL driver would?
> +inline void board_init_f(unsigned long unused)
> +{
> + uint32_t tmp;
> +
> + asm volatile("mov %0, pc" : "=r"(tmp));
> + tmp >>= 24;
> +
> + /* The code runs from OneNAND RAM, copy SPL to SRAM and execute it. */
> + if (tmp == 0) {
> + spl_copy_self();
> + asm volatile("mov pc, %0" : : "r"(CONFIG_SPL_TEXT_BASE));
> + }
Is it not possible to use a simple memcpy for spl_copy_self()? If the
CPU can run the code, you'd think it could read it.
> +inline void board_init_r(gd_t *id, ulong dest_addr)
> +{
> + for (;;)
> + ;
> +}
This doesn't seem like a
Re: [U-Boot] [PATCH 3/9] arm: Move CP15 init out of cpu_init_crit()
>From one of our HW engineers: The AVP does not have a CP15. As this thread speculates, it is an ARM7TDMI which is a basic ARM V4 core with no ARM co-processors or MMU. Also, ARM app note 99 (DAI0099C_core_type_rev_id.pdf) says the same thing. HTH, Tom > -Original Message- > From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass > Sent: Monday, October 31, 2011 2:44 PM > To: Albert ARIBAUD > Cc: U-Boot Mailing List; Tom Warren; Stephen Warren > Subject: Re: [PATCH 3/9] arm: Move CP15 init out of cpu_init_crit() > > Hi Albert, > > On Sun, Oct 30, 2011 at 3:16 AM, Albert ARIBAUD > wrote: > > Hi Simon, > > > > Le 29/10/2011 02:36, Simon Glass a écrit : > >> > >> Hi Albert, > >> > >> On Thu, Oct 27, 2011 at 10:09 PM, Albert ARIBAUD > >> wrote: > >>> > >>> Le 28/10/2011 03:43, Simon Glass a écrit : > >>> > The test was > > mrc p15, 0, r0, c0, c0, 0 @ get ID register > and r0, r0, #0xf @ get architecture > cmp r0, #0xf @ check for> ARMv6 > movne pc, lr @ else skip cache init > > Unfortunately I think it is a plain ARM7TDMI with no CP15. > >>> > >>> What about other fields in r0 right after mrc? > >> > >> I don't really understand that sentence, sorry. > >> > >> The ARM7TDMI does not have a CP15 and aborts if I try to access it. > >> Just in case there is something odd going on I checked with DSTREAM / > >> RVdebug and it definitely doesn't have a CP15. [as Ford Prefect would > >> say, I counted them twice] > > > > Ok, so debug tools do not show cp15. But tools can be tailored to what > tool > > makes think is needed -- I could tell about some debugging tools that will > > not let me see all I want a core because the debug designers had finite > > resources and what I wanted was not a priority to them. > > Ye of little faith... > > > > > OTOH, according to ARM, ARM7DTMI is an ARMv4T architecture, and indeed > cp15 > > is mandatory only for ARMv6 and up, but ARM also states cp15 support was a > > de facto standard already for ARMv4. > > Yes it is de facto when you have a core with that support - typically > an MMU and caches. But in that case it would have three digits, as in > ARM720T, rather than ARM7TDMI. It is definitely an ARM7TDMI (actually > -S) core in the datasheet, and there is no external CP15 block shown, > etc. (Although I can see a cache!) > > > > > So I am left with the question: would the Tegra2 AVP be the only ARM > > implementation supported by U-Boot that does not have a cp15? That is > > possible, but I want direct testimony from Nividia. > > No there are lots and lots of ARM7TDMIs out there, just not that many > that run U-Boot - and Linux is hard without an MMU. But even in the > U-Boot tree we have the s3c44b0 cpu which seems to be a plain > ARM7TDMI. > > In terms of direct testimony, two engineers are on this thread and may > wish to chime in. The datasheet is pretty clear to me... > > > > > This is why I asked about the Tegra2 TRM, or whatever Nvidia calls it, in > > case it would explicitely state if AVP has cp15 support or not. Failing > > See above, it clearly states ARM7TDMI-S. > > > that, I'd be ok with experimenting but through the AVP, not through > > debugging tools -- encoding a cp15 MIDR read in the U-Boot startup code, > > step through it with the debugger and see if it causes an UND or not, and > if > > not, what is the hex value of r0 -- maybe that is exactly what you did, > but > > I am not 100% sure it is, hence my insistence. > > OK I have done this, and yes the AVP definitely takes the undef > exception when you execute: > > mrc p15, 0, r0, c0, c0, 0 > > > > > I am especially surprised that a recent core be synthesized without a > means > > for run-time core identification, especially in a design with two ARM > cores. > > The -S means synthesized. It does have its own method of > identification as I mentioned. There is a Tegra-specific register that > I can read. > > > > >> The simplest thing I have been able to think of that does not involve > >> exceptions, differing instruction behaviour, doing the init later or > >> putting in some Tegra-specific code is to check for the existence of > >> the Q bit in the CPSR (actually APSR on ARMv7). This does seem to work > >> and I have verified both in my old 1996 ARM ARM DDI 0100B and the > >> ARMv7-A one (DDI 0406B) that from an architecture point of view this > >> should work. The Q bit is RAZ on ARMv4T. > > > > This could hep if we really cannot access the Main ID Register on the AVP. > > OK, well I will send a patch set up with this change. > > > > >> I believe this will cope with the Cortex-A7 / A-15 combinations and > >> possibly even Cortex-R4 / A-15 although I have not tested this. I > >> suppose we can deal with this when it becomes an issue. > >> > >> So I have redone this one patch with that in mind, and adjusted the > >> series slightl
Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
Hi Mike,
On Mon, Oct 31, 2011 at 3:37 PM, Mike Frysinger wrote:
> On Monday 31 October 2011 17:49:58 Simon Glass wrote:
>> On Mon, Oct 31, 2011 at 2:15 PM, Tabi Timur-B04825 wrote:
>> > On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger wrote:
>> >> -static void print_num(const char *, ulong);
>> >> +__maybe_unused
>> >> +static void print_num(const char *name, ulong value)
>> >> +{
>> >> + printf("%-12s= 0x%08lX\n", name, value);
>> >> +}
>> >
>> > Will the linker remove the functions from the binary if they are unusued?
>>
>> If built with -ffunction-sections and --gc-sections,, then the linker
>> can do this sort of thing. Otherwise it can't, but the compiler can. I
>> just tested Mike's code on my ARM compiler to make sure and it happily
>> removed print_eth() when it was not used.
>
> i don't think you need function-sections to make this happen. since it is
> marked "static", gcc should do DCE on it. the __maybe_unused markings is just
> to kill off any warnings about the func not being used (which might occur in
> the #ifdef jungle below). that attribute does not tell gcc to retain the
> function even if it isn't referenced in this file (as far as gcc can tell).
> -mike
>
That's right, you don't need function-sections for the compiler to
eliminate the code - my point was that the linker can't do this sort
of thing...luckily it doesn't need to.
There might be an option to control this, a bit like
-fkeep-static-consts, but I can't see it. Can't see it being very
useful anyway.
Regards,
Simon
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Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
On Monday 31 October 2011 17:49:58 Simon Glass wrote:
> On Mon, Oct 31, 2011 at 2:15 PM, Tabi Timur-B04825 wrote:
> > On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger wrote:
> >> -static void print_num(const char *, ulong);
> >> +__maybe_unused
> >> +static void print_num(const char *name, ulong value)
> >> +{
> >> + printf("%-12s= 0x%08lX\n", name, value);
> >> +}
> >
> > Will the linker remove the functions from the binary if they are unusued?
>
> If built with -ffunction-sections and --gc-sections,, then the linker
> can do this sort of thing. Otherwise it can't, but the compiler can. I
> just tested Mike's code on my ARM compiler to make sure and it happily
> removed print_eth() when it was not used.
i don't think you need function-sections to make this happen. since it is
marked "static", gcc should do DCE on it. the __maybe_unused markings is just
to kill off any warnings about the func not being used (which might occur in
the #ifdef jungle below). that attribute does not tell gcc to retain the
function even if it isn't referenced in this file (as far as gcc can tell).
-mike
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Re: [U-Boot] [PATCH v5 05/11] arm, davinci: add support for new spl framework
On Mon, Oct 31, 2011 at 3:09 PM, Scott Wood wrote:
> On 10/30/2011 11:53 PM, Heiko Schocher wrote:
>> diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
>> b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
>> new file mode 100644
>> index 000..efc0521
>> --- /dev/null
>> +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
>> @@ -0,0 +1,57 @@
>> +/*
>> + * Copyright (C) 2011
>> + * Heiko Schocher, DENX Software Engineering, h...@denx.de.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include
>> +#include
>> +#include
>
> Does this file use anything from asm/io.h?
>
>> +/*
>> + * The main entry for NAND booting. It's necessary that SDRAM is already
>> + * configured and available since this code loads the main U-Boot image
>> + * from NAND into SDRAM and starts it from there.
>> + */
>> +void nand_boot(void)
>> +{
>> + int ret;
>> + __attribute__((noreturn)) void (*uboot)(void);
>> +
>> + /*
>> + * Load U-Boot image from NAND into RAM
>> + */
>> + ret = nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
>> + CONFIG_SYS_NAND_U_BOOT_SIZE,
>> + (void *)CONFIG_SYS_NAND_U_BOOT_DST);
>> +
>> +#ifdef CONFIG_NAND_ENV_DST
>> + ret = nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>> + (void *)CONFIG_NAND_ENV_DST);
>> +
>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>> + ret = nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>> + (void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>> +#endif
>> +#endif
>> +
>> + /*
>> + * Jump to U-Boot image
>> + */
>> + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
>> + (*uboot)();
>> +}
>
> This is common to most NAND SPLs. It would be nice to stick this in a
> common place (at least the loading part, maybe not the jump). Not
> nand_spl_simple.c, as it's utility is not limited to the simple driver.
> Maybe drivers/mtd/nand/nand_spl_load.c?
Indeed, the difference right here between davinci and omap*(/am335x)
is parsing u-boot.img for the size or just using a hard-coded size
variable.
--
Tom
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Re: [U-Boot] [PATCH v5 05/11] arm, davinci: add support for new spl framework
On 10/30/2011 11:53 PM, Heiko Schocher wrote:
> diff --git a/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
> b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
> new file mode 100644
> index 000..efc0521
> --- /dev/null
> +++ b/arch/arm/cpu/arm926ejs/davinci/spl_nand.c
> @@ -0,0 +1,57 @@
> +/*
> + * Copyright (C) 2011
> + * Heiko Schocher, DENX Software Engineering, h...@denx.de.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +#include
> +#include
Does this file use anything from asm/io.h?
> +/*
> + * The main entry for NAND booting. It's necessary that SDRAM is already
> + * configured and available since this code loads the main U-Boot image
> + * from NAND into SDRAM and starts it from there.
> + */
> +void nand_boot(void)
> +{
> + int ret;
> + __attribute__((noreturn)) void (*uboot)(void);
> +
> + /*
> + * Load U-Boot image from NAND into RAM
> + */
> + ret = nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
> + CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (void *)CONFIG_SYS_NAND_U_BOOT_DST);
> +
> +#ifdef CONFIG_NAND_ENV_DST
> + ret = nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> + (void *)CONFIG_NAND_ENV_DST);
> +
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + ret = nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> + (void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> +#endif
> +#endif
> +
> + /*
> + * Jump to U-Boot image
> + */
> + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
> + (*uboot)();
> +}
This is common to most NAND SPLs. It would be nice to stick this in a
common place (at least the loading part, maybe not the jump). Not
nand_spl_simple.c, as it's utility is not limited to the simple driver.
Maybe drivers/mtd/nand/nand_spl_load.c?
-Scott
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[U-Boot] [PATCH v3 2/8] tegra2: Simplify tegra_start() boot path
The Tegra2 boot path is more complicated than it needs to be. Since we want
to move to building most of U-Boot with ARMv7 and only a small part with
ARMv4T (for AVP) it should be as simple as possible.
This makes tegra2_start() into a simple function which either does AVP
init or A9 init depending on which core is running it. Both cores now
following the same init path, beginning at _start, and the special Tegra2
boot path code is no longer required.
Only two files need to be built for ARMv4T, and this is handled in the
Tegra2 CPU Makefile.
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/tegra2/Makefile |5 +++
arch/arm/cpu/armv7/tegra2/ap20.c | 54 +++
arch/arm/cpu/armv7/tegra2/ap20.h |3 ++
3 files changed, 37 insertions(+), 25 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/Makefile
b/arch/arm/cpu/armv7/tegra2/Makefile
index f0dc2ff..955c3b6 100644
--- a/arch/arm/cpu/armv7/tegra2/Makefile
+++ b/arch/arm/cpu/armv7/tegra2/Makefile
@@ -23,6 +23,11 @@
# MA 02111-1307 USA
#
+# The AVP is ARMv4T architecture so we must use special compiler
+# flags for any startup files it might use.
+CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t
+CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t
+
include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index 5cb4b1b..4c44bb3 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -31,7 +31,12 @@
#include
#include
-u32 s_first_boot = 1;
+/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */
+static int ap20_cpu_is_cortexa9(void)
+{
+ u32 id = readb(NV_PA_PG_UP_BASE + PG_UP_TAG_0);
+ return id == (PG_UP_TAG_0_PID_CPU & 0xff);
+}
void init_pllx(void)
{
@@ -283,38 +288,37 @@ void init_pmc_scratch(void)
writel(CONFIG_SYS_BOARD_ODMDATA, &pmc->pmc_scratch20);
}
-void cpu_start(void)
+void tegra2_start(void)
{
struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
- /* enable JTAG */
- writel(0xC0, &pmt->pmt_cfg_ctl);
+ /* If we are the AVP, start up the first Cortex-A9 */
+ if (!ap20_cpu_is_cortexa9()) {
+ /* enable JTAG */
+ writel(0xC0, &pmt->pmt_cfg_ctl);
- if (s_first_boot) {
/*
-* Need to set this before cold-booting,
-* otherwise we'll end up in an infinite loop.
-*/
- s_first_boot = 0;
- cold_boot();
+ * If we are ARM7 - give it a different stack. We are about to
+ * start up the A9 which will want to use this one.
+ */
+ asm volatile("ldr sp, =%c0\n"
+ : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
+
+ start_cpu((u32)_start);
+ halt_avp();
+ /* not reached */
}
-}
-void tegra2_start()
-{
- if (s_first_boot) {
- /* Init Debug UART Port (115200 8n1) */
- uart_init();
+ /* Init PMC scratch memory */
+ init_pmc_scratch();
- /* Init PMC scratch memory */
- init_pmc_scratch();
- }
+ enable_scu();
-#ifdef CONFIG_ENABLE_CORTEXA9
- /* take the mpcore out of reset */
- cpu_start();
+ /* enable SMP mode and FW for CPU0, by writing to Auxiliary Ctl reg */
+ asm volatile(
+ "mrcp15, 0, r0, c1, c0, 1\n"
+ "orrr0, r0, #0x41\n"
+ "mcrp15, 0, r0, c1, c0, 1\n");
- /* configure cache */
- cache_configure();
-#endif
+ /* FIXME: should have ap20's L2 disabled too? */
}
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.h b/arch/arm/cpu/armv7/tegra2/ap20.h
index 49fe340..1bb48d6 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.h
+++ b/arch/arm/cpu/armv7/tegra2/ap20.h
@@ -102,3 +102,6 @@ void uart_init(void);
void udelay(unsigned long);
void cold_boot(void);
void cache_configure(void);
+
+/* This is the main entry into U-Boot, used by the Cortex-A9 */
+extern void _start(void);
--
1.7.3.1
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[U-Boot] [PATCH v3 4/8] tegra2: Remove unneeded boot code
Since we have cache support built in we can remove Tegra's existing cache
initialization code amd other related dead code.
Signed-off-by: Simon Glass
---
Changes in v2:
- Keep Tegra's config.mk file around so we can set the armv4t flags
Changes in v3:
- Add lowlevel_init function back in (though it does nothing)
arch/arm/cpu/armv7/start.S| 12 ---
arch/arm/cpu/armv7/tegra2/ap20.h |7 +--
arch/arm/cpu/armv7/tegra2/board.c |8 --
arch/arm/cpu/armv7/tegra2/config.mk |3 -
arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 115 +
5 files changed, 2 insertions(+), 143 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 528585f..1794475 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -81,18 +81,6 @@ _end_vect:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#ifdef CONFIG_TEGRA2
-/*
- * Tegra2 uses 2 separate CPUs - the AVP (ARM7TDMI) and the CPU (dual A9s).
- * U-Boot runs on the AVP first, setting things up for the CPU (PLLs,
- * muxes, clocks, clamps, etc.). Then the AVP halts, and expects the CPU
- * to pick up its reset vector, which points here.
- */
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.h b/arch/arm/cpu/armv7/tegra2/ap20.h
index 1bb48d6..a4b4d73 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.h
+++ b/arch/arm/cpu/armv7/tegra2/ap20.h
@@ -95,13 +95,8 @@
#define HALT_COP_EVENT_IRQ_1 (1 << 11)
#define HALT_COP_EVENT_FIQ_1 (1 << 9)
-/* Prototypes */
-
+/* Start up the tegra2 SOC */
void tegra2_start(void);
-void uart_init(void);
-void udelay(unsigned long);
-void cold_boot(void);
-void cache_configure(void);
/* This is the main entry into U-Boot, used by the Cortex-A9 */
extern void _start(void);
diff --git a/arch/arm/cpu/armv7/tegra2/board.c
b/arch/arm/cpu/armv7/tegra2/board.c
index 4530194..e6fe4fd 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -55,14 +55,6 @@ unsigned int query_sdram_size(void)
}
}
-void s_init(void)
-{
-#ifndef CONFIG_ICACHE_OFF
- icache_enable();
-#endif
- invalidate_dcache();
-}
-
int dram_init(void)
{
unsigned long rs;
diff --git a/arch/arm/cpu/armv7/tegra2/config.mk
b/arch/arm/cpu/armv7/tegra2/config.mk
index f84fdc8..8f9bdc9 100644
--- a/arch/arm/cpu/armv7/tegra2/config.mk
+++ b/arch/arm/cpu/armv7/tegra2/config.mk
@@ -24,9 +24,6 @@
# MA 02111-1307 USA
#
-# Use ARMv4 for Tegra2 - initial code runs on the AVP, which is an ARM7TDI.
-PLATFORM_CPPFLAGS += -march=armv4
-
# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build this
# file with compatible flags
ifdef CONFIG_TEGRA2
diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
index f24a2ff..df1bb6e 100644
--- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S
@@ -26,14 +26,6 @@
#include
#include
-
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE@ sdram load addr from config file
-
-.global invalidate_dcache
-invalidate_dcache:
- mov pc, lr
-
.align 5
.global reset_cpu
reset_cpu:
@@ -50,110 +42,5 @@ rstctl:
.globl lowlevel_init
lowlevel_init:
- ldr sp, SRAM_STACK
- str ip, [sp]
- mov ip, lr
- bl s_init @ go setup pll, mux & memory
- ldr ip, [sp]
- mov lr, ip
-
+ @ Nothing to do here
mov pc, lr @ back to arch calling code
-
-
-.globl startup_cpu
-startup_cpu:
- @ Initialize the AVP, clocks, and memory controller
- @ SDRAM is guaranteed to be on at this point
-
- ldr r0, =cold_boot @ R0 = reset vector for CPU
- bl start_cpu @ start the CPU
-
- @ Transfer control to the AVP code
- bl halt_avp
-
- @ Should never get here
-_loop_forever2:
- b _loop_forever2
-
-.globl cache_configure
-cache_configure:
- stmdb r13!,{r14}
- @ invalidate instruction cache
- mov r1, #0
- mcr p15, 0, r1, c7, c5, 0
-
- @ invalidate the i&d tlb entries
- mcr p15, 0, r1, c8, c5, 0
- mcr p15, 0, r1, c8, c6, 0
-
- @ enable instruction cache
- mrc p15, 0, r1, c1, c0, 0
- orr r1, r1, #(1<<12)
- mcr p15, 0, r1, c1, c0, 0
-
- bl enable_scu
-
- @ enable SMP mode and FW for CPU0, by writing to Auxiliary Ctl reg
- mrc p15, 0, r0, c1, c0, 1
- orr r0, r0, #0x41
- mcr p15, 0, r0, c1, c0, 1
-
- @ Now flush the Dcache
- mov r0, #0
- @ 256 cache lines
- mov r1, #256
-
-invalidate_loop:
- add r1, r1, #-1
- mov r0, r1, lsl #5
-
[U-Boot] [PATCH v3 6/8] tegra2: Remove unused low-level Tegra2 UART code
This was used by the AVP in early boot but is no longer used. Unless we
plan to enable it somehow it is not needed. In any case we should try
to use the ns16550 driver instead as it has the same code.
Signed-off-by: Simon Glass
---
drivers/serial/Makefile|1 -
drivers/serial/serial_tegra2.c | 77
drivers/serial/serial_tegra2.h | 29 ---
3 files changed, 0 insertions(+), 107 deletions(-)
delete mode 100644 drivers/serial/serial_tegra2.c
delete mode 100644 drivers/serial/serial_tegra2.h
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 6309549..616b857 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -55,7 +55,6 @@ COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o
COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
-COBJS-$(CONFIG_TEGRA2) += serial_tegra2.o
ifndef CONFIG_SPL_BUILD
COBJS-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_tegra2.c b/drivers/serial/serial_tegra2.c
deleted file mode 100644
index 8ff34ea..000
--- a/drivers/serial/serial_tegra2.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include
-#include
-#include
-#include
-#include "serial_tegra2.h"
-
-static void setup_uart(struct uart_ctlr *u)
-{
- u32 reg;
-
- /* Prepare the divisor value */
- reg = NVRM_PLLP_FIXED_FREQ_KHZ * 1000 / NV_DEFAULT_DEBUG_BAUD / 16;
-
- /* Set up UART parameters */
- writel(UART_LCR_DLAB, &u->uart_lcr);
- writel(reg, &u->uart_thr_dlab_0);
- writel(0, &u->uart_ier_dlab_0);
- writel(0, &u->uart_lcr);/* clear DLAB */
- writel((UART_FCR_TRIGGER_3 | UART_FCR_FIFO_EN | \
- UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR), &u->uart_iir_fcr);
- writel(0, &u->uart_ier_dlab_0);
- writel(UART_LCR_WLS_8, &u->uart_lcr); /* 8N1 */
- writel(UART_MCR_RTS, &u->uart_mcr);
- writel(0, &u->uart_msr);
- writel(0, &u->uart_spr);
- writel(0, &u->uart_irda_csr);
- writel(0, &u->uart_asr);
- writel((UART_FCR_TRIGGER_3 | UART_FCR_FIFO_EN), &u->uart_iir_fcr);
-
- /* Flush any old characters out of the RX FIFO */
- reg = readl(&u->uart_lsr);
-
- while (reg & UART_LSR_DR) {
- reg = readl(&u->uart_thr_dlab_0);
- reg = readl(&u->uart_lsr);
- }
-}
-
-/*
- * Routine: uart_init
- * Description: init the UART clocks, muxes, and baudrate/parity/etc.
- */
-void uart_init(void)
-{
- struct uart_ctlr *uart = (struct uart_ctlr *)NV_PA_APB_UARTD_BASE;
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
- setup_uart(uart);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
- uart = (struct uart_ctlr *)NV_PA_APB_UARTA_BASE;
-
- setup_uart(uart);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
-}
diff --git a/drivers/serial/serial_tegra2.h b/drivers/serial/serial_tegra2.h
deleted file mode 100644
index 5704800..000
--- a/drivers/serial/serial_tegra2.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SERIAL_TEGRA_H_
-#define _SERIAL_TEGRA_H_
-
-#include
-
-#endif /* _SERIAL_TEGRA_H_ */
--
1.7.3.
[U-Boot] [PATCH v3 1/8] tegra2: Add arch_cpu_init() to fire up Cortex-A9
We want to move away from a special Tegra2 start-up, and just use
arch_cpu_init() instead. However, if we run board_init_f() from boot
we need to build it for ARMv4T, since the Tegra's AVP start-up CPU
does not support ARMv7.
The effect of this is to do the AVP init earlier, and in
arch_cpu_init(), rather that board_early_init_f().
Signed-off-by: Simon Glass
---
Changes in v2:
- Move Makefile armv4t flags from arch/arm/lib to Tegra's config.mk
arch/arm/cpu/armv7/tegra2/board.c | 15 +++
arch/arm/cpu/armv7/tegra2/config.mk |6 ++
board/nvidia/common/board.c |3 ---
board/nvidia/common/board.h |1 -
include/configs/tegra2-common.h |1 +
5 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c
b/arch/arm/cpu/armv7/tegra2/board.c
index 751102d..4530194 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -23,6 +23,7 @@
#include
#include
+#include "ap20.h"
#include
#include
#include
@@ -86,3 +87,17 @@ int checkboard(void)
return 0;
}
#endif /* CONFIG_DISPLAY_BOARDINFO */
+
+#ifdef CONFIG_ARCH_CPU_INIT
+/*
+ * Note this function is executed by the ARM7TDMI AVP. It does not return
+ * in this case. It is also called once the A9 starts up, but does nothing in
+ * that case.
+ */
+int arch_cpu_init(void)
+{
+ /* Fire up the Cortex A9 */
+ tegra2_start();
+ return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv7/tegra2/config.mk
b/arch/arm/cpu/armv7/tegra2/config.mk
index 96c0795..f84fdc8 100644
--- a/arch/arm/cpu/armv7/tegra2/config.mk
+++ b/arch/arm/cpu/armv7/tegra2/config.mk
@@ -26,3 +26,9 @@
# Use ARMv4 for Tegra2 - initial code runs on the AVP, which is an ARM7TDI.
PLATFORM_CPPFLAGS += -march=armv4
+
+# Tegra has an ARMv4T CPU which runs board_init_f(), so we must build this
+# file with compatible flags
+ifdef CONFIG_TEGRA2
+CFLAGS_arch/arm/lib/board.o += -march=armv4t
+endif
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 0f12de2..56850cc 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -125,9 +125,6 @@ int board_early_init_f(void)
/* Initialize periph GPIOs */
gpio_config_uart();
-
- /* Init UART, scratch regs, and start CPU */
- tegra2_start();
return 0;
}
#endif /* EARLY_INIT */
diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h
index 35acbca..1f57086 100644
--- a/board/nvidia/common/board.h
+++ b/board/nvidia/common/board.h
@@ -24,7 +24,6 @@
#ifndef _BOARD_H_
#define _BOARD_H_
-void tegra2_start(void);
void gpio_config_uart(void);
int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio);
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index a9c665c..bdf7eab 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -35,6 +35,7 @@
#define CONFIG_SYS_CACHELINE_SIZE 32
+#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */
#define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */
#include/* get chip and board defs */
--
1.7.3.1
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[U-Boot] [PATCH v3 3/8] arm: Only do CP15 init on ARMv7
Some SOCs have do not start up with their 'main' CPU. The first U-Boot code may then be executed with a CPU which does not have a CP15. Here we split the initialization of CP15 into a separate call, and only do it if we detect an ARMv7 chip. The test for ARMv7 cannot use CP15, since this may trigger an undefined instruction exception on an ARM7TDMI, so we check for a Q bit in the APSR instead. An alternative to this is to make boards set CONFIG_SKIP_LOWLEVEL_INIT and then call cpu_init_cp15() later. However after much discussion on the U-Boot mailing list this was rejected as undesirable. See: http://patchwork.ozlabs.org/patch/119621/ Signed-off-by: Simon Glass --- Changes in v3: - Update comment and also make it match style - Fix cpu_init_cp15() name - Remove exporting of cpu_init_cp15() from start.S - Add test for ARMv7 CPU and skip CP15 init if not found arch/arm/cpu/armv7/start.S | 45 --- 1 files changed, 25 insertions(+), 20 deletions(-) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index db8e9d2..528585f 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -168,7 +168,23 @@ next: #endif /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit + @ Try to set the Q bit in the APSR. If this fails, we are not ARMv7 + @ An ARM7TDMI will see APSR_nzcvq as CPSR_f (they are equivalent) + @ and we use that syntax to be kind to older tool chains + msr CPSR_f, #0x0800 @ set Q bit + mrs r0, CPSR@ see if it is still there + tst r0, #0x0800 + blnecpu_init_cp15 @ if so, we are ARMv7, so init it! + + msr CPSR_f, #0x00 @ clear Q bit + + /* +* Jump to board specific initialization... +* The Mask ROM will have already initialized +* basic memory. Go here to bump up clock rate and handle +* wake up conditions. +*/ + bl lowlevel_init @ go setup pll,mux,memory #endif /* Set stackpointer in internal RAM to call board_init_f */ @@ -307,15 +323,14 @@ _board_init_r_ofs: #ifndef CONFIG_SKIP_LOWLEVEL_INIT -/* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing +/* + * cpu_init_cp15 * - */ -cpu_init_crit: + * Setup CP15 registers (cache, MMU, TLBs) to initial reset values. The MMU + * and D-cache are turned off. The I-cache is turned on unless + * CONFIG_SYS_ICACHE_OFF is defined. + */ +cpu_init_cp15: /* * Invalidate L1 I/D */ @@ -340,18 +355,8 @@ cpu_init_crit: orr r0, r0, #0x1000 @ set bit 12 (I) I-cache #endif mcr p15, 0, r0, c1, c0, 0 - - /* -* Jump to board specific initialization... -* The Mask ROM will have already initialized -* basic memory. Go here to bump up clock rate and handle -* wake up conditions. -*/ - mov ip, lr @ persevere link reg across call - bl lowlevel_init @ go setup pll,mux,memory - mov lr, ip @ restore link mov pc, lr @ back to my caller -#endif +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #ifndef CONFIG_SPL_BUILD /* -- 1.7.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 7/8] tegra2: Remove unneeded 'dynamic ram size' message
This message is not required, since it is followed by an 'official' U-Boot
message.
U-Boot 2011.03-00048-gd7cb0d3 (May 11 2011 - 17:17:23)
TEGRA2
Board: NVIDIA Seaboard
dynamic ram_size = 1073741824
DRAM: 1 GiB
becomes:
TEGRA2
Board: NVIDIA Seaboard
DRAM: 1 GiB
This is a separate commit since it changes behavior.
Signed-off-by: Simon Glass
---
arch/arm/cpu/armv7/tegra2/board.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c
b/arch/arm/cpu/armv7/tegra2/board.c
index e6fe4fd..fbf189a 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -65,10 +65,8 @@ int dram_init(void)
/* Now check it dynamically */
rs = get_ram_size(CONFIG_SYS_SDRAM_BASE, gd->ram_size);
- if (rs) {
- printf("dynamic ram_size = %lu\n", rs);
+ if (rs)
gd->bd->bi_dram[0].size = gd->ram_size = rs;
- }
return 0;
}
--
1.7.3.1
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[U-Boot] [PATCH v3 8/8] tegra2: Don't use board pointer before it is set up
In board_init_f() the gd->bd pointer is not valid when dram_init() is called.
This only avoids dying because DRAM is at zero on Tegra2. The common ARM
routine sets up the banks in the same way anyway, so we can just remove this
code.
Signed-off-by: Simon Glass
---
Changes in v3:
- Remove later CP15 init in board.c since this is not needed now
- Rebase against master (due to CONFIG_SYS_CACHELINE_SIZE series)
arch/arm/cpu/armv7/tegra2/board.c | 10 +-
1 files changed, 1 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c
b/arch/arm/cpu/armv7/tegra2/board.c
index fbf189a..59dce8f 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -57,16 +57,8 @@ unsigned int query_sdram_size(void)
int dram_init(void)
{
- unsigned long rs;
-
/* We do not initialise DRAM here. We just query the size */
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = gd->ram_size = query_sdram_size();
-
- /* Now check it dynamically */
- rs = get_ram_size(CONFIG_SYS_SDRAM_BASE, gd->ram_size);
- if (rs)
- gd->bd->bi_dram[0].size = gd->ram_size = rs;
+ gd->ram_size = query_sdram_size();
return 0;
}
--
1.7.3.1
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[U-Boot] [PATCH v3 5/8] tegra2: Remove unneeded config option
CONFIG_ENABLE_CORTEXA9 and CONFIG_SKIP_RELOCATE_UBOOT are not needed, so remove them. Also we don't need to skip low-level init anymore. Signed-off-by: Simon Glass --- include/configs/tegra2-common.h |4 1 files changed, 0 insertions(+), 4 deletions(-) diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index bdf7eab..8a0ae20 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -36,7 +36,6 @@ #define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */ -#define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */ #include/* get chip and board defs */ @@ -46,9 +45,6 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SKIP_RELOCATE_UBOOT -#define CONFIG_SKIP_LOWLEVEL_INIT - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_OF_LIBFDT /* enable passing of devicetree */ -- 1.7.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/8] tegra2: Tidy up boot path
On Tegra2 the AVP runs the normal U-Boot code to a point, then halts and the A9 takes over. The current Tegra2 boot path is fairly complex, since it has a separate path and code for the Cortex-A9 and the AVP. In fact, they can largely execute the same code path. This series cleans up this logic and removes some parallel and un-needed code. Changes in v2: - Move Makefile armv4t flags from arch/arm/lib to Tegra's config.mk - Keep Tegra's config.mk file around so we can set the armv4t flags Changes in v3: - Update comment and also make it match style - Fix cpu_init_cp15() name - Remove exporting of cpu_init_cp15() from start.S - Add test for ARMv7 CPU and skip CP15 init if not found - Add lowlevel_init function back in (though it does nothing) - Remove later CP15 init in board.c since this is not needed now - Rebase against master (due to CONFIG_SYS_CACHELINE_SIZE series) Simon Glass (8): tegra2: Add arch_cpu_init() to fire up Cortex-A9 tegra2: Simplify tegra_start() boot path arm: Only do CP15 init on ARMv7 tegra2: Remove unneeded boot code tegra2: Remove unneeded config option tegra2: Remove unused low-level Tegra2 UART code tegra2: Remove unneeded 'dynamic ram size' message tegra2: Don't use board pointer before it is set up arch/arm/cpu/armv7/start.S| 57 ++ arch/arm/cpu/armv7/tegra2/Makefile|5 + arch/arm/cpu/armv7/tegra2/ap20.c | 54 +++-- arch/arm/cpu/armv7/tegra2/ap20.h | 10 +-- arch/arm/cpu/armv7/tegra2/board.c | 35 - arch/arm/cpu/armv7/tegra2/config.mk |7 +- arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 115 + board/nvidia/common/board.c |3 - board/nvidia/common/board.h |1 - drivers/serial/Makefile |1 - drivers/serial/serial_tegra2.c| 77 --- drivers/serial/serial_tegra2.h| 29 --- include/configs/tegra2-common.h |5 +- 13 files changed, 86 insertions(+), 313 deletions(-) delete mode 100644 drivers/serial/serial_tegra2.c delete mode 100644 drivers/serial/serial_tegra2.h -- 1.7.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
On Mon, Oct 31, 2011 at 2:15 PM, Tabi Timur-B04825 wrote:
> On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger wrote:
>>
>>
>> -static void print_num(const char *, ulong);
>> +__maybe_unused
>> +static void print_num(const char *name, ulong value)
>> +{
>> + printf("%-12s= 0x%08lX\n", name, value);
>> +}
>>
>
> Will the linker remove the functions from the binary if they are unusued?
If built with -ffunction-sections and --gc-sections,, then the linker
can do this sort of thing. Otherwise it can't, but the compiler can. I
just tested Mike's code on my ARM compiler to make sure and it happily
removed print_eth() when it was not used.
Regards,
Simon
>
> --
> Timur Tabi
> Linux kernel developer at Freescale
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Re: [U-Boot] [PATCH 3/9] arm: Move CP15 init out of cpu_init_crit()
Hi Albert, On Sun, Oct 30, 2011 at 3:16 AM, Albert ARIBAUD wrote: > Hi Simon, > > Le 29/10/2011 02:36, Simon Glass a écrit : >> >> Hi Albert, >> >> On Thu, Oct 27, 2011 at 10:09 PM, Albert ARIBAUD >> wrote: >>> >>> Le 28/10/2011 03:43, Simon Glass a écrit : >>> The test was mrc p15, 0, r0, c0, c0, 0 @ get ID register and r0, r0, #0xf @ get architecture cmp r0, #0xf @ check for> ARMv6 movne pc, lr @ else skip cache init Unfortunately I think it is a plain ARM7TDMI with no CP15. >>> >>> What about other fields in r0 right after mrc? >> >> I don't really understand that sentence, sorry. >> >> The ARM7TDMI does not have a CP15 and aborts if I try to access it. >> Just in case there is something odd going on I checked with DSTREAM / >> RVdebug and it definitely doesn't have a CP15. [as Ford Prefect would >> say, I counted them twice] > > Ok, so debug tools do not show cp15. But tools can be tailored to what tool > makes think is needed -- I could tell about some debugging tools that will > not let me see all I want a core because the debug designers had finite > resources and what I wanted was not a priority to them. Ye of little faith... > > OTOH, according to ARM, ARM7DTMI is an ARMv4T architecture, and indeed cp15 > is mandatory only for ARMv6 and up, but ARM also states cp15 support was a > de facto standard already for ARMv4. Yes it is de facto when you have a core with that support - typically an MMU and caches. But in that case it would have three digits, as in ARM720T, rather than ARM7TDMI. It is definitely an ARM7TDMI (actually -S) core in the datasheet, and there is no external CP15 block shown, etc. (Although I can see a cache!) > > So I am left with the question: would the Tegra2 AVP be the only ARM > implementation supported by U-Boot that does not have a cp15? That is > possible, but I want direct testimony from Nividia. No there are lots and lots of ARM7TDMIs out there, just not that many that run U-Boot - and Linux is hard without an MMU. But even in the U-Boot tree we have the s3c44b0 cpu which seems to be a plain ARM7TDMI. In terms of direct testimony, two engineers are on this thread and may wish to chime in. The datasheet is pretty clear to me... > > This is why I asked about the Tegra2 TRM, or whatever Nvidia calls it, in > case it would explicitely state if AVP has cp15 support or not. Failing See above, it clearly states ARM7TDMI-S. > that, I'd be ok with experimenting but through the AVP, not through > debugging tools -- encoding a cp15 MIDR read in the U-Boot startup code, > step through it with the debugger and see if it causes an UND or not, and if > not, what is the hex value of r0 -- maybe that is exactly what you did, but > I am not 100% sure it is, hence my insistence. OK I have done this, and yes the AVP definitely takes the undef exception when you execute: mrc p15, 0, r0, c0, c0, 0 > > I am especially surprised that a recent core be synthesized without a means > for run-time core identification, especially in a design with two ARM cores. The -S means synthesized. It does have its own method of identification as I mentioned. There is a Tegra-specific register that I can read. > >> The simplest thing I have been able to think of that does not involve >> exceptions, differing instruction behaviour, doing the init later or >> putting in some Tegra-specific code is to check for the existence of >> the Q bit in the CPSR (actually APSR on ARMv7). This does seem to work >> and I have verified both in my old 1996 ARM ARM DDI 0100B and the >> ARMv7-A one (DDI 0406B) that from an architecture point of view this >> should work. The Q bit is RAZ on ARMv4T. > > This could hep if we really cannot access the Main ID Register on the AVP. OK, well I will send a patch set up with this change. > >> I believe this will cope with the Cortex-A7 / A-15 combinations and >> possibly even Cortex-R4 / A-15 although I have not tested this. I >> suppose we can deal with this when it becomes an issue. >> >> So I have redone this one patch with that in mind, and adjusted the >> series slightly to fit with this. I will resend it when it completes >> MAKEALL. >> >> I hope that this resolves the matter, but if not(!), I would very much >> appreciate it if you could send through some actual pseudo code >> showing what you are looking for, to avoid any confusion. > > Well, I just want to see if the MIDR is accessible and what its value is, so > I want the AVP to execute > > mrc p15, 0, r0, c0, c0, 0 > > The ending 0 is what selects MIDR rather than other cp15 registers -- other > values can cause UND (and I would gladly understand that AVP goes UND for > reading cp15 CTR for instance). > > The simplest test would be to insert the exact instruction above in the > reset sequence in start.S right after SVC32 switch, debug the reset > execution path, see i
Re: [U-Boot] [PATCH v2] arm: Correct build error introduced by getenv_ulong() patch
On Monday 31 October 2011 17:06:46 Simon Glass wrote:
> On Sun, Oct 30, 2011 at 5:44 PM, Mike Frysinger wrote:
> > On Sunday 23 October 2011 23:44:35 Simon Glass wrote:
> >> --- a/arch/arm/lib/board.c
> >> +++ b/arch/arm/lib/board.c
> >>
> >> flash_size = flash_init();
> >> if (flash_size > 0) {
> >> # ifdef CONFIG_SYS_FLASH_CHECKSUM
> >> + char *s = getenv("flashchecksum");
> >> +
> >> print_size(flash_size, "");
> >> /*
> >>* Compute and print flash CRC if flashchecksum is set to
> >> 'y' *
> >>* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
> >>*/
> >> - s = getenv("flashchecksum");
> >> if (s && (*s == 'y')) {
> >> printf(" CRC: %08X", crc32(0,
> >> (const unsigned char *)
> >> CONFIG_SYS_FLASH_BASE, @@ -566,9 +567,12 @@ void board_init_r(gd_t *id,
> >> ulong dest_addr) /* Initialize from environment */
> >> load_addr = getenv_ulong("loadaddr", 16, load_addr);
> >> #if defined(CONFIG_CMD_NET)
> >> - s = getenv("bootfile");
> >> - if (s != NULL)
> >> - copy_filename(BootFile, s, sizeof(BootFile));
> >> + {
> >> + char *s = getenv("bootfile");
> >> +
> >> + if (s != NULL)
> >> + copy_filename(BootFile, s, sizeof(BootFile));
> >> + }
> >> #endif
> >
> > seems like a better solution would be to use at the top:
> >__maybe_unused char *s;
> >
> > also, shouldn't these be "const char *s" ?
>
> We can certainly do this and I agree it is easier than #ifdefs. Does
> it introduce the possibility that one day the code will stop using the
> variable but it will still be declared? Is the fact that we need the
> #ifdefs an indication that the function should be too long and should
> be refactored? it in fact better to have these explicit so we can see
> them for the ugliness they are?
yes, you're right that it does leave the door open to the variable being
declared, never used, and gcc not emitting a warning about it.
both setups suck, but i'd lean towards the less-ifdef state ... wonder if
Wolfgang has a preference.
-mike
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Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
On Monday 31 October 2011 16:47:08 Simon Glass wrote: > On Mon, Oct 31, 2011 at 1:44 PM, Mike Frysinger wrote: > > On Monday 31 October 2011 15:11:35 Simon Glass wrote: > >> On Sun, Oct 30, 2011 at 5:54 PM, Mike Frysinger wrote: > >> > If we move the local funcs to the top of the file, and use the > >> > __maybe_unused define, we can drop a lot of ugly ifdef logic and > >> > duplicated prototypes. > >> > > >> > Signed-off-by: Mike Frysinger > >> > >> This is much cleaner - is the correct style to put attribute tags on > >> the previous line? > > > > when responding to add your own, there isn't any real protocol. just > > normal e-mail etiquette (no top posting/etc...). patchwork/humans will > > do the right thing when manually updating the changelog. > > Actually I meant the __maybe_unused tag before the function name. ah. i'm not sure there is a hard rule here. i did that because one line would make the func def too long to fit. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
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Re: [U-Boot] [PATCH 1/2] nand_spl_simple: Add omap3 DMA usage to SPL
On 10/31/2011 03:56 AM, Simon Schwarz wrote: > Dear Scott, > > On 10/25/2011 08:24 PM, Scott Wood wrote: >> On 10/16/2011 05:10 AM, Simon Schwarz wrote: >>> This adds DMA copy for the nand spl implementation. If >>> CONFIG_SPL_DMA_SUPPORT >>> is defined the DMA is used. >>> >>> Based on DMA driver patch: >>> http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/109744/focus=109747 >> >> As Wolfgang pointed out, this doesn't belong here. Create your own >> alternate SPL driver if your hardware doesn't work with the simple one >> (similar to the not-yet-migrated nand_spl/nand_boot_fsl_elbc.c, >> nand_spl/nand_boot_fsl_ifc.c, etc). >> > > Hm. The naming of the functions was a fault. Will rename the calls in > nand_spl_simple to remove omap parts. So > omap3_dma_wait_for_transfer > will become > dma_wait_for_transfer > etc. > > So a board which intents to use DMA in SPL can implement these > functions. Would this be ok? What would the semantics of a generic dma_wait_for_transfer() be? I just don't see how this is generic at all, whatever the name. > A whole new driver is IMHO not the right thing as there is too much > duplicated code then. So factor the common bits out into a separate file. >>> @@ -46,11 +59,11 @@ static int nand_command(int block, int page, uint32_t >>> offs, >>> this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); >>> this->cmd_ctrl(&mtd, page_addr& 0xff, NAND_CTRL_ALE); /* A[16:9] */ >>> this->cmd_ctrl(&mtd, (page_addr>> 8)& 0xff, >>> - NAND_CTRL_ALE); /* A[24:17] */ >>> + NAND_CTRL_ALE); /* A[24:17] */ >>> #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE >>> /* One more address cycle for devices> 32MiB */ >>> this->cmd_ctrl(&mtd, (page_addr>> 16)& 0x0f, >>> - NAND_CTRL_ALE); /* A[28:25] */ >>> + NAND_CTRL_ALE); /* A[28:25] */ >>> #endif >> >> Please refrain from making random unrelated whitespace changes in a >> patch that also makes functional changes, particularly when they are >> extensive enough to make it hard to spot the functional changes. >> >> In this particular case, I think the whitespace was fine the way it was; >> the continuation lines were nicely aligned. > > > If I remember right I changed these because of checkpatch errors. I believe checkpatch only complains when you have 8 or more spaces in a row, which isn't the case here. I don't think there's any prohibition on lining things up with single-column granularity. Further, checkpatch should not be complaining about lines that you don't touch. Where reformatting is warranted, it should be a separate patch. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] image: Allow images to indicate they're loadable at any address
On Mon, Oct 24, 2011 at 6:59 AM, Stephen Warren wrote:
> The legacy uImage format includes an absolute load and entry-
> point address. When presented with a uImage in memory that
> isn't loaded at the address in the image's load address,
> U-Boot will relocate the image to its address in the header.
>
> Some payloads can actually be loaded and used at any arbitrary
> address. An example is an ARM Linux kernel zImage file. This
> is useful when sharing a single zImage across multiple boards
> with different memory layouts, or U-Boot builds with different
> ${load_addr} since sharing a single absolute load address may
> not be possible.
>
> With this config option enabled, an image header may contain a
> load address of -1/0x. This indicates the image can
> operate at any load address, and U-Boot will avoid automtically
> copying it anywhere. In this case, the entry-point field is
> specified relative to the start of the image payload.
>
> Signed-off-by: Stephen Warren
Tested-by: Simon Glass
> ---
> Wolfgang,
>
> This is an much simpler and less invasive alternative to my previous
> IH_TYPE_KERNEL_REL patch. If it's OK, you can ignore that patch.
>
> u-boot.bin sizes for Tegra Seaboard without/with this config option on:
>
> text data bss dec hex filename
> 165858 3565 217016 386439 5e587 ./u-boot
>
> with:
>
> text data bss dec hex filename
> 165950 3565 217012 386527 5e5df ./u-boot
>
> README | 23 +++
> common/cmd_bootm.c | 4
> common/image.c | 27 +++
> include/image.h | 4
> 4 files changed, 58 insertions(+), 0 deletions(-)
>
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Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
On Sun, Oct 30, 2011 at 7:54 PM, Mike Frysinger wrote:
>
>
> -static void print_num(const char *, ulong);
> +__maybe_unused
> +static void print_num(const char *name, ulong value)
> +{
> + printf("%-12s= 0x%08lX\n", name, value);
> +}
>
Will the linker remove the functions from the binary if they are unusued?
--
Timur Tabi
Linux kernel developer at Freescale
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Re: [U-Boot] [PATCH v2] arm: Correct build error introduced by getenv_ulong() patch
Hi Mike,
On Sun, Oct 30, 2011 at 5:44 PM, Mike Frysinger wrote:
> On Sunday 23 October 2011 23:44:35 Simon Glass wrote:
>> --- a/arch/arm/lib/board.c
>> +++ b/arch/arm/lib/board.c
>>
>> flash_size = flash_init();
>> if (flash_size > 0) {
>> # ifdef CONFIG_SYS_FLASH_CHECKSUM
>> + char *s = getenv("flashchecksum");
>> +
>> print_size(flash_size, "");
>> /*
>> * Compute and print flash CRC if flashchecksum is set to 'y'
>> *
>> * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
>> */
>> - s = getenv("flashchecksum");
>> if (s && (*s == 'y')) {
>> printf(" CRC: %08X", crc32(0,
>> (const unsigned char *) CONFIG_SYS_FLASH_BASE,
>> @@ -566,9 +567,12 @@ void board_init_r(gd_t *id, ulong dest_addr)
>> /* Initialize from environment */
>> load_addr = getenv_ulong("loadaddr", 16, load_addr);
>> #if defined(CONFIG_CMD_NET)
>> - s = getenv("bootfile");
>> - if (s != NULL)
>> - copy_filename(BootFile, s, sizeof(BootFile));
>> + {
>> + char *s = getenv("bootfile");
>> +
>> + if (s != NULL)
>> + copy_filename(BootFile, s, sizeof(BootFile));
>> + }
>> #endif
>
> seems like a better solution would be to use at the top:
> __maybe_unused char *s;
>
> also, shouldn't these be "const char *s" ?
> -mike
>
We can certainly do this and I agree it is easier than #ifdefs. Does
it introduce the possibility that one day the code will stop using the
variable but it will still be declared? Is the fact that we need the
#ifdefs an indication that the function should be too long and should
be refactored? it in fact better to have these explicit so we can see
them for the ugliness they are?
I'm not sure, but thought I should ask.
Regards,
Simon
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Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
Hi Mike, On Mon, Oct 31, 2011 at 1:44 PM, Mike Frysinger wrote: > On Monday 31 October 2011 15:11:35 Simon Glass wrote: >> On Sun, Oct 30, 2011 at 5:54 PM, Mike Frysinger wrote: >> > If we move the local funcs to the top of the file, and use the >> > __maybe_unused define, we can drop a lot of ugly ifdef logic and >> > duplicated prototypes. >> > >> > Signed-off-by: Mike Frysinger >> >> This is much cleaner - is the correct style to put attribute tags on >> the previous line? > > when responding to add your own, there isn't any real protocol. just normal > e-mail etiquette (no top posting/etc...). patchwork/humans will do the right > thing when manually updating the changelog. > -mike > Actually I meant the __maybe_unused tag before the function name. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] EHCI: adjust for mx5
2011/10/31 Igor Grinberg
> > +struct mxc_ulpi_regs {
> > + u8 vendor_id_low; /* 0x00 - Vendor ID lower byte */
> > + u8 vendor_id_high; /* 0x01 - Vendor ID upper byte */
> > + u8 product_id_low; /* 0x02 - Product ID lower byte */
> > + u8 product_id_high;/* 0x03 - Product ID higher byte */
> > + /* Function Control; 0x04 - 0x06 Read, 0x04 Write */
> > + u8 function_ctrl_write;
> > + u8 function_ctrl_set; /* 0x05 Set */
> > + u8 function_ctrl_clear;/* 0x06 Clear */
> > + /* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
> > + u8 iface_ctrl_write;
> > + u8 iface_ctrl_set; /* 0x08 Set */
> > + u8 iface_ctrl_clear; /* 0x09 Clear */
> > + /* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
> > + u8 otg_ctrl_write;
> > + u8 otg_ctrl_set; /* 0x0B Set */
> > + u8 otg_ctrl_clear; /* 0x0C Clear */
> > + /* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
> > + u8 usb_ie_rising_write;
> > + u8 usb_ie_rising_set; /* 0x0E Set */
> > + u8 usb_ie_rising_clear;/* 0x0F Clear */
> > + /* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
> > + u8 usb_ie_falling_write;
> > + u8 usb_ie_falling_set; /* 0x11 Set */
> > + u8 usb_ie_falling_clear; /* 0x12 Clear */
> > + u8 usb_int_status; /* 0x13 - USB Interrupt Status */
> > + u8 usb_int_latch; /* 0x14 - USB Interrupt Latch */
> > + u8 debug; /* 0x15 - Debug */
> > + /* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
> > + u8 scratch_write;
> > + u8 scratch_set;/* 0x17 Set */
> > + u8 scratch_clear; /* 0x18 Clear*/
> > +};
>
>
> These are the generic ULPI specification registers
> and not mxc specific.
> I'd expect to have them in a more generic location.
>
This would be fixed in general ULPI support patch I'm working on. It should
be ready for posting in a few days.
> --
>
Regards,
> Igor.
>
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Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
On Monday 31 October 2011 15:11:35 Simon Glass wrote: > On Sun, Oct 30, 2011 at 5:54 PM, Mike Frysinger wrote: > > If we move the local funcs to the top of the file, and use the > > __maybe_unused define, we can drop a lot of ugly ifdef logic and > > duplicated prototypes. > > > > Signed-off-by: Mike Frysinger > > This is much cleaner - is the correct style to put attribute tags on > the previous line? when responding to add your own, there isn't any real protocol. just normal e-mail etiquette (no top posting/etc...). patchwork/humans will do the right thing when manually updating the changelog. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/8] nand: Merge new implementation of 1-bit ECC from Linux nand driver
On 10/31/2011 07:22 AM, Christian Hitz wrote: > Am 29.10.2011 00:30, schrieb Scott Wood: >> On 10/12/2011 02:32 AM, Christian Hitz wrote: >>> [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] >>> >>> This patch synchronizes the nand driver with the Linux 3.0 state. >>> >>> Signed-off-by: Christian Hitz >>> Cc: Scott Wood >>> --- >>> >>> Adds 1416 bytes to the image size. >> >> What does this version of the code do that warrants the code size >> increase? This could break some SPLs. >> >> If it's just a speed issue, we probably want to stick with the current code. > > It's the rewrite for performance and support for 512 byte pages, but this is > on the basis of the rewritten code. Several SPLs make use of nand_ecc.c, so NACK replacing it with a larger implementation. We could have the new ECC implementation available as a build-time alternative, though. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request for u-boot-marvell.git
Hi Prafulla, Le 31/10/2011 12:58, Prafulla Wadaskar a écrit : > Hi Albert > Please pull > > The following changes since commit b3fee4e17f9f2c136b8fcfc1b7e575b6b3ccd66a: >Anatolij Gustschin (1): > ARM: dreamplug: fix compilation > > are available in the git repository at: > >u-boot-marvell.git ..BRANCH.NOT.VERIFIED.. Seems like you did the 'git request-pull' before updating u-boot-marvell/master. :) > Ajay Bhargav (1): >gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared > > Holger Brunck (2): >arm/km: add variable waitforne to mgcoge3un >arm/km/mgcoge3un: enhance "waitforne" feature > > Michael Walle (1): >kirkwood: define CONFIG_SYS_CACHELINE_SIZE > > Mike Frysinger (1): >kirkwood: drop empty asm-offsets.s file > > arch/arm/include/asm/arch-kirkwood/config.h |3 ++- > board/keymile/km_arm/km_arm.c | 11 ++- > include/configs/gplugd.h | 12 +++- > include/configs/mgcoge3un.h |2 ++ > 4 files changed, 25 insertions(+), 3 deletions(-) > delete mode 100644 arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s Applied to u-boot-arm/master, thanks! > Regards... > Prafulla . . . Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Powerpc/DIU: Fixed the 800x600 and 1024x768 resolution bug
On Mon, 31 Oct 2011 14:19:54 +0800 wrote: > From: Jerry Huang > > When the resolution is set to 800x600 and 1024x768, > but, the driver will use 1280x1024 resolution to set the DIU register > > Signed-off-by: Jerry Huang > --- > drivers/video/fsl_diu_fb.c |2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) Applied to u-boot-video/master, thanks! Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_bdinfo: simplify local static funcs a bit
On Sun, Oct 30, 2011 at 5:54 PM, Mike Frysinger wrote: > If we move the local funcs to the top of the file, and use the > __maybe_unused define, we can drop a lot of ugly ifdef logic and > duplicated prototypes. > > Signed-off-by: Mike Frysinger This is much cleaner - is the correct style to put attribute tags on the previous line? Acked-by: Simon Glass > --- > common/cmd_bdinfo.c | 89 ++ > 1 files changed, 32 insertions(+), 57 deletions(-) > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3] Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
* re-introduce the MACH_TYPE_XX for EB_CPUX9K2 board Signed-off-by: Jens Scharsig --- include/configs/eb_cpux9k2.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index 4324172..b08de4a 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -41,6 +41,8 @@ #define CONFIG_MISC_INIT_R #define CONFIG_BOARD_EARLY_INIT_F +#define MACH_TYPE_EB_CPUX9K2 1977 +#define CONFIG_MACH_TYPE MACH_TYPE_EB_CPUX9K2 /*--*/ #define CONFIG_SYS_TEXT_BASE 0x #define CONFIG_SYS_LOAD_ADDR 0x2100 /* default load address */ -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: define CONFIG_MACH_TYPE for all ronetix boards
Signed-off-by: Asen Chavdarov Dimov --- board/ronetix/pm9261/pm9261.c |3 --- board/ronetix/pm9263/pm9263.c |3 --- board/ronetix/pm9g45/pm9g45.c |2 -- include/configs/pm9261.h |3 +++ include/configs/pm9263.h |3 +++ include/configs/pm9g45.h |3 +++ 6 files changed, 9 insertions(+), 8 deletions(-) diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index 871b94a..b26e33a 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -248,9 +248,6 @@ int board_init(void) 1 << ATMEL_ID_PIOC, &pmc->pcer); - /* arch number of PM9261-Board */ - gd->bd->bi_arch_number = MACH_TYPE_PM9261; - /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index cfc9847..b0f7ea6 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -349,9 +349,6 @@ int board_init(void) (1 << ATMEL_ID_PIOB), &pmc->pcer); - /* arch number of AT91SAM9263EK-Board */ - gd->bd->bi_arch_number = MACH_TYPE_PM9263; - /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c index f3374a4..961d193 100644 --- a/board/ronetix/pm9g45/pm9g45.c +++ b/board/ronetix/pm9g45/pm9g45.c @@ -139,8 +139,6 @@ int board_init(void) (1 << ATMEL_ID_PIOC) | (1 << ATMEL_ID_PIODE), &pmc->pcer); - /* arch number of AT91SAM9M10G45EK-Board */ - gd->bd->bi_arch_number = MACH_TYPE_PM9G45; /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 89e17b8..55455e7 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -52,6 +52,9 @@ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_SYS_TEXT_BASE 0 +#define MACH_TYPE_PM9261 1187 +#define CONFIG_MACH_TYPE MACH_TYPE_PM9261 + /* clocks */ /* CKGR_MOR - enable main osc. */ #define CONFIG_SYS_MOR_VAL \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 1f7543c..43104a3 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -52,6 +52,9 @@ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_SYS_TEXT_BASE 0 +#define MACH_TYPE_PM9263 1475 +#define CONFIG_MACH_TYPE MACH_TYPE_PM9263 + /* clocks */ #define CONFIG_SYS_MOR_VAL \ (AT91_PMC_MOR_MOSCEN | \ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index acc1204..d3beaf3 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -41,6 +41,9 @@ #define CONFIG_PM9G45 1 /* It's an Ronetix PM9G45 */ #define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45" +#define MACH_TYPE_PM9G45 2672 +#define CONFIG_MACH_TYPE MACH_TYPE_PM9G45 + /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] image: Allow images to indicate they're loadable at any address
Hi Marek,
On Mon, Oct 31, 2011 at 11:36 AM, Marek Vasut wrote:
>> The legacy uImage format includes an absolute load and entry-
>> point address. When presented with a uImage in memory that
>> isn't loaded at the address in the image's load address,
>> U-Boot will relocate the image to its address in the header.
>>
>> Some payloads can actually be loaded and used at any arbitrary
>> address. An example is an ARM Linux kernel zImage file. This
>> is useful when sharing a single zImage across multiple boards
>> with different memory layouts, or U-Boot builds with different
>> ${load_addr} since sharing a single absolute load address may
>> not be possible.
>>
>> With this config option enabled, an image header may contain a
>> load address of -1/0x. This indicates the image can
>> operate at any load address, and U-Boot will avoid automtically
>> copying it anywhere. In this case, the entry-point field is
>> specified relative to the start of the image payload.
>>
>> Signed-off-by: Stephen Warren
>> ---
>> Wolfgang,
>>
>> This is an much simpler and less invasive alternative to my previous
>> IH_TYPE_KERNEL_REL patch. If it's OK, you can ignore that patch.
>>
>> u-boot.bin sizes for Tegra Seaboard without/with this config option on:
>>
>> text data bss dec hex filename
>> 165858 3565 217016 386439 5e587 ./u-boot
>>
>> with:
>>
>> text data bss dec hex filename
>> 165950 3565 217012 386527 5e5df ./u-boot
>>
>
> [...]
>
> This one doesn't apply on top of current u-boot master
You need to revert Stephen's clean-up patch 1/2 712fbcf to test this.
Regards,
Simon
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Re: [U-Boot] [PATCH v3] arm926ejs: add NXP LPC32x0 cpu series support
Hi Albert, On 31.10.2011 19:42, Albert ARIBAUD wrote: > Hi Vladimir, > > Le 24/10/2011 01:04, Vladimir Zapolskiy a écrit : >> Hi Albert, >> >> On 22.10.2011 02:31, Albert ARIBAUD wrote: >>> Hi Vladimir, >>> >>> Le 18/10/2011 17:55, Vladimir Zapolskiy a écrit : This change adds initial support for NXP LPC32x0 SoC series. Signed-off-by: Vladimir Zapolskiy --- Changes from v2 to v3: * checkpatch.pl reports zero errors and warnings Changes from v1 to v2: * BIT(n) and SBF(s, v) macro are not used anymore * removed NS16550 and 14-clock UART definitions from uart.h * added devices.c file, which contains standard UART preinitialization routine * added get_serial_clock() function, it returns actual frequency of UART clock * __udelay() realization is simplified, no need of interrupt handling >>> >>> As it stands, this is dead code until some board uses it; I imagine you >>> have board waiting for this support. Can you submit the SoC and board >>> code as a patch set? This way, it will be obvious for all that the SoC >>> code in this patch has actual use. >> >> you're right, I have a board to make support for. However I presume that >> U-boot maintainers won't be happy to include a board with >> CONFIG_ENV_IS_NOWHERE, and unfortunately flash driver isn't yet ready >> for publishing. > > CONFIG_ENV_IS_NOWHERE is the board( maintainer)'s business. > > Ditto for the FLASH driver, if it is not required for use of the board > (e.g., if U-Boot can fire up and does not need the FLASH to boot an OS, > then a broken FLASH driver is an inconvenience, not a showstopper). I've added CFI flash support to the board, however the environment is supposed to be stored in NAND flash, and that requires some more LPC32XX specific stuff to be developed for U-boot soon (basically that's NAND controller and DMA drivers). >> I'd like to get an advice, if you think that weakly supported but >> working U-boot on the board has chances to be included to arm-next I can >> send the patchset right now for review, otherwise I'll spend some time >> (one week approximately) to finish NAND driver. > > IMO, the acceptable state of a board is the board maintainer's affair, > with a bare minimum that U-Boot must be able to play its role as a > bootloader. > It's done in my understanding. Hopefully some more addons still should be implemented, and I'd like to concentrate on them being assured that the SoC and basic board support are pulled in. > Anyway, since that is for next, not master, and since you think you can > add the missing support far before the next merge window, I suggest you > complete board support and add it to V4. > The initial board support was done and published a week ago, please check http://lists.denx.de/pipermail/u-boot/2011-October/106991.html And that's my expression of willing to become a board maintainer, sorry it hasn't been included to the board changeset originally - http://lists.denx.de/pipermail/u-boot/2011-October/107069.html I'd like to encourage you to check that the board specific compilation has zero warnings and checkpatch.pl output is clean. -- With best wishes, Vladimir ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] image: Allow images to indicate they're loadable at any address
> The legacy uImage format includes an absolute load and entry-
> point address. When presented with a uImage in memory that
> isn't loaded at the address in the image's load address,
> U-Boot will relocate the image to its address in the header.
>
> Some payloads can actually be loaded and used at any arbitrary
> address. An example is an ARM Linux kernel zImage file. This
> is useful when sharing a single zImage across multiple boards
> with different memory layouts, or U-Boot builds with different
> ${load_addr} since sharing a single absolute load address may
> not be possible.
>
> With this config option enabled, an image header may contain a
> load address of -1/0x. This indicates the image can
> operate at any load address, and U-Boot will avoid automtically
> copying it anywhere. In this case, the entry-point field is
> specified relative to the start of the image payload.
>
> Signed-off-by: Stephen Warren
> ---
> Wolfgang,
>
> This is an much simpler and less invasive alternative to my previous
> IH_TYPE_KERNEL_REL patch. If it's OK, you can ignore that patch.
>
> u-boot.bin sizes for Tegra Seaboard without/with this config option on:
>
>text data bss dec hex filename
> 165858 3565 217016 386439 5e587 ./u-boot
>
> with:
>
>text data bss dec hex filename
> 165950 3565 217012 386527 5e5df ./u-boot
>
[...]
This one doesn't apply on top of current u-boot master
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Re: [U-Boot] Conflicting definitions of flush_dcache
On Monday 31 October 2011 03:56:25 Stefan Kristiansson wrote: > so my gut feeling is that nios2 and the 2 ethernet drivers should be > changed to use for example flush_dcache_range(?) correct > Perhaps cmd_cache.c should also be fixed to use flush_dcache_all()? > flush_icache() ofcourse suffer from the same problem. that sounds reasonable. the prototypes also need to get added to include/common.h ... -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/5] powerpc/85xx: fix some comments in the CCSR relocation code
Signed-off-by: Timur Tabi --- arch/powerpc/cpu/mpc85xx/start.S |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 528abc9..b5bf1fa 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -398,7 +398,7 @@ create_ccsr_new_tlb: tlbwe /* -* Create a TLB for the old location of CCSR. Register R9 is reserved +* Create a TLB for the current location of CCSR. Register R9 is reserved * for the virtual address of this TLB (CONFIG_SYS_CCSRBAR + 0x1000). */ create_ccsr_old_tlb: @@ -457,7 +457,7 @@ create_temp_law: */ read_old_ccsrbar: lwz r0, 0(r9) /* CCSRBARH */ - lwz r0, 4(r9) /* CCSRBARH */ + lwz r0, 4(r9) /* CCSRBARL */ isync /* -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/5] powerpc/85xx: verify the current address of CCSR before relocating it
Verify that CCSR is actually located where it is supposed to be before we relocate it. This is useful in detecting U-Boot configurations that are broken (e.g. an incorrect value for CONFIG_SYS_CCSRBAR_DEFAULT). If the current value is wrong, we enter an infinite loop, which is handy for debuggers. Signed-off-by: Timur Tabi --- arch/powerpc/cpu/mpc85xx/start.S | 27 +++ 1 files changed, 27 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index ccb331a..6de8765 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -422,6 +422,33 @@ create_ccsr_old_tlb: msync tlbwe + /* +* We have a TLB for what we think is the current (old) CCSR. Let's +* verify that, otherwise we won't be able to move it. +* CONFIG_SYS_CCSRBAR_DEFAULT is always a 32-bit number, so we only +* need to compare the lower 32 bits of CCSRBAR on CoreNet systems. +*/ +verify_old_ccsr: + lis r0, CONFIG_SYS_CCSRBAR_DEFAULT@h + ori r0, r0, CONFIG_SYS_CCSRBAR_DEFAULT@l +#ifdef CONFIG_FSL_CORENET + lwz r1, 4(r9) /* CCSRBARL */ +#else + lwz r1, 0(r9) /* CCSRBAR, shifted right by 12 */ + slwir1, r1, 12 +#endif + + cmpl0, r0, r1 + + /* +* If the value we read from CCSRBARL is not what we expect, then +* enter an infinite loop. This will at least allow a debugger to +* halt execution and examine TLBs, etc. There's no point in going +* on. +*/ +infinite_debug_loop: + bne infinite_debug_loop + #ifdef CONFIG_FSL_CORENET #define CCSR_LAWBARH0 (CONFIG_SYS_CCSRBAR + 0x1000) -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/5] powerpc/85xx: resize the boot page TLB before relocating CCSR
On some Freescale systems (e.g. those booted from the on-chip ROM), the TLB that covers the boot page can also cover CCSR, which breaks the CCSR relocation code. To fix this, we resize the boot page TLB so that it only covers the 4KB boot page. Signed-off-by: Timur Tabi --- arch/powerpc/cpu/mpc85xx/start.S | 49 ++ 1 files changed, 49 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 6de8765..39f1438 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -330,6 +330,55 @@ l2_disabled: #endif /* CONFIG_MPC8569 */ /* + * Search for the TLB that covers the code we're executing, and shrink it + * so that it covers only this 4K page. That will ensure that any other + * TLB we create won't interfere with it. We assume that the TLB exists, + * which is why we don't check the Valid bit of MAS1. + * + * This is necessary, for example, when booting from the on-chip ROM, + * which (oddly) creates a single 4GB TLB that covers CCSR and DDR. + * If we don't shrink this TLB now, then we'll accidentally delete it + * in "purge_old_ccsr_tlb" below. + */ + bl nexti /* Find our address */ +nexti: mflrr1 /* R1 = our PC */ + li r2, 0 + mtspr MAS6, r2/* Assume the current PID and AS are 0 */ + isync + msync + tlbsx 0, r1 /* This must succeed */ + + /* Set the size of the TLB to 4KB */ + mfspr r3, MAS1 + li r2, 0xF00 + andcr3, r3, r2 /* Clear the TSIZE bits */ + ori r3, r3, MAS1_TSIZE(BOOKE_PAGESZ_4K)@l + mtspr MAS1, r3 + + /* +* Set the base address of the TLB to our PC. We assume that +* virtual == physical. We also assume that MAS2_EPN == MAS3_RPN. +*/ + lis r3, MAS2_EPN@h + ori r3, r3, MAS2_EPN@l /* R3 = MAS2_EPN */ + + and r1, r1, r3 /* Our PC, rounded down to the nearest page */ + + mfspr r2, MAS2 + andcr2, r2, r3 + or r2, r2, r1 + mtspr MAS2, r2/* Set the EPN to our PC base address */ + + mfspr r2, MAS3 + andcr2, r2, r3 + or r2, r2, r1 + mtspr MAS3, r2/* Set the RPN to our PC base address */ + + isync + msync + tlbwe + +/* * Relocate CCSR, if necessary. We relocate CCSR if (obviously) the default * location is not where we want it. This typically happens on a 36-bit * system, where we want to move CCSR to near the top of 36-bit address space. -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/5] powerpc/85xx: add some missing sync instructions in the CCSR relocation code
Calls to tlbwe and tlbsx should be preceded with an isync/msync pair. Signed-off-by: Timur Tabi --- arch/powerpc/cpu/mpc85xx/start.S |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index b5bf1fa..ccb331a 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -363,6 +363,8 @@ purge_old_ccsr_tlb: li r1, 0 mtspr MAS6, r1/* Search the current address space and PID */ + isync + msync tlbsx 0, r8 mfspr r1, MAS1 andis. r2, r1, MAS1_VALID@h/* Check for the Valid bit */ @@ -370,6 +372,8 @@ purge_old_ccsr_tlb: rlwinm r1, r1, 0, 1, 31/* Clear Valid bit */ mtspr MAS1, r1 + isync + msync tlbwe 1: -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5] powerpc/85xx: fix definition of MAS register macros
Some of the MAS register macros do not protect the parameter with parentheses, which could cause wrong values if the parameter includes operators. Also fix the definition of TSIZE_TO_BYTES() so that it actually uses the parameter. This hasn't caused any problems to date because the parameter was always been 'tsize'. Signed-off-by: Timur Tabi --- arch/powerpc/include/asm/mmu.h | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index ef5076b..209103e 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h @@ -392,17 +392,17 @@ extern void print_bats(void); */ #define MAS0_TLBSEL_MSK0x3000 -#define MAS0_TLBSEL(x) ((x << 28) & MAS0_TLBSEL_MSK) +#define MAS0_TLBSEL(x) (((x) << 28) & MAS0_TLBSEL_MSK) #define MAS0_ESEL_MSK 0x0FFF -#define MAS0_ESEL(x) ((x << 16) & MAS0_ESEL_MSK) +#define MAS0_ESEL(x) (((x) << 16) & MAS0_ESEL_MSK) #define MAS0_NV(x) ((x) & 0x0FFF) #define MAS1_VALID 0x8000 #define MAS1_IPROT 0x4000 -#define MAS1_TID(x)((x << 16) & 0x3FFF) +#define MAS1_TID(x)(((x) << 16) & 0x3FFF) #define MAS1_TS0x1000 -#define MAS1_TSIZE(x) ((x << 8) & 0x0F00) -#define TSIZE_TO_BYTES(x) ((phys_addr_t)(1UL << ((tsize * 2) + 10))) +#define MAS1_TSIZE(x) (((x) << 8) & 0x0F00) +#define TSIZE_TO_BYTES(x) (1ULL << (((x) * 2) + 10)) #define MAS2_EPN 0xF000 #define MAS2_X00x0040 -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] gpio: Adapt PCA9698 to standard GPIO API
nice ... Acked-by: Mike Frysinger -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: define CONFIG_MACH_TYPE for all keymile boards
On Monday 31 October 2011 06:48:06 Igor Grinberg wrote: > On 10/31/11 12:07, Valentin Longchamp wrote: > > --- a/include/configs/km/km_arm.h > > +++ b/include/configs/km/km_arm.h > > @@ -48,6 +48,8 @@ > > > > #define CONFIG_KW88F6281 /* SOC Name */ > > #define CONFIG_MACH_KM_KIRKWOOD/* Machine type */ > > > > +#define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD > > + > > Probably, you also want to remove the gd->bd->bi_arch_number > assignment from board files using this mach id? if possible, i'd like to punt bi_arch_number from everyone ... -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] miiphy: Note that miiphy_* API is deprecated
On Monday 31 October 2011 11:12:12 Andy Fleming wrote: > On Oct 31, 2011, at 10:08 AM, Tabi Timur-B04825 wrote: > > On Mon, Oct 31, 2011 at 9:46 AM, Andy Fleming wrote: > >> We want to move everything to phylib, and we definitely don't want > >> new drivers using the miiphy infrastructure. > > > > How about using gcc's deprecated function feature? Or is that too > > aggressive? > > I don't think we want every net driver prior to the last release to create > a warning. We may switch to that after we get some momentum on switching > drivers over. The first goal is just to provide information that a new > driver-writer may see so that the old API doesn't expand. right, this is why i didn't suggest a #warning or __deprecated before. i'm pretty sure way more code is using the old phy layer than the new phy layer atm. i also want to say that the new phy layer doesn't have all the support that the old one did ... if you look in include/miiphy.h, there are a few defines at the end there which are not in linux/mii.h. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] PXA: Add MMC driver using the generic MMC framework
> Signed-off-by: Marek Vasut > --- > arch/arm/include/asm/arch-pxa/regs-mmc.h | 155 +++ > drivers/mmc/Makefile |1 + > drivers/mmc/pxa_mmc_gen.c| 442 > ++ 3 files changed, 598 insertions(+), 0 > deletions(-) > create mode 100644 arch/arm/include/asm/arch-pxa/regs-mmc.h > create mode 100644 drivers/mmc/pxa_mmc_gen.c Hey Andy, maybe you can pick this up now? Cheers ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] mx31: NAND_SPL boot question for TT-01
On 10/31/2011 06:01 PM, Helmut Raiger wrote: > Hi (Stefano), > > just a short question. I'd like to add NAND boot to the board > support of our TT-01. > I checked out the mx31pdk code and also found something in doc/README.SPL > which does not seem to correspond. Right. A lot of work was done recently, and now there is a common SPL framework in u-boot. The README.spl refers to the new stuff. Before of that, booting from NAND was done in a different manner. This is what you find under board/freescale/mx31pdk. The mx31pdk is booting with the old mechanism. New boards must implement the SPL according to the new framework, using CONFIG_SPL and setting the SPL configuration in the board configuration file. I am expecting Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 1/4] tegra2: Move MMC clock initialization into MMC driver
Hi Stephen,
On Mon, Oct 31, 2011 at 9:51 AM, Stephen Warren wrote:
> This centralizes knowledge of MMC clocking into the MMC driver. This also
> removes clock setup from the board files, which will simplify later changes
> that modify the Harmony board to support the correct set of MMC controllers.
>
> Signed-off-by: Stephen Warren
> Cc: Andy Fleming
> Acked-by: Simon Glass
> Tested-by: Simon Glass
I retested this new patch series with the latest master (mmc part,
ext2ls and ext2load) and it is fine.
Regards,
Simon
> ---
> board/nvidia/common/board.c | 13 +
> drivers/mmc/tegra2_mmc.c | 12 +---
> 2 files changed, 10 insertions(+), 15 deletions(-)
>
> diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
> index d13537d..370a259 100644
> --- a/board/nvidia/common/board.c
> +++ b/board/nvidia/common/board.c
> @@ -102,16 +102,6 @@ static void pin_mux_uart(void)
>
> #ifdef CONFIG_TEGRA2_MMC
> /*
> - * Routine: clock_init_mmc
> - * Description: init the PLL and clocks for the SDMMC controllers
> - */
> -static void clock_init_mmc(void)
> -{
> - clock_start_periph_pll(PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH, 2000);
> - clock_start_periph_pll(PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH, 2000);
> -}
> -
> -/*
> * Routine: pin_mux_mmc
> * Description: setup the pin muxes/tristate values for the SDMMC(s)
> */
> @@ -157,8 +147,7 @@ int board_init(void)
> int board_mmc_init(bd_t *bd)
> {
> debug("board_mmc_init called\n");
> - /* Enable clocks, muxes, etc. for SDMMC controllers */
> - clock_init_mmc();
> + /* Enable muxes, etc. for SDMMC controllers */
> pin_mux_mmc();
> gpio_config_mmc();
>
> diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
> index 9e741f2..78b1190 100644
> --- a/drivers/mmc/tegra2_mmc.c
> +++ b/drivers/mmc/tegra2_mmc.c
> @@ -435,14 +435,22 @@ static int mmc_core_init(struct mmc *mmc)
>
> static int tegra2_mmc_initialize(int dev_index, int bus_width)
> {
> + struct mmc_host *host;
> struct mmc *mmc;
>
> debug(" mmc_initialize called\n");
>
> + host = &mmc_host[dev_index];
> +
> + host->clock = 0;
> + tegra2_get_setup(host, dev_index);
> +
> + clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 2000);
> +
> mmc = &mmc_dev[dev_index];
>
> sprintf(mmc->name, "Tegra2 SD/MMC");
> - mmc->priv = &mmc_host[dev_index];
> + mmc->priv = host;
> mmc->send_cmd = mmc_send_cmd;
> mmc->set_ios = mmc_set_ios;
> mmc->init = mmc_core_init;
> @@ -465,8 +473,6 @@ static int tegra2_mmc_initialize(int dev_index, int
> bus_width)
> mmc->f_min = 375000;
> mmc->f_max = 4800;
>
> - mmc_host[dev_index].clock = 0;
> - tegra2_get_setup(&mmc_host[dev_index], dev_index);
> mmc_register(mmc);
>
> return 0;
> --
> 1.7.0.4
>
>
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Re: [U-Boot] [PATCH 5/6] PXA: Cleanup serial_pxa
> * Cleanup register definitions by introducing new regs-uart.h, compliant > with rest of U-Boot. > * Remove old register definitions from pxa-regs.h > * Convert serial_pxa to new regs-uart.h > * Cleanup serial_pxa > > Signed-off-by: Marek Vasut Hi Albert, did you pick this one up? Maybe we can pick it up for .12 release? Cheers ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 1/2] nand: Add common functions to linux/mtd/nand.h
On 10/31/2011 11:34 AM, Simon Schwarz wrote: > Functions often used in SPL are now part of linux/mtd/nand.h. > Static modifiers are removed from these functions in > drivers/mtd/nand/nand_base.c. > > Signed-off-by: Simon Schwarz > Cc: scottw...@freescale.com > Cc: s-paul...@ti.com > Cc: albert.u.b...@aribaud.net Acked-by: Scott Wood -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] arm926ejs: add NXP LPC32x0 cpu series support
Hi Vladimir, Le 24/10/2011 01:04, Vladimir Zapolskiy a écrit : > Hi Albert, > > On 22.10.2011 02:31, Albert ARIBAUD wrote: >> Hi Vladimir, >> >> Le 18/10/2011 17:55, Vladimir Zapolskiy a écrit : >>> This change adds initial support for NXP LPC32x0 SoC series. >>> >>> Signed-off-by: Vladimir Zapolskiy >>> --- >>> Changes from v2 to v3: >>> * checkpatch.pl reports zero errors and warnings >>> >>> Changes from v1 to v2: >>> * BIT(n) and SBF(s, v) macro are not used anymore >>> * removed NS16550 and 14-clock UART definitions from uart.h >>> * added devices.c file, which contains standard UART preinitialization >>> routine >>> * added get_serial_clock() function, it returns actual frequency of >>> UART clock >>> * __udelay() realization is simplified, no need of interrupt handling >> >> As it stands, this is dead code until some board uses it; I imagine you >> have board waiting for this support. Can you submit the SoC and board >> code as a patch set? This way, it will be obvious for all that the SoC >> code in this patch has actual use. > > you're right, I have a board to make support for. However I presume that > U-boot maintainers won't be happy to include a board with > CONFIG_ENV_IS_NOWHERE, and unfortunately flash driver isn't yet ready > for publishing. CONFIG_ENV_IS_NOWHERE is the board( maintainer)'s business. Ditto for the FLASH driver, if it is not required for use of the board (e.g., if U-Boot can fire up and does not need the FLASH to boot an OS, then a broken FLASH driver is an inconvenience, not a showstopper). > I'd like to get an advice, if you think that weakly supported but > working U-boot on the board has chances to be included to arm-next I can > send the patchset right now for review, otherwise I'll spend some time > (one week approximately) to finish NAND driver. IMO, the acceptable state of a board is the board maintainer's affair, with a bare minimum that U-Boot must be able to play its role as a bootloader. Anyway, since that is for next, not master, and since you think you can add the missing support far before the next merge window, I suggest you complete board support and add it to V4. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/7] omap_gpmc: use SOFTECC in SPL if it's enabled
Hi Simon,
On 21.10.2011 15:08, Simon Schwarz wrote:
> Another thing just poped into my mind, ATM I have a DMA patch for
> devkit8000 on the ML:
> http://article.gmane.org/gmane.comp.boot-loaders.u-boot/109744
> http://article.gmane.org/gmane.comp.boot-loaders.u-boot/112661
>
> It speeds up the process of copying the u-boot/linux image. ATM this is
> in combination with HW ecc and I doubt that it will work seamlessly with
> SW-ecc, yet. However IMHO DMA in combination with SW-ecc could be nearly
> as fast as using HW-ecc.
>
> So maybe an adaption is worth a try?
Ok, I've finally taken a look at it. Adaption is very straight forward
actually. This works for me:
diff --git a/drivers/mtd/nand/nand_spl_simple.c
b/drivers/mtd/nand/nand_spl_simple.c
index 1402a35..1248f8f 100644
--- a/drivers/mtd/nand/nand_spl_simple.c
+++ b/drivers/mtd/nand/nand_spl_simple.c
@@ -284,7 +284,8 @@ static int nand_read_page_dma(int block, int page,
void *dst)
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
res += omap3_dma_conf_transfer(0, nand_chip.IO_ADDR_R,
(uint32_t *)p, CONFIG_SYS_NAND_ECCSIZE/4);
- this->ecc.hwctl(&mtd, NAND_ECC_READ);
+ if (this->ecc.mode != NAND_ECC_SOFT)
+ this->ecc.hwctl(&mtd, NAND_ECC_READ);
res += omap3_dma_start_transfer(0);
/* correct ecc from former transfer */
if (ecc_wait.valid != 0)
Regards, Ilya.
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Re: [U-Boot] [PATCH] miiphy: Note that miiphy_* API is deprecated
On Monday 31 October 2011 10:46:13 Andy Fleming wrote: > +What:Users of the legacy miiphy_* code > +When:undetermined > + > +Why: We now have a PHY library, which allows everyone to share PHY > + drivers. All new drivers should use this infrastructure, and > + all old drivers should get converted to use it. could you explicitly mention the defines which are considered "old" and the ones that are considered "new" here ? and update the top level README as well (if the old defines are mentioned) ? -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] mx31: NAND_SPL boot question for TT-01
Hi (Stefano), just a short question. I'd like to add NAND boot to the board support of our TT-01. I checked out the mx31pdk code and also found something in doc/README.SPL which does not seem to correspond. Before I head into the wrong direction again, is the mx31pdk implementation still hip? Thx, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v7 4/4] tegra2: Add support for Ventana
Ventana is a board which is very similar to Seaboard. Support it by
re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.
v5: Makefile: Use cmd_link_o_target, remove unused clean/distclean targets.
v6: Make gpio_config_uart_seaboard() static.
v7: Add MAINTAINERS entry for Ventana. Tom Warren doesn't have Ventana, so
he asked me to add myself for this board.
Signed-off-by: Stephen Warren
Acked-by: Simon Glass
---
MAINTAINERS |5 +++
board/nvidia/seaboard/seaboard.c | 11 ++-
board/nvidia/ventana/Makefile| 49 +
boards.cfg |1 +
include/configs/ventana.h| 55 ++
5 files changed, 119 insertions(+), 2 deletions(-)
create mode 100644 board/nvidia/ventana/Makefile
create mode 100644 include/configs/ventana.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 576fea8..6ff894c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -873,6 +873,11 @@ Tom Warren
harmony Tegra2 (ARM7 & A9 Dual Core)
seaboardTegra2 (ARM7 & A9 Dual Core)
+Tom Warren
+Stephen Warren
+
+ ventana Tegra2 (ARM7 & A9 Dual Core)
+
Lei Wen
dkb ARM926EJS (PANTHEON 88AP920 SOC)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index 356d616..aa77f12 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -32,10 +32,10 @@
#include "../common/board.h"
/*
- * Routine: gpio_config_uart
+ * Routine: gpio_config_uart_seaboard
* Description: Force GPIO_PI3 low on Seaboard so UART4 works.
*/
-void gpio_config_uart(void)
+static void gpio_config_uart_seaboard(void)
{
int gp = GPIO_PI3;
struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
@@ -56,6 +56,13 @@ void gpio_config_uart(void)
writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]);
}
+void gpio_config_uart(void)
+{
+ if (machine_is_ventana())
+ return;
+ gpio_config_uart_seaboard();
+}
+
#ifdef CONFIG_TEGRA2_MMC
/*
* Routine: pin_mux_mmc
diff --git a/board/nvidia/ventana/Makefile b/board/nvidia/ventana/Makefile
new file mode 100644
index 000..9e5a87f
--- /dev/null
+++ b/board/nvidia/ventana/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2010,2011
+# NVIDIA Corporation
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../common)
+endif
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS += ../seaboard/seaboard.o
+COBJS += ../common/board.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/boards.cfg b/boards.cfg
index 604becf..83a0039 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -194,6 +194,7 @@ s5pc210_universalarm armv7
universal_c210 samsung
smdkv310arm armv7 smdkv310
samsungs5pc2xx
harmony arm armv7 harmony
nvidia tegra2
seaboard arm armv7 seaboard
nvidia tegra2
+ventana arm armv7 ventana
nvidia tegra2
u8500_href arm armv7 u8500
st-ericssonu8500
actux1_4_16 arm ixp actux1 -
- actux1:FLASH2X2
actux1_8_16 arm ixp actux1 -
- actux1:FLASH1X8
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
new file mode 100644
index 000..afd6ff6
--- /dev/null
+++ b/include/configs/ventana.h
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporation
+ *
+ * See file CREDITS for list of people who c
[U-Boot] [PATCH v7 2/4] tegra2: Move board_mmc_init into board files
For Seaboard, this is mostly a cut/paste of board_mmc_init() and
pin_mux_mmc() into seaboard.c; pin_mux_mmc() was modified to add some
missing pinmux_tristate_disable calls for the GPIOs.
For Harmony, those functions were modified to configure SDMMC2 (index 2)
instead of SDMMC3 (index 1), since that's what is present on the board.
However, harmony.c is still missing the required GPIO setup, so neither
port is likely to function correctly yet. This will be fixed in the next
change.
v4: Include board.h to prototype tegra2_mmc_init().
Signed-off-by: Stephen Warren
Tested-by: Simon Glass
Acked-by: Simon Glass
---
board/nvidia/common/board.c | 52 ---
board/nvidia/harmony/harmony.c | 56 ++
board/nvidia/seaboard/seaboard.c | 53 +++
3 files changed, 109 insertions(+), 52 deletions(-)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 370a259..0f12de2 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -33,10 +33,6 @@
#include
#include "board.h"
-#ifdef CONFIG_TEGRA2_MMC
-#include
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
const struct tegra2_sysinfo sysinfo = {
@@ -100,33 +96,6 @@ static void pin_mux_uart(void)
#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
}
-#ifdef CONFIG_TEGRA2_MMC
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-static void pin_mux_mmc(void)
-{
- /* SDMMC4: config 3, x8 on 2nd set of pins */
- pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
- pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
- pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
-
- pinmux_tristate_disable(PINGRP_ATB);
- pinmux_tristate_disable(PINGRP_GMA);
- pinmux_tristate_disable(PINGRP_GME);
-
- /* SDMMC3: SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */
- pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
- pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
- pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
-
- pinmux_tristate_disable(PINGRP_SDC);
- pinmux_tristate_disable(PINGRP_SDD);
- pinmux_tristate_disable(PINGRP_SDB);
-}
-#endif
-
/*
* Routine: board_init
* Description: Early hardware init.
@@ -142,27 +111,6 @@ int board_init(void)
return 0;
}
-#ifdef CONFIG_TEGRA2_MMC
-/* this is a weak define that we are overriding */
-int board_mmc_init(bd_t *bd)
-{
- debug("board_mmc_init called\n");
- /* Enable muxes, etc. for SDMMC controllers */
- pin_mux_mmc();
- gpio_config_mmc();
-
- debug("board_mmc_init: init eMMC\n");
- /* init dev 0, eMMC chip, with 4-bit bus */
- tegra2_mmc_init(0, 4);
-
- debug("board_mmc_init: init SD slot\n");
- /* init dev 1, SD slot, with 4-bit bus */
- tegra2_mmc_init(1, 4);
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index cbb30d6..f2c3867 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -24,9 +24,11 @@
#include
#include
#include
+#include
#ifdef CONFIG_TEGRA2_MMC
#include
#endif
+#include "../common/board.h"
/*
* Routine: gpio_config_uart
@@ -38,6 +40,39 @@ void gpio_config_uart(void)
#ifdef CONFIG_TEGRA2_MMC
/*
+ * Routine: pin_mux_mmc
+ * Description: setup the pin muxes/tristate values for the SDMMC(s)
+ */
+static void pin_mux_mmc(void)
+{
+ /* SDMMC4: config 3, x8 on 2nd set of pins */
+ pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
+
+ pinmux_tristate_disable(PINGRP_ATB);
+ pinmux_tristate_disable(PINGRP_GMA);
+ pinmux_tristate_disable(PINGRP_GME);
+
+ /* For power GPIO PI6 */
+ pinmux_tristate_disable(PINGRP_ATA);
+ /* For CD GPIO PH2 */
+ pinmux_tristate_disable(PINGRP_ATD);
+
+ /* SDMMC2: SDIO2_CLK, SDIO2_CMD, SDIO2_DAT[7:0] */
+ pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
+ pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
+
+ pinmux_tristate_disable(PINGRP_DTA);
+ pinmux_tristate_disable(PINGRP_DTD);
+
+ /* For power GPIO PT3 */
+ pinmux_tristate_disable(PINGRP_DTB);
+ /* For CD GPIO PI5 */
+ pinmux_tristate_disable(PINGRP_ATC);
+}
+
+/*
* Routine: gpio_config_mmc
* Description: Set GPIOs for SD card
*/
@@ -47,6 +82,27 @@ void gpio_config_mmc(void)
}
/* this is a weak define that we are overriding */
+int board_mmc_init(bd_t *bd)
+{
+ debug("board_mmc_init called\n");
+
+ /* Enable muxes, etc. for SDMMC controllers */
+ pin_mux_mmc();
+ gpio_config_mmc();
+
+ debug("board_mmc_init: init SD slot J26\n");
+ /* init dev 0, SD slot J26, with 4-bit bus */
+ /* The board has an 8-bit bus, but
[U-Boot] [PATCH v7 3/4] tegra2: Modify MMC driver to handle power and cd GPIOs
Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and
modify that function to perform all required GPIO initialization. This
removes the need for board files to perform these operations.
Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which
GPIOs to use.
Update affected call-sites in seaboard.c and harmony.c. Note that this
change should make all SD ports work on Harmony, since the required GPIO
setup is now being performed.
v4: Fix prototype of tegra2_mmc_init() in board.h to match driver change.
Remove prototype of gpio_config_mmc() from board.h
Signed-off-by: Stephen Warren
Cc: Andy Fleming
Tested-by: Simon Glass
Acked-by: Simon Glass
---
board/nvidia/common/board.h |3 +-
board/nvidia/harmony/harmony.c | 27 ++-
board/nvidia/seaboard/seaboard.c | 33 +
drivers/mmc/tegra2_mmc.c | 42 -
drivers/mmc/tegra2_mmc.h |4 ++-
5 files changed, 45 insertions(+), 64 deletions(-)
diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h
index 344e702..35acbca 100644
--- a/board/nvidia/common/board.h
+++ b/board/nvidia/common/board.h
@@ -26,7 +26,6 @@
void tegra2_start(void);
void gpio_config_uart(void);
-void gpio_config_mmc(void);
-int tegra2_mmc_init(int dev_index, int bus_width);
+int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio);
#endif /* BOARD_H */
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index f2c3867..3cbe820 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_TEGRA2_MMC
#include
#endif
@@ -72,15 +73,6 @@ static void pin_mux_mmc(void)
pinmux_tristate_disable(PINGRP_ATC);
}
-/*
- * Routine: gpio_config_mmc
- * Description: Set GPIOs for SD card
- */
-void gpio_config_mmc(void)
-{
- /* Not implemented for now */
-}
-
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
@@ -88,29 +80,16 @@ int board_mmc_init(bd_t *bd)
/* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
- gpio_config_mmc();
debug("board_mmc_init: init SD slot J26\n");
/* init dev 0, SD slot J26, with 4-bit bus */
/* The board has an 8-bit bus, but 8-bit doesn't work yet */
- tegra2_mmc_init(0, 4);
+ tegra2_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);
debug("board_mmc_init: init SD slot J5\n");
/* init dev 2, SD slot J5, with 4-bit bus */
- tegra2_mmc_init(2, 4);
+ tegra2_mmc_init(2, 4, GPIO_PT3, GPIO_PI5);
return 0;
}
-
-/* this is a weak define that we are overriding */
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
-{
- debug("board_mmc_getcd called\n");
- /*
-* Hard-code CD presence for now. Need to add GPIO inputs
-* for Harmony
-*/
- *cd = 1;
- return 0;
-}
#endif
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index 22a0e69..356d616 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -87,19 +87,6 @@ static void pin_mux_mmc(void)
pinmux_tristate_disable(PINGRP_ATC);
}
-/*
- * Routine: gpio_config_mmc
- * Description: Set GPIOs for SDMMC3 SDIO slot.
- */
-void gpio_config_mmc(void)
-{
- /* Set EN_VDDIO_SD (GPIO I6) */
- gpio_direction_output(GPIO_PI6, 1);
-
- /* Config pin as GPI for Card Detect (GPIO I5) */
- gpio_direction_input(GPIO_PI5);
-}
-
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
@@ -107,31 +94,15 @@ int board_mmc_init(bd_t *bd)
/* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
- gpio_config_mmc();
debug("board_mmc_init: init eMMC\n");
/* init dev 0, eMMC chip, with 4-bit bus */
/* The board has an 8-bit bus, but 8-bit doesn't work yet */
- tegra2_mmc_init(0, 4);
+ tegra2_mmc_init(0, 4, -1, -1);
debug("board_mmc_init: init SD slot\n");
/* init dev 1, SD slot, with 4-bit bus */
- tegra2_mmc_init(1, 4);
-
- return 0;
-}
-
-/* this is a weak define that we are overriding */
-int board_mmc_getcd(u8 *cd, struct mmc *mmc)
-{
- debug("board_mmc_getcd called\n");
- *cd = 1;/* Assume card is inserted, or eMMC */
-
- if (IS_SD(mmc)) {
- /* Seaboard SDMMC3 = SDIO3_CD = GPIO_PI5 */
- if (gpio_get_value(GPIO_PI5))
- *cd = 0;
- }
+ tegra2_mmc_init(1, 4, GPIO_PI6, GPIO_PI5);
return 0;
}
diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
index 78b1190..3de9c5d 100644
--- a/drivers/mmc/tegra2_mmc.c
+++ b/drivers/mmc/tegra2_mmc.c
@@ -21,6 +21,7 @@
#include
#include
+#include
#include
#include
#include
@@ -433
[U-Boot] [PATCH v7 1/4] tegra2: Move MMC clock initialization into MMC driver
This centralizes knowledge of MMC clocking into the MMC driver. This also
removes clock setup from the board files, which will simplify later changes
that modify the Harmony board to support the correct set of MMC controllers.
Signed-off-by: Stephen Warren
Cc: Andy Fleming
Acked-by: Simon Glass
Tested-by: Simon Glass
---
board/nvidia/common/board.c | 13 +
drivers/mmc/tegra2_mmc.c| 12 +---
2 files changed, 10 insertions(+), 15 deletions(-)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index d13537d..370a259 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -102,16 +102,6 @@ static void pin_mux_uart(void)
#ifdef CONFIG_TEGRA2_MMC
/*
- * Routine: clock_init_mmc
- * Description: init the PLL and clocks for the SDMMC controllers
- */
-static void clock_init_mmc(void)
-{
- clock_start_periph_pll(PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH, 2000);
- clock_start_periph_pll(PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH, 2000);
-}
-
-/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
@@ -157,8 +147,7 @@ int board_init(void)
int board_mmc_init(bd_t *bd)
{
debug("board_mmc_init called\n");
- /* Enable clocks, muxes, etc. for SDMMC controllers */
- clock_init_mmc();
+ /* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
gpio_config_mmc();
diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
index 9e741f2..78b1190 100644
--- a/drivers/mmc/tegra2_mmc.c
+++ b/drivers/mmc/tegra2_mmc.c
@@ -435,14 +435,22 @@ static int mmc_core_init(struct mmc *mmc)
static int tegra2_mmc_initialize(int dev_index, int bus_width)
{
+ struct mmc_host *host;
struct mmc *mmc;
debug(" mmc_initialize called\n");
+ host = &mmc_host[dev_index];
+
+ host->clock = 0;
+ tegra2_get_setup(host, dev_index);
+
+ clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 2000);
+
mmc = &mmc_dev[dev_index];
sprintf(mmc->name, "Tegra2 SD/MMC");
- mmc->priv = &mmc_host[dev_index];
+ mmc->priv = host;
mmc->send_cmd = mmc_send_cmd;
mmc->set_ios = mmc_set_ios;
mmc->init = mmc_core_init;
@@ -465,8 +473,6 @@ static int tegra2_mmc_initialize(int dev_index, int
bus_width)
mmc->f_min = 375000;
mmc->f_max = 4800;
- mmc_host[dev_index].clock = 0;
- tegra2_get_setup(&mmc_host[dev_index], dev_index);
mmc_register(mmc);
return 0;
--
1.7.0.4
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http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 1/2] nand: Add common functions to linux/mtd/nand.h
Functions often used in SPL are now part of linux/mtd/nand.h.
Static modifiers are removed from these functions in
drivers/mtd/nand/nand_base.c.
Signed-off-by: Simon Schwarz
Cc: scottw...@freescale.com
Cc: s-paul...@ti.com
Cc: albert.u.b...@aribaud.net
---
Changes V2:
CHG moved function definiton from nand.h to linux/mtd/nand.h because of:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/110219
Changes V3:
CHG moved the definitions before double inculsion detection end
CHG combined function definition and prototype in one patch as advised here:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/114558
---
drivers/mtd/nand/nand_base.c |6 +++---
include/linux/mtd/nand.h |7 +++
include/nand.h |3 ---
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index e7dfcb1..109d2cf 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -133,7 +133,7 @@ static void nand_release_device (struct mtd_info *mtd)
*
* Default read function for 8bit buswith
*/
-static uint8_t nand_read_byte(struct mtd_info *mtd)
+uint8_t nand_read_byte(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd->priv;
return readb(chip->IO_ADDR_R);
@@ -196,7 +196,7 @@ static void nand_select_chip(struct mtd_info *mtd, int
chipnr)
*
* Default write function for 8bit buswith
*/
-static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
@@ -249,7 +249,7 @@ static int nand_verify_buf(struct mtd_info *mtd, const
uint8_t *buf, int len)
*
* Default write function for 16bit buswith
*/
-static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
+void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 987a2ec..1cdc7ae 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -623,4 +623,11 @@ struct platform_nand_chip *get_platform_nandchip(struct
mtd_info *mtd)
return chip->priv;
}
+/* Standard NAND functions from nand_base.c */
+void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len);
+void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len);
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
+uint8_t nand_read_byte(struct mtd_info *mtd);
+
#endif /* __LINUX_MTD_NAND_H */
diff --git a/include/nand.h b/include/nand.h
index b4140794..d444ddc 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -135,9 +135,6 @@ int nand_get_lock_status(nand_info_t *meminfo, loff_t
offset);
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst);
void nand_deselect(void);
-void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
-void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
-
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
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[U-Boot] [PATCH V3 2/2] Fix regression in SMDK6400
s3c64xx.c implemented its own nand_read_byte, nand_write_buf and
nand_read_buf functions. This provoked a regression when these functions
were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8.
This deletes these duplicated functions from s3c64xx.c and adds the generic
implementations in nand_base.c to the spl Makefile. It also adds
-ffcuntion-sections and -gc-sections to the compilation flags of the SPL to
avoid errors originating from unused functions in nand_base.c.
Description of the regression:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873
Signed-off-by: Simon Schwarz
Cc: scottw...@freescale.com
Cc: s-paul...@ti.com
Cc: albert.u.b...@aribaud.net
---
Changes V2:
CHG include linux/mtd/nand.h because of:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/110219
Changes V3:
none
---
drivers/mtd/nand/s3c64xx.c | 28 ++--
nand_spl/board/samsung/smdk6400/Makefile |9 ++---
2 files changed, 8 insertions(+), 29 deletions(-)
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
index 084e475..87f0341 100644
--- a/drivers/mtd/nand/s3c64xx.c
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -28,6 +28,8 @@
#include
#include
+#include
+
#include
#include
@@ -60,32 +62,6 @@ static void print_oob(const char *header, struct mtd_info
*mtd)
}
#endif /* S3C_NAND_DEBUG */
-#ifdef CONFIG_NAND_SPL
-static u_char nand_read_byte(struct mtd_info *mtd)
-{
- struct nand_chip *this = mtd->priv;
- return readb(this->IO_ADDR_R);
-}
-
-static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
-{
- int i;
- struct nand_chip *this = mtd->priv;
-
- for (i = 0; i < len; i++)
- writeb(buf[i], this->IO_ADDR_W);
-}
-
-static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
-{
- int i;
- struct nand_chip *this = mtd->priv;
-
- for (i = 0; i < len; i++)
- buf[i] = readb(this->IO_ADDR_R);
-}
-#endif
-
static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
{
int ctrl = readl(NFCONT);
diff --git a/nand_spl/board/samsung/smdk6400/Makefile
b/nand_spl/board/samsung/smdk6400/Makefile
index 2f9c307..c9e75ba 100644
--- a/nand_spl/board/samsung/smdk6400/Makefile
+++ b/nand_spl/board/samsung/smdk6400/Makefile
@@ -33,12 +33,12 @@ nandobj := $(OBJTREE)/nand_spl/
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
- $(LDFLAGS_FINAL)
+ $(LDFLAGS_FINAL) -gc-sections
AFLAGS += -DCONFIG_NAND_SPL
-CFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL -ffunction-sections
SOBJS = start.o cpu_init.o lowlevel_init.o
-COBJS = nand_boot.o nand_ecc.o s3c64xx.o smdk6400_nand_spl.o
+COBJS = nand_boot.o nand_ecc.o s3c64xx.o smdk6400_nand_spl.o nand_base.o
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
@@ -98,6 +98,9 @@ $(obj)smdk6400_nand_spl.c:
@rm -f $@
@ln -s $(TOPDIR)/board/samsung/smdk6400/smdk6400_nand_spl.c $@
+$(obj)nand_base.c:
+ @rm -f $@
+ @ln -s $(TOPDIR)/drivers/mtd/nand/nand_base.c $@
#
$(obj)%.o: $(obj)%.S
--
1.7.4.1
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[U-Boot] [PATCH V3 0/2] fix: regression in SMDK6400
This is a fix for a regression introduced by my patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8 to u-boot-ti/next The issue is described here: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873 changes V3: - fix for: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/114559 - http://article.gmane.org/gmane.comp.boot-loaders.u-boot/114558 Simon Schwarz (2): nand: Add common functions to linux/mtd/nand.h Fix regression in SMDK6400 drivers/mtd/nand/nand_base.c |6 +++--- drivers/mtd/nand/s3c64xx.c | 28 ++-- include/linux/mtd/nand.h |7 +++ include/nand.h |3 --- nand_spl/board/samsung/smdk6400/Makefile |9 ++--- 5 files changed, 18 insertions(+), 35 deletions(-) -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V7 3/5] omap-common/spl: Add linux boot to SPL
From: Simon Schwarz
This adds Linux booting to the SPL
This depends on CONFIG_MACH_TYPE patch by Igor Grinberg
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105809)
Related CONFIGs:
CONFIG_SPL_OS_BOOT
Activates/Deactivates the OS booting feature
CONFIG_SPL_OS_BOOT_KEY
defines the IO-pin number u-boot switch - if pressed u-boot is booted
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
Offset in NAND of direct boot kernel image to use in SPL
CONFIG_SYS_SPL_ARGS_ADDR
Address where the kernel boot arguments are expected - this is normaly
RAM-begin + 0x100
Signed-off-by: Simon Schwarz
---
V2 changes:
nothing
V3 changes:
nothing
V4 changes:
CHG Using CONFIG_MACH_TYPE now.
DEL CONFIG_SYS_SPL_MACHID
CHG Use CONFIG_MACH_TYPE for machine id config - This makes the patch
depending on the patch linked above
V5 changes:
FIX compile errors for OMAP4
REBASE u-boot-ti adapted new general gpio interface
V6 changes:
nothing
V7 changes:
FIX multiline comment style
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/113501)
---
arch/arm/cpu/armv7/omap-common/spl.c | 51 -
include/configs/devkit8000.h |9 -
2 files changed, 56 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
b/arch/arm/cpu/armv7/omap-common/spl.c
index d37ca0f..bafddfb 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -35,6 +35,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -63,6 +64,26 @@ void board_init_f(ulong dummy)
relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE);
}
+/*
+ * Return the value of the U-boot key
+ *
+ * RETURN
+ * 0 if not pressed
+ * positiv if pressed
+ */
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_uboot_key(void)
+{
+ int val = 0;
+ if (!gpio_request(CONFIG_SPL_OS_BOOT_KEY, "U-Boot key")) {
+ gpio_direction_input(CONFIG_SPL_OS_BOOT_KEY);
+ val = gpio_get_value(CONFIG_SPL_OS_BOOT_KEY);
+ gpio_free(CONFIG_SPL_OS_BOOT_KEY);
+ }
+ return !val;
+}
+#endif
+
void spl_parse_image_header(const struct image_header *header)
{
u32 header_size = sizeof(struct image_header);
@@ -90,7 +111,26 @@ void spl_parse_image_header(const struct image_header
*header)
}
}
-static void jump_to_image_no_args(void)
+/*
+ * This function jumps to an image with argument. Normally an FDT or ATAGS
+ * image.
+ * arg: Pointer to paramter image in RAM
+ */
+#ifdef CONFIG_SPL_OS_BOOT
+void jump_to_image_linux(void *arg)
+{
+ debug("Entering kernel arg pointer: 0x%X\n", arg);
+ typedef void (*image_entry_arg_t)(int, int, void *)
+ __attribute__ ((noreturn));
+ image_entry_arg_t image_entry =
+ (image_entry_arg_t) spl_image.entry_point;
+ /* cleanup_before_linux(); */ /*write SPL function for that*/
+ image_entry(0, CONFIG_MACH_TYPE, arg);
+}
+void jump_to_image_linux(void *) __attribute__ ((noreturn));
+#endif
+
+void jump_to_image_no_args(void)
{
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
image_entry_noargs_t image_entry =
@@ -99,8 +139,8 @@ static void jump_to_image_no_args(void)
debug("image entry point: 0x%X\n", spl_image.entry_point);
image_entry();
}
-
void jump_to_image_no_args(void) __attribute__ ((noreturn));
+
void board_init_r(gd_t *id, ulong dummy)
{
u32 boot_device;
@@ -137,6 +177,13 @@ void board_init_r(gd_t *id, ulong dummy)
debug("Jumping to U-Boot\n");
jump_to_image_no_args();
break;
+#ifdef CONFIG_SPL_OS_BOOT
+ case IH_OS_LINUX:
+ debug("Jumping to Linux\n");
+ spl_board_prepare_for_linux();
+ jump_to_image_linux((void *)CONFIG_SYS_SPL_ARGS_ADDR);
+ break;
+#endif
default:
puts("Unsupported OS image.. Jumping nevertheless..\n");
jump_to_image_no_args();
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index f603f55..a848f4d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -37,7 +37,9 @@
#define CONFIG_OMAP34301 /* which is in a 3430 */
#define CONFIG_OMAP3_DEVKIT80001 /* working with DevKit8000 */
-#defineCONFIG_SYS_TEXT_BASE0x80008000
+#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
+
+#defineCONFIG_SYS_TEXT_BASE0x8010
#define CONFIG_SDRC/* The chip has SDRC controller */
@@ -333,7 +335,7 @@
#define CONFIG_SPL_MAX_SIZE0xB400 /* 45 K */
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#define CONFIG_SPL_BSS_START_ADDR 0x8000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_START_ADDR 0x8500 /* leave space for bootargs*/
#define CONFIG_SPL_BSS_MAX_SIZE
[U-Boot] [PATCH V7 5/5] omap-common: fixes BSS overwriting problem
From: Simon Schwarz
spl_nand overwrote BSS section because it reads a whole block everytime. Now
loads the block to spare area and just copy the needed junk to destination.
Whole block read is necessary for ecc check!
Signed-off-by: Simon Schwarz
---
V2 changes:
nothing
V3 changes:
nothing
V4 changes:
nothing
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
nothing
---
arch/arm/cpu/armv7/omap-common/spl_nand.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl_nand.c
b/arch/arm/cpu/armv7/omap-common/spl_nand.c
index 1b9e171..903255b 100644
--- a/arch/arm/cpu/armv7/omap-common/spl_nand.c
+++ b/arch/arm/cpu/armv7/omap-common/spl_nand.c
@@ -71,7 +71,8 @@ void spl_nand_load_image(void)
CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
spl_parse_image_header(header);
nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
- spl_image.size, (void *)spl_image.load_addr);
+ spl_image.size,
+ (void *)spl_image.load_addr - sizeof(header));
} else
#endif
{
--
1.7.4.1
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[U-Boot] [PATCH V7 4/5] devkit8000/spl: init GPMC for dm9000 in SPL
From: Simon Schwarz
Linux crashes if the GPMC isn't configured for the dm9000.
Signed-off-by: Simon Schwarz
---
V2 changes:
nothing
V3 changes:
nothing
V4 changes:
noting
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
FIX multiline comment style
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/113500)
---
arch/arm/include/asm/omap_common.h |2 ++
board/timll/devkit8000/devkit8000.c | 33 +
2 files changed, 27 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index 3f2f004..ab86774 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -78,6 +78,8 @@ u32 omap_boot_mode(void);
/* SPL common function s*/
void spl_parse_image_header(const struct image_header *header);
void omap_rev_string(char *omap_rev_string);
+int spl_uboot_key(void);
+void spl_board_prepare_for_linux(void);
/* NAND SPL functions */
void spl_nand_load_image(void);
diff --git a/board/timll/devkit8000/devkit8000.c
b/board/timll/devkit8000/devkit8000.c
index fee0dff..11c8671 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -63,6 +63,18 @@ int board_init(void)
return 0;
}
+/* Configure GPMC registers for DM9000 */
+static void gpmc_dm9000_config(void)
+{
+ writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[6].config1);
+ writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[6].config2);
+ writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[6].config3);
+ writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[6].config4);
+ writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[6].config5);
+ writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[6].config6);
+ writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[6].config7);
+}
+
/*
* Routine: misc_init_r
* Description: Configure board specific parts
@@ -81,14 +93,7 @@ int misc_init_r(void)
#endif
#ifdef CONFIG_DRIVER_DM9000
- /* Configure GPMC registers for DM9000 */
- writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[6].config1);
- writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[6].config2);
- writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[6].config3);
- writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[6].config4);
- writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[6].config5);
- writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[6].config6);
- writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[6].config7);
+ gpmc_dm9000_config();
/* Use OMAP DIE_ID as MAC address */
if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
@@ -138,3 +143,15 @@ int board_eth_init(bd_t *bis)
return dm9000_initialize(bis);
}
#endif
+
+#ifdef CONFIG_SPL_OS_BOOT
+/*
+ * Do board specific preperation before SPL
+ * Linux boot
+ */
+void spl_board_prepare_for_linux(void)
+{
+ gpmc_dm9000_config();
+}
+
+#endif
--
1.7.4.1
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[U-Boot] [PATCH V7 2/5] omap-common: Add NAND SPL linux booting
From: Simon Schwarz
This implements booting of Linux from NAND in SPL
Related config parameters:
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
Offset in NAND of direct boot kernel image to use in SPL
CONFIG_SYS_SPL_ARGS_ADDR
Address where the kernel boot arguments are expected - this is
normally RAM-start + 0x100 (on ARM)
Signed-off-by: Simon Schwarz
---
V2 changes:
nothing
V3 changes:
nothing
V4 changes:
ADD define description to commit message
CHG renaming some defines - renaming SAVEBP SPL
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
nothing
---
arch/arm/cpu/armv7/omap-common/spl_nand.c | 62 +---
1 files changed, 46 insertions(+), 16 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl_nand.c
b/arch/arm/cpu/armv7/omap-common/spl_nand.c
index 38d06b1..1b9e171 100644
--- a/arch/arm/cpu/armv7/omap-common/spl_nand.c
+++ b/arch/arm/cpu/armv7/omap-common/spl_nand.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -32,6 +33,7 @@
void spl_nand_load_image(void)
{
struct image_header *header;
+ int *src, *dst;
switch (omap_boot_mode()) {
case NAND_MODE_HW_ECC:
debug("spl: nand - using hw ecc\n");
@@ -45,26 +47,54 @@ void spl_nand_load_image(void)
/*use CONFIG_SYS_TEXT_BASE as temporary storage area */
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+#ifdef CONFIG_SPL_OS_BOOT
+ if (!spl_uboot_key()) {
+ /* load parameter image */
+ /* load to temp position since nand_spl_load_image reads
+* a whole block which is typically larger than
+* CONFIG_CMD_SAVEBP_WRITE_SIZE therefore may overwrite
+* following sections like BSS */
+ nand_spl_load_image(CONFIG_CMD_SPL_NAND_OFS,
+ CONFIG_CMD_SPL_WRITE_SIZE,
+ (void *)CONFIG_SYS_TEXT_BASE);
+ /* copy to destintion */
+ for (dst = (int *)CONFIG_SYS_SPL_ARGS_ADDR,
+ src = (int *)CONFIG_SYS_TEXT_BASE;
+ src < (int *)(CONFIG_SYS_TEXT_BASE +
+ CONFIG_CMD_SPL_WRITE_SIZE);
+ src++, dst++) {
+ writel(readl(src), dst);
+ }
+ /* load linux */
+ nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
+ spl_image.size, (void *)spl_image.load_addr);
+ } else
+#endif
+ {
#ifdef CONFIG_NAND_ENV_DST
- nand_spl_load_image(CONFIG_ENV_OFFSET,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- spl_parse_image_header(header);
- nand_spl_load_image(CONFIG_ENV_OFFSET, spl_image.size,
- (void *)image_load_addr);
+ nand_spl_load_image(CONFIG_ENV_OFFSET,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET, spl_image.size,
+ (void *)spl_image.load_addr);
#ifdef CONFIG_ENV_OFFSET_REDUND
- nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- spl_parse_image_header(header);
- nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, spl_image.size,
- (void *)image_load_addr);
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, spl_image.size,
+ (void *)spl_image.load_addr);
#endif
#endif
- /* Load u-boot */
- nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- spl_parse_image_header(header);
- nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
- spl_image.size, (void *)spl_image.load_addr);
+ /* Load u-boot */
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ spl_image.size, (void *)spl_image.load_addr);
+ }
nand_deselect();
}
--
1.7.4.1
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[U-Boot] [PATCH V7 1/5] Add cmd_spl command
From: Simon Schwarz
This adds a spl command to the u-boot.
Related config:
CONFIG_CMD_CPL
activate/deactivate the command
CONFIG_CMD_SPL_NAND_OFS
Offset in NAND to use
Signed-off-by: Simon Schwarz
---
V2 changes:
CHG corrected bootm call. Now bootm is called with five parameters including
Address of FDT in RAM. This fixes the hang on savebp fdt call.
ADD debug output of the actual bootm parameter call
CHG help message
V3 changes:
FIX added missing brackets
V4 changes:
CHG Corrected argument number in comments
CHG added check for CONFIG_OF_LIBFDT
CHG squashed the README to this commit
DEL define description from commit message - unused in this patch
CHG renamed to spl now with subcommand export, very different now
ADD New call style with subcommands.
CHG added printf where the image is located
CHG Patched README to reflect changes
CHG parameter count
CHG usage message
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
FIX multiline comment style, cosmetic changes
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/113499)
---
common/Makefile |1 +
common/cmd_spl.c | 224 ++
doc/README.commands.spl | 31 ++
include/cmd_spl.h| 30 ++
include/configs/devkit8000.h |7 ++
5 files changed, 293 insertions(+), 0 deletions(-)
create mode 100644 common/cmd_spl.c
create mode 100644 doc/README.commands.spl
create mode 100644 include/cmd_spl.h
diff --git a/common/Makefile b/common/Makefile
index 1b672ad..4056e41 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -164,6 +164,7 @@ COBJS-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
COBJS-$(CONFIG_CMD_XIMG) += cmd_ximg.o
COBJS-$(CONFIG_YAFFS2) += cmd_yaffs2.o
+COBJS-$(CONFIG_CMD_SPL) += cmd_spl.o
# others
ifdef CONFIG_DDR_SPD
diff --git a/common/cmd_spl.c b/common/cmd_spl.c
new file mode 100644
index 000..eb498c6
--- /dev/null
+++ b/common/cmd_spl.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Calls bootm with the parameters given */
+int call_bootm(int argc, char * const argv[], char *subcommand[])
+{
+ char *bootm_argv[5];
+ char command[] = "do_bootm";
+
+ int i = 0;
+ int ret = 0;
+
+ /* create paramter array */
+ bootm_argv[0] = command;
+ switch (argc) {
+ case 3:
+ bootm_argv[4] = argv[2]; /* fdt addr */
+ case 2:
+ bootm_argv[3] = argv[1]; /* initrd addr */
+ case 1:
+ bootm_argv[2] = argv[0]; /* kernel addr */
+ }
+
+
+ /*
+* - do the work -
+* exec subcommands of do_bootm to init the images
+* data structure
+*/
+ while (subcommand[i] != '\0') {
+ bootm_argv[1] = subcommand[i];
+ debug("args: %s, %s, %s, %s, %s, %d\n", bootm_argv[0],
+ bootm_argv[1], bootm_argv[2], bootm_argv[3],
+ bootm_argv[4], argc);
+ ret = do_bootm(find_cmd("do_bootm"), 0, argc+2,
+ bootm_argv);
+ debug("Subcommand retcode: %d\n", ret);
+ i++;
+ }
+
+ if (ret) {
+ printf("ERROR prep subcommand failed!\n");
+ return -1;
+ }
+
+ return 0;
+}
+
+/* assemble the bootm paramteres for fdt creation */
+int spl_export_fdt(int argc, char * const argv[])
+{
+#ifdef CONFIG_OF_LIBFDT
+ /* Create subcommand string */
+ char *subcommand[] = {"start",
+ "loados",
+#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
+ "ramdisk",
+#endif
+ "fdt",
+ "cmdline",
+ "bdt",
+ "prep",
+ '\0'};
+
+ /* inspect paramters and execute bootm */
+ argc--;
+ argv++;
+ if (call_bootm(argc, argv, subcommand))
+ return -1;
+
+ printf("Argument image is now in RAM: 0x%p\n",
+ (void *)images.ft_addr);
+ return 0;
+#else
+ printf("Das U-Boot was build without fdt support - aborting\n");
+ return -1;
+#
[U-Boot] [PATCH V7 0/5] SPL Linux boot
Adds direct Linux boot to SPL. It implements a spl export command to save ATAGS or FDT to NAND flash. The kernel image has to be in place for this! Changes in V5: - Rebased on u-boot-ti - fixed MAKEALL warnings and errors - adapted to general gpio interface Changes in V6: - Change old commit message Changes in V7: - Correct style and format errors based on: - The new SPL layout - OMAP3 new SPL layout (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105260) - CONFIG_MACH_TYPE fix (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/105809) - Prep subcommand patch for arm (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/106725) Related to: - http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102669 Simon Schwarz (5): Add cmd_spl command omap-common: Add NAND SPL linux booting omap-common/spl: Add linux boot to SPL devkit8000/spl: init GPMC for dm9000 in SPL omap-common: fixes BSS overwriting problem arch/arm/cpu/armv7/omap-common/spl.c | 51 +++- arch/arm/cpu/armv7/omap-common/spl_nand.c | 63 ++-- arch/arm/include/asm/omap_common.h|2 + board/timll/devkit8000/devkit8000.c | 33 - common/Makefile |1 + common/cmd_spl.c | 224 + doc/README.commands.spl | 31 include/cmd_spl.h | 30 include/configs/devkit8000.h | 16 ++- 9 files changed, 423 insertions(+), 28 deletions(-) create mode 100644 common/cmd_spl.c create mode 100644 doc/README.commands.spl create mode 100644 include/cmd_spl.h -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] add Timll DevKit3250 board initial support
Hello Albert and Wolfgang, On 25.10.2011 19:27, Vladimir Zapolskiy wrote: > This patchset adds generic NXP LPC32XX SoC support and basic support > for Embest/Timll DevKit3250 board, which powered by this SoC. > > Vladimir Zapolskiy (2): >arm926ejs: add NXP LPC32x0 cpu series support >devkit3250: add Timll DevKit3250 board initial support > > arch/arm/cpu/arm926ejs/lpc32xx/Makefile | 45 +++ > arch/arm/cpu/arm926ejs/lpc32xx/clkpwr.c | 118 ++ > arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 58 + > arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 47 +++ > arch/arm/cpu/arm926ejs/lpc32xx/timer.c| 94 +++ > arch/arm/include/asm/arch-lpc32xx/clk.h | 159 > + > arch/arm/include/asm/arch-lpc32xx/config.h| 59 + > arch/arm/include/asm/arch-lpc32xx/cpu.h | 64 ++ > arch/arm/include/asm/arch-lpc32xx/emc.h | 92 ++ > arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 25 > arch/arm/include/asm/arch-lpc32xx/timer.h | 74 > arch/arm/include/asm/arch-lpc32xx/uart.h | 54 + > arch/arm/include/asm/arch-lpc32xx/wdt.h | 51 > board/timll/devkit3250/Makefile | 50 > board/timll/devkit3250/devkit3250.c | 74 > boards.cfg|3 +- > include/configs/devkit3250.h | 121 +++ > 17 files changed, 1187 insertions(+), 1 deletions(-) > create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/Makefile > create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/clkpwr.c > create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c > create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/devices.c > create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/timer.c > create mode 100644 arch/arm/include/asm/arch-lpc32xx/clk.h > create mode 100644 arch/arm/include/asm/arch-lpc32xx/config.h > create mode 100644 arch/arm/include/asm/arch-lpc32xx/cpu.h > create mode 100644 arch/arm/include/asm/arch-lpc32xx/emc.h > create mode 100644 arch/arm/include/asm/arch-lpc32xx/sys_proto.h > create mode 100644 arch/arm/include/asm/arch-lpc32xx/timer.h > create mode 100644 arch/arm/include/asm/arch-lpc32xx/uart.h > create mode 100644 arch/arm/include/asm/arch-lpc32xx/wdt.h > create mode 100644 board/timll/devkit3250/Makefile > create mode 100644 board/timll/devkit3250/devkit3250.c > create mode 100644 include/configs/devkit3250.h > still there is no comment on this patchset, however I wonder, if I could accomplish any other your request to accelerate inclusion of the changes to u-boot-arm/next. Thank you in advance. -- With best wishes, Vladimir ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] miiphy: Note that miiphy_* API is deprecated
On Oct 31, 2011, at 10:08 AM, Tabi Timur-B04825 wrote: > On Mon, Oct 31, 2011 at 9:46 AM, Andy Fleming wrote: >> We want to move everything to phylib, and we definitely don't want >> new drivers using the miiphy infrastructure. > > How about using gcc's deprecated function feature? Or is that too aggressive? I don't think we want every net driver prior to the last release to create a warning. We may switch to that after we get some momentum on switching drivers over. The first goal is just to provide information that a new driver-writer may see so that the old API doesn't expand. Andy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] part_efi: fix build warning
Hi, On Mon, 31 Oct 2011 08:07:05 -0700 Lei Wen wrote: > part_efi.c: In function 'print_part_efi': > part_efi.c:133: warning: passing argument 3 of 'is_gpt_valid' from > incompatible pointer type > part_efi.c:95: note: expected 'struct gpt_header *' but argument is of > type 'struct gpt_header **' > part_efi.c: In function 'get_partition_info_efi': > part_efi.c:172: warning: passing argument 3 of 'is_gpt_valid' from > incompatible pointer type > part_efi.c:95: note: expected 'struct gpt_header *' but argument is of > type 'struct gpt_header **' > > Signed-off-by: Lei Wen > --- > disk/part_efi.c |4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) A patch for this bug already exists: [1]. Thanks anyway, Anatolij [1] http://patchwork.ozlabs.org/patch/122485/ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 4/4] usb: add USB support for Efika
On 10/31/2011 03:58 PM, Jana Rapava wrote: > > > 2011/10/31 Stefano Babic mailto:sba...@denx.de>> > > > There are some issues with: [PATCH 3/4] EHCI: adjust for mx5 > > If you have already applied it > > Jana, can you answer / fix this point ? > > > I really don't know what happens there. Code file looks aligned, but > when I generate a patch with git-format-patch, aligning is messed up. Wait: this can be due to the different positions of the TAB characters, and to the leading + to mark an added line. It is not a problem. > So > I fix it in git-send-email, Do you mean you change the patch generated by git format-patch ? You should not do it. Take a look at your patch. Some defines are removed, and in the patch you see them as: -#ifdef CONFIG_MX25 -#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6) -#define MX25_USB_CTRL_HSTD_BIT (1<<5) -#define MX25_USB_CTRL_USBTE_BIT(1<<4) -#define MX25_USB_CTRL_OCPOL_OTG_BIT(1<<3) -#endif It seems that even in the original file the defines were not aligned. But this is not true, the disalignment is introduced by the leading "-". However, when we see some lines later, the defines are added again and they seem aligned. +#ifdef CONFIG_MX25 +#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6) +#define MX25_USB_CTRL_HSTD_BIT (1<<5) +#define MX25_USB_CTRL_USBTE_BIT(1<<4) +#define MX25_USB_CTRL_OCPOL_OTG_BIT(1<<3) +#endif But when we apply the patch, they defines are disaligned again. maybe you are worrying too much: let the tools doing their work. You have to check that your changed file is correct (without whitespace instead of tab), and then call git-format-patch. And do not care if the result seems producing disaligned entries, this is not true. There are also other comments by Igor that should be fixed, independently from this alignment problem. Please fix them and resubmit. > but after sending whitespace characters are > messed up again. > I wasn't able to find a way to fix it yet. As I said, you want to fix the result of git-format-patch, but it is correct. Simply do not do it. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] e1000: fix bugs from recent commits
On Oct 29, 2011, at 15:33, Wolfgang Denk wrote: > Commit 114d7fc0 "e1000: Rewrite EEPROM checksum error to give more > information" failed to initialize the checksum variable which should > result in random results. Fix that. > > Commit 2326a94d caused a ton of "unused variable 'x'" warnings. > Fix these. While we are at it, remove some bogus parens. > > Signed-off-by: Wolfgang Denk > Cc: Kyle Moffett Tested-by: Kyle Moffett Thanks for doing this; my apologies for missing these issues in the first place. Cheers, Kyle Moffett ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Enabling cache on ARM
On 10/31/2011 03:36 PM, Fabio Estevam wrote: > Hi Stefano and Albert, > > I would like to enable cache on some i.MX boards (ARM9, ARM11 and Cortex-A8). > > Are there any boards I could use as a reference on how to properly > implement this? > > I thought I should simply do: > > #undef CONFIG_SYS_ICACHE_OFF > #undef CONFIG_SYS_DCACHE_OFF This is not enough, at least for systems where cache is not yet supported. > > ,but still I get a 'WARNING: Caches not enabled' message when I do this. The reason is that enable_caches is missing for i.MX targets. You can try to add enable_caches inside your board file, and implement it calling dcache_enable(). However, i.MX drivers are actually proofed to be faulty when the cache is enabled. At least the FEC driver and the MMC driver must be changed to make them working when cache is on. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] miiphy: Note that miiphy_* API is deprecated
On Mon, Oct 31, 2011 at 9:46 AM, Andy Fleming wrote: > We want to move everything to phylib, and we definitely don't want > new drivers using the miiphy infrastructure. How about using gcc's deprecated function feature? Or is that too aggressive? http://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] part_efi: fix build warning
part_efi.c: In function 'print_part_efi':
part_efi.c:133: warning: passing argument 3 of 'is_gpt_valid' from
incompatible pointer type
part_efi.c:95: note: expected 'struct gpt_header *' but argument is of
type 'struct gpt_header **'
part_efi.c: In function 'get_partition_info_efi':
part_efi.c:172: warning: passing argument 3 of 'is_gpt_valid' from
incompatible pointer type
part_efi.c:95: note: expected 'struct gpt_header *' but argument is of
type 'struct gpt_header **'
Signed-off-by: Lei Wen
---
disk/part_efi.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index e7f2714..ddf80a7 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -130,7 +130,7 @@ void print_part_efi(block_dev_desc_t * dev_desc)
}
/* This function validates AND fills in the GPT header and PTE */
if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
-&(gpt_head), &gpt_pte) != 1) {
+gpt_head, &gpt_pte) != 1) {
printf("%s: *** ERROR: Invalid GPT ***\n", __func__);
return;
}
@@ -169,7 +169,7 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int
part,
/* This function validates AND fills in the GPT header and PTE */
if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
- &(gpt_head), &gpt_pte) != 1) {
+ gpt_head, &gpt_pte) != 1) {
printf("%s: *** ERROR: Invalid GPT ***\n", __func__);
return -1;
}
--
1.7.0.4
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[U-Boot] [PATCH 2/2] armada100: define CONFIG_SYS_CACHELINE_SIZE
By default, on Armada100 SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen --- arch/arm/include/asm/arch-armada100/config.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-armada100/config.h b/arch/arm/include/asm/arch-armada100/config.h index d2094e5..637f313 100644 --- a/arch/arm/include/asm/arch-armada100/config.h +++ b/arch/arm/include/asm/arch-armada100/config.h @@ -33,6 +33,8 @@ #include #define CONFIG_ARM926EJS 1 /* Basic Architecture */ +/* default Dcache Line length for armada100 */ +#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_TCLK(14745600) /* NS16550 clk config */ #define CONFIG_SYS_HZ_CLOCK(325) /* Timer Freq. 3.25MHZ */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] pantheon: define CONFIG_SYS_CACHELINE_SIZE
By default, on Pantheon SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen --- arch/arm/include/asm/arch-pantheon/config.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-pantheon/config.h b/arch/arm/include/asm/arch-pantheon/config.h index d10583d..e4fce7d 100644 --- a/arch/arm/include/asm/arch-pantheon/config.h +++ b/arch/arm/include/asm/arch-pantheon/config.h @@ -28,6 +28,8 @@ #include #define CONFIG_ARM926EJS 1 /* Basic Architecture */ +/* default Dcache Line length for pantheon */ +#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_TCLK(14745600) /* NS16550 clk config */ #define CONFIG_SYS_HZ_CLOCK(325) /* Timer Freq. 3.25MHZ */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] fix build error for pantheon and armada100
For the CONFIG_SYS_CACHELINE_SIZE is required to be defined defaultly. Add it to pantheon and armada100 accordingly. Lei Wen (2): pantheon: define CONFIG_SYS_CACHELINE_SIZE armada100: define CONFIG_SYS_CACHELINE_SIZE arch/arm/include/asm/arch-armada100/config.h |2 ++ arch/arm/include/asm/arch-pantheon/config.h |2 ++ 2 files changed, 4 insertions(+), 0 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 4/4] usb: add USB support for Efika
2011/10/31 Stefano Babic > > There are some issues with: [PATCH 3/4] EHCI: adjust for mx5 > > If you have already applied it > > Jana, can you answer / fix this point ? > > I really don't know what happens there. Code file looks aligned, but when I generate a patch with git-format-patch, aligning is messed up. So I fix it in git-send-email, but after sending whitespace characters are messed up again. I wasn't able to find a way to fix it yet. Regards, Jana Rapava ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 0/4] add mmc support for pantheon platform
Hi Albert, On Tue, Oct 25, 2011 at 2:25 PM, Albert ARIBAUD wrote: > Le 25/10/2011 08:15, Albert ARIBAUD a écrit : >> >> Hi Lei Wen, >> >> Le 25/10/2011 03:21, Lei Wen a écrit : >>> >>> Hi Albert, >>> >>> On Tue, Oct 25, 2011 at 1:20 AM, Albert ARIBAUD >>> wrote: Hi Lei Wen, Le 04/10/2011 08:33, Lei Wen a écrit : > > This patch seris add the mmc support for the pantheon platform. > Also give platform like dkb and aspenite a workaround when enabling > the 8bit mode for accessing the mmc. > > Changelog: > V2: remove magic number, and replace it by macro definition and > structure > respectively. > remove enable mmc function into seperated patch > > Lei Wen (4): > ARM: pantheon: add mmc definition > Marvell: dkb: add mmc support > dkb: make mmc command as default enabled > mmc: mv_sdhci: fix 8bus width access for 88SV331xV5 This causes a lot of build errors on dkb with ELDK42: Configuring for dkb board... In file included from mv_sdhci.c:3: /home/uboot/src/u-boot-arm/include/sdhci.h:224: warning: 'struct sdhci_host' declared inside parameter list /home/uboot/src/u-boot-arm/include/sdhci.h:224: warning: its scope is only this definition or declaration, which is probably not what you want /home/uboot/src/u-boot-arm/include/sdhci.h:225: warning: 'struct sdhci_host' declared inside parameter list /home/uboot/src/u-boot-arm/include/sdhci.h:226: warning: 'struct sdhci_host' declared inside parameter list /home/uboot/src/u-boot-arm/include/sdhci.h:227: warning: 'struct sdhci_host' declared inside parameter list /home/uboot/src/u-boot-arm/include/sdhci.h:228: warning: 'struct sdhci_host' declared inside parameter list /home/uboot/src/u-boot-arm/include/sdhci.h:229: warning: 'struct sdhci_host' declared inside parameter list /home/uboot/src/u-boot-arm/include/sdhci.h: In function 'sdhci_writel': /home/uboot/src/u-boot-arm/include/sdhci.h:247: warning: passing argument 1 of 'host->ops->write_l' from incompatible pointer type /home/uboot/src/u-boot-arm/include/sdhci.h: In function 'sdhci_writew': /home/uboot/src/u-boot-arm/include/sdhci.h:255: warning: passing argument 1 of 'host->ops->write_w' from incompatible pointer type /home/uboot/src/u-boot-arm/include/sdhci.h: In function 'sdhci_writeb': /home/uboot/src/u-boot-arm/include/sdhci.h:263: warning: passing argument 1 of 'host->ops->write_b' from incompatible pointer type /home/uboot/src/u-boot-arm/include/sdhci.h: In function 'sdhci_readl': /home/uboot/src/u-boot-arm/include/sdhci.h:271: warning: passing argument 1 of 'host->ops->read_l' from incompatible pointer type /home/uboot/src/u-boot-arm/include/sdhci.h: In function 'sdhci_readw': /home/uboot/src/u-boot-arm/include/sdhci.h:279: warning: passing argument 1 of 'host->ops->read_w' from incompatible pointer type /home/uboot/src/u-boot-arm/include/sdhci.h: In function 'sdhci_readb': /home/uboot/src/u-boot-arm/include/sdhci.h:287: warning: passing argument 1 of 'host->ops->read_b' from incompatible pointer type mv_sdhci.c: In function 'mv_sdhci_writeb': mv_sdhci.c:14: error: 'struct sdhci_host' has no member named 'mmc' mv_sdhci.c:17: warning: implicit declaration of function 'IS_SD' mv_sdhci.c:18: error: dereferencing pointer to incomplete type mv_sdhci.c: In function 'mv_sdh_init': mv_sdhci.c:48: warning: assignment from incompatible pointer type >>> >>> Actually, I have post another fixing series before this, so if it got >>> be applied before this merged, >>> the warning would be disappeared. >>> >>> You could refer to: >>> http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/111621 >> >> Thanks for the pointer -- please next time indicate the dependency on >> any patch set not yet applied at the time. > > I've tried applying the patches in the link you refer to, then the patch > series given here, but the latter does not apply properly above the former > on top of u-boot-arm/master. Can you check this? > >>> Best regards, >>> Lei > > I try to rebase the V4 of sdhci fixing patch over latest u-boot-arm.git, and find there is no problem... Could you help check again? Thanks, Lei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] miiphy: Note that miiphy_* API is deprecated
We want to move everything to phylib, and we definitely don't want new drivers using the miiphy infrastructure. Signed-off-by: Andy Fleming --- common/miiphyutil.c | 10 ++ doc/feature-removal-schedule.txt | 11 +++ 2 files changed, 21 insertions(+), 0 deletions(-) diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 35ad357..2cc23b4 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -102,6 +102,7 @@ static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad, /* * * Register read and write MII access routines for the device . + * This API is now deprecated. Please use mdio_alloc and mdio_register, instead. */ void miiphy_register(const char *name, int (*read)(const char *devname, unsigned char addr, @@ -281,6 +282,8 @@ static struct mii_dev *miiphy_get_active_dev(const char *devname) * Read to variable from the PHY attached to device , * use PHY address and register . * + * This API is deprecated. Use phy_read on a phy_device found via phy_connect + * * Returns: * 0 on success */ @@ -307,6 +310,8 @@ int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, * Write to the PHY attached to device , * use PHY address and register . * + * This API is deprecated. Use phy_write on a phy_device found by phy_connect + * * Returns: * 0 on success */ @@ -350,6 +355,8 @@ void miiphy_listdev(void) * Model:6 bits (unsigned char) * Revision: 4 bits (unsigned char) * + * This API is deprecated. + * * Returns: * 0 on success */ @@ -389,6 +396,9 @@ int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, /* * * Reset the PHY. + * + * This API is deprecated. Use PHYLIB. + * * Returns: * 0 on success */ diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt index 00d87e4..e04ba2d 100644 --- a/doc/feature-removal-schedule.txt +++ b/doc/feature-removal-schedule.txt @@ -7,6 +7,17 @@ file. --- +What: Users of the legacy miiphy_* code +When: undetermined + +Why: We now have a PHY library, which allows everyone to share PHY + drivers. All new drivers should use this infrastructure, and + all old drivers should get converted to use it. + +Who: Andy Fleming and driver maintainers + +--- + What: boards with xxx_config targets in top level Makefile When: Release v2012.03 -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7] omap/spl: actually enable the console
On Mon, Oct 31, 2011 at 5:39 AM, Ilya Yanok wrote: > Hi Tom, > >>> Currently OMAP SPL code does all the initialization but does not set the >>> gd->have_console value so no output is actually performed. This patch >>> sets gd->have_console to 1 if CONFIG_SPL_CONSOLE is defined. >>> >>> Signed-off-by: Ilya Yanok >> >> So, this is because of a behavior change. Do we want an SPL_CONSOLE >> variable? >> Or should we just bring back the previous behavior? I kind of think >> the previous >> behavior... Others? > > So what will be your decision? Should I remove SPL_CONSOLE and repost > the patch? Or should I drop it completely? I would say just drop the #ifdef part. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
