From: "Paul Gilmartin"
Sent: Tuesday, 28 August 2012 12:48 PM
On 2012-08-27 19:36, Robin Vowels wrote:
or, if worried about preserving R15
LR0,15
SLL 0,30
LTR 0,0
BNZ ...
Doesn't SLL set the condition code?
No.
But SLA does.
On 2012-08-27 12:31, Bill Fairchild wrote:
>
> LA R0,3
> NR R1,R15
> BNZ BAD_RC
>
> And in 3 or 4 years, IBM will have implemented all of this logic in a single
> instruction with an opcode something like this: LANRBNZ. And the processors
> will have over 4K different opcodes by then.
>
The
On 2012-08-27 19:36, Robin Vowels wrote:
>
> or, if worried about preserving R15
>LR0,15
>SLL 0,30
>LTR 0,0
>BNZ ...
Doesn't SLL set the condition code?
-- gil
On 2012-08-27 11:26, John Ehrman wrote:
>
> There's no need for a based branch: just write
>
> JH INVALID_RC (as before)
> LARL 0,START
> AR 15,0
> BR 15
> START JRC0
> JRC4
> JRC8
>
Assuming the content of R15 (and R0) is expend
From: "McKown, John"
Sent: Tuesday, 28 August 2012 1:34 AM
Destroys the contents of R15, so I guess I would load R15 into, say, R0 and do
the OR operation on R0. However, I'm on
a z9 and will likely never be on anything more advanced. So I'll need to load
the mask into another register, say
How about no registers?
TM X+3,3
BNZ ...
- Original Message -
From: "Tony Thigpen"
Sent: Tuesday, 28 August 2012 3:19 AM
Your code requires 2 scratch registers. The following uses just 1
scratch register and does not require literal storage:
LA R0,3
NR R0,R15
LTR R0,R0
BNZ
From: "John Gilmore"
Sent: Tuesday, 28 August 2012 1:19 AM
Register contents that are a multiple of 4 are all of the form
x...xx00
Inclusive ORing such a value with the mask
1...1100
and testing the result for equality with this same mask then yields a
simple, low-overhead test for
Not sure that arch level that instruction is at. We are going to stay on the
z9BC we have until it is eliminated from our environment.
--
John McKown
Systems Engineer IV
IT
Administrative Services Group
HealthMarkets(r)
9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone *
jo
On Mon, 27 Aug 2012 14:13:12 -0500 "McKown, John"
wrote:
:>Very nice! I'll just eliminate the LTR as other posts have shown and use the
AR R15,0 / BR R14 that Mr. Ehrman showed as well. I first came up with my
"solution" when I was a wee, young sysprog and have never bothered to change.
"If i
Very nice! I'll just eliminate the LTR as other posts have shown and use the AR
R15,0 / BR R14 that Mr. Ehrman showed as well. I first came up with my
"solution" when I was a wee, young sysprog and have never bothered to change.
"If it ain't broke, don't fix it."
CALL ...
LTR R15,R15
On 8/27/2012 1:19 PM, Tony Thigpen wrote:
Your code requires 2 scratch registers. The following uses just 1
scratch register and does not require literal storage:
LA R0,3
NR R0,R15
LTR R0,R0
BNZ BAD_RC
Why do you need the LTR? NR sets the condition code.
When I bother to add check
The PrOfOps says that the condition code is set to zero if the result of any of
the AND instructions is zero and to 1 if the result is non-zero, so your LTR is
unnecessary.
LA R0,3
NR R1,R15
BNZ BAD_RC
And in 3 or 4 years, IBM will have implemented all of this logic in a single
instruction
I also use the CL to catch negatives. One of those tricks I got from
this list.
Why the LTR? I don't know. I guess the reason is that I don't hardly
ever use an 'and' so I failed to notice that NR set the correct
condition code when I wrote this many years ago.
Tony Thigpen
-Original Messa
TMLL is better because more compact, assuming that John McKown---We're
in a thicket of Johns---wants to use such an instruction.
--jg
On 8/27/12, John Ehrman wrote:
> John McKown wrote:
>
>>As an example of (1), I quite often do:
>
>>CALL PROGRAM,(PARM1,PARM2),VL
>>CHI R15,=Y(MA
John McKown wrote:
>As an example of (1), I quite often do:
>CALL PROGRAM,(PARM1,PARM2),VL
>CHI R15,=Y(MAXENTRIES)
>JH INVALID_RC
>B*+4(R15)
>START JRC0
>JRC4
>JRC8
>MAXENTRIES EQU *-START/4
There's no need for a based branch:
Your code requires 2 scratch registers. The following uses just 1
scratch register and does not require literal storage:
LA R0,3
NR R0,R15
LTR R0,R0
BNZ BAD_RC
(I still have to use code that works on boxes without the jump
instructions.)
Tony Thigpen
-Original Message -
From:
I have started using the MACHINE option to make sure that I don't accidently
get "carried away" when reading the current PoPS.
--
John McKown
Systems Engineer IV
IT
Administrative Services Group
HealthMarkets(r)
9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone *
john.mck..
What you're doing is fine on any machine.
Your question does, however, suggest that something akin to the
MACHINE option should be available as a system variable, say
&SYSM_MACHINE, that could be interrogated within a macro to produce
different code for different target machines.
--jg
On 8/27/1
Destroys the contents of R15, so I guess I would load R15 into, say, R0 and do
the OR operation on R0. However, I'm on a z9 and will likely never be on
anything more advanced. So I'll need to load the mask into another register,
say R1. That would either require an L R1,variable or literal (=X'F
Register contents that are a multiple of 4 are all of the form
x...xx00
Inclusive ORing such a value with the mask
1...1100
and testing the result for equality with this same mask then yields a
simple, low-overhead test for a multiple-of-four value.
--jg
On 8/27/12, McKown, John wrot
Thanks for the technique. I'm not sure that I like the NILL instruction at this
point. It could change an "invalid" (as in "not planned for") RC into a "valid"
RC. Looks like maybe I could use TMLL to just test. (TMLL R15,X'000C')
--
John McKown
Systems Engineer IV
IT
Administrative Services Gr
John,
>> you still need base+displacement desire for an index register;
They come in most cases when there is space in the nibbles for it. But
for the case you cited there is no need to cover code in
"procedure division" with a base. (Dynamic storage and literalpool
do have a base!) -Here is
That using z/OS on Hercules is not PC (Politically Correct).
--
John McKown
Systems Engineer IV
IT
Administrative Services Group
HealthMarkets(r)
9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone *
john.mck...@healthmarkets.com * www.HealthMarkets.com
Confidentiality Notice
I agree. Of course, you still need base+displacement in two cases that I can
think of: (1) desire for an index register; and (2) to access dynamic storage
(STORAGE OBTAIN or LOADed module).
As an example of (1), I quite often do:
CALL PROGRAM,(PARM1,PARM2),VL
CHI R15,=Y(MAXENTRIE
And for even more fun, you could execute a PC (program call) from a PC
(private code) section using z390 portable mainframe assembler and emulator
running on your favorite PC (personal computer) of choice including Windows,
Linux, or Apple OSX running J2SE.
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