Is there a site where we can vote for this? It's been a major pain in my
life, especially after using EJES and SYSVIEW.
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Robert Ngan
Sent: 25 November 2015 01:19
To: ASSEMBLER
I do something similar; if the option is RENT, I define an RSECT, else
CSECT.
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Swarbrick, Frank
Sent: Monday, February 15, 2016 19:17
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subje
RSECT does have the same effect as the RENT assembler option, in that you
get warnings for non-rent code.
I use one assembly JCL (in fact, an ISPF macro generates the JCL), and this
way I can let the code decide whether it should be RENT or not.
Pieter
-Original Message-
From: IBM Mainfr
I would use "LOCE R8,0(R8)" instead of " LOC R8,0(R8),8"
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of mar...@pi-sysprog.de
Sent: 13 May 2016 09:25
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Structured Programmin
Or, LGFI R1,TEST_LEN
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Kharitonov, Evgeny
Sent: 30 May 2016 18:34
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: EQUATE symbol
Hello,
The following worked for me:
LR1,=A
1. I would suggest your LG G1,50(,G1) should rather be AGHI G1,50
2. LLGTR loads 31 bits, therefore the high-order word is zeroed. Remove it.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of esst...@juno.com
Sent: 28 August 2016 23
A good start for baseless is to include the following 2 statements at the top:
IEABRCX DEFINE
IEABRCX ENABLE
The would change most branch instructions to relative branches.
Also, use SYSSTATE ARCHLEVEL=n -- check your manual for the correct value.
Pieter
-Original Message-
From: IBM Mai
For IBM macros that do SIIS, use the MF=E/L or SF=E/L variants.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Philippe Cloarec
Sent: 14 November 2016 07:06
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: SIIS "issue" after up
On 06/03/2017 13:39, Thomas David Rivers wrote:
Paul Gilmartin <0014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote:
On 2017-03-05, at 14:40, Martin Truebner wrote:
... to have heard from either of the two commerical vendors of
HLASM compatible cross-assemblers.
Now I have seen one. What is
You don't need to clear R6 before doing DSGR. That's the whole point of the
SINGLE
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Ward, Mike S
Sent: 20 April 2017 21:21
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: C
There's also ASMDREG. Not sure it it's in SYS1.MACLIB or the HLASM toolkit
maclib
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Charles Mills
Sent: 21 April 2017 01:22
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: CONVTOD Hel
Interesting side effect:
A previous employer's programmers used to force a dump by adding 1 to a
character field (redefined as packed).
Comes Cobol 5, and no more S0C7 abends, and MANY transactions that did half
their updates, and did NOT get rolled back.
They nagged IBM into providing a fix (maybe
Notably, Software AG's "Com-plete" did this. With a text error message
following the abend point.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Ze'ev Atlas
Sent: 11 May 2017 19:24
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: R
Agreed
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Farley, Peter x23353
Sent: 11 May 2017 20:23
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Performance of Decimal Floating Point Instruction
PMFJI, but really, even for n
I wrote my own trace after seeing TRACE390, and not liking the way it did
things. My code is re-entrant, up to date with most new instructions, caters
for 64-bit, etc.
Was originally published in the MVS Update in the 90's, but much modified since
then.
Obviously, with the release of the HLASM
Has anybody tried to make the HLASM toolkit's SPM's work with compare and jump
/ compare and branch instructions?
e.g.
DO INF
JAS R14,some_function
DOEXIT CIJNE,R15,0
:
:
ENDDO
And another idea: have an ITERATE_IF similar to DOEXIT. I.e. if test condition
is true, jump to iteration poi
-LIST@LISTSERV.UGA.EDU
Subject: Re: Structured programminng macros
Hi Pieter,
What happens if you assemble with IEABRCX DEFINE & IEABRCX ENABLE rather than
trying to re-write the branches yourself?
Regards, Dougie
On 14 May 2017 at 21:17, Pieter Wiid wrote:
> Has anybody tried to mak
On 15/05/2017 09:14, Rob van der Heij wrote:
On 15 May 2017 at 08:41, Pieter Wiid wrote:
With the IF structure, given the normal ratio of comment to "real" data,
you will have a very high percentage of pipeline flush due to incorrect
branch prediction.
Why would prediction of a b
On 15/05/2017 10:34, Rob van der Heij wrote:
On 15 May 2017 at 10:09, Pieter Wiid wrote:
Think about my example where you could have cards with or without an "*"
in col 1.
First card - "*", so the "IF" branch is not taken, followed by
unconditional branch.
ne
On 15/05/2017 13:42, Robin Vowels wrote:
From: "Pieter Wiid"
Sent: Monday, May 15, 2017 6:36 PM
Branch to iterate is what I would LIKE.
You could try a BCT, or BXLE etc instruction.
There is not such structure as the moment. If nobody else wants to
play with it, I will try to
That's what the book says -- except for unconditional branches, BCT and BXLE
(and the relative and G variants) which predicts a branch.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Tony Thigpen
Sent: 16 May 2017 14:44
To: ASSE
Look at ASMDREG in the HLASM toolkit. I can't remember offhand.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of John McKown
Sent: 20 July 2017 20:52
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: superior IBM supplied "register equ
Correction:
DOWHILE,TROT,R14,R2,B'0001',1
ENDDO
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Steve Smith
Sent: 11 October 2017 23:19
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Rehabilitated TROT Routine (Was: Detect
The WHILE works; I always use it. The reason is that the instruction is part of
the WHILE. Therefore, it executes the instruction, then tests the cc.
Another example: DO WHILE=(CHI,R9,LT,10). Again, it branches to the ENDDO, then
EXCUTES the CHI, followed by a JE.
-Original Message-
From
difying Code)
On 12 October 2017 at 08:03, Pieter Wiid wrote:
> Correction:
>
> DOWHILE,TROT,R14,R2,B'0001',1
> ENDDO
>
>
Constructs where evaluation of the condition has a side effect (or completely
relies on the side effect) are often more a convenience to the writer
Having thought some more:
DO WHILE=(TROT,R14,R2,1,NZ)
IF 4
ENDIF
ENDDO
-Original Message-
From: Pieter Wiid [mailto:pw...@mweb.co.za]
Sent: 12 October 2017 15:02
To: 'IBM Mainframe Assembler List'
Subject: RE: Rehabilitated TROT Routine (Was: Detection of Compile-
If you have a x'21' in the edit pattern, you may as well use ED instead of EDMK.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Sokolsky, Hayim Z.
Sent: 01 November 2017 21:29
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: edm
On 02/11/2017 14:55, Steve Smith wrote:
Prove it.
On Thu, Nov 2, 2017 at 8:44 AM, Gray Gregory wrote:
True and this way is simpler to bad there isn't a fill character for padding
with zeros
from Greg Gray
gregory.g...@irs.gov
2406131660
I can prove that it DOES work for fill char x'F0':
r general info about EDMK with examples:
http://csc.columbusstate.edu/woolbright/Instructions/EDMK.pdf
On Wed, Nov 1, 2017 at 4:24 PM, Steve Smith wrote:
Maybe for you, but not in general.
On Wed, Nov 1, 2017 at 4:05 PM, Pieter Wiid wrote:
> If you have a x'21' in the edit patter
On 11/12/2017 16:27, Robin Vowels wrote:
From: "John McKown"
Sent: Tuesday, December 12, 2017 12:53 AM
I know that in the past, they were handy for when you dropped your
deck of
physical cards. And if guess that they can still be handy if you
distribute
source modifications in a format suita
Hierarchical databases (IMS) was released in 1968. I suspect IDMS (network DB)
was not far behind.
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Bernd Oppolzer
Sent: 28 January 2018 23:47
To: ASSEMBLER-LIST@LISTSERV.UG
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Paul Gilmartin
BTW, those "'Pascal' strings" were not in Wirth's specification of Pascal;
they came later with, e.g. UCSD.
Too true -- Wirth's Pascal was useless for any real work.
Not quite -- TR always wants a 256-byte table, so the standard TR xx,HEX-C'0'
only works if there are 240 byte before your hex table.
Pieter.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Tom Marchant
Sent: 05 April 2018 13:3
Will only work in AMODE 24.
IPM is better
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of robi...@dodo.com.au
Sent: 05 May 2018 13:31
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: storing and restoring condition code
BALR wit
I have seen IBM DSECTS that map variable-length records, and the start of the
variable part states "EQU *"
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Steve Smith
Sent: 01 August 2018 18:34
To: ASSEMBLER-LIST@LISTSER
About all I can think of, is to run a batch ISPF, with an EXEC using
(among others) LMMSTATS.
I suspect that's what 3.4 does in the background, anyway.
Pieter
On 14/09/2018 17:38, David Cole wrote:
I would like to generate ISPF statistics for members of a PDS whose
members I am creating outs
BALR only inserts the cc in 24-bit mode.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Robin Vowels
Sent: 07 December 2018 01:08
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Getting the Last Condition code
BALR
On 7/12/20
As far as I know, the HLASM Toolkit macros are based on Concept 14. We used
Concept 14 in the 80's, and I even developed extensions to it.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Doug Wegscheid
Sent: 04 June 2020 23:17
Do you mean conversion to printable hex, e.g. convert x'1234' to
x'f1f2f3f4'? These days, I use the TROT instruction.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Seymour J Metz
Sent: 07 June 2020 19:21
To: ASSEMBLER-LIST@LIST
Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on
behalf of Pieter Wiid [pw...@mweb.co.za]
Sent: Sunday, June 7, 2020 1:39 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Does the z architecture have something like the SIMD
instructions
Do you mean conversion to printable hex, e.g.
have something like the SIMD
instructions
I might believe hex to binary, with the 16 symbols in an 8 bit encoding.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on
behal
Thanks, Tom.
By the time I started working in mainframes in 1981, PSATOLD was already
there.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Tom Harper
Sent: 02 September 2020 16:12
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re
MVCOS? Also needs to be re-driven after 4K
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Steve Smith
Sent: 20 October 2020 22:59
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Conditional MVCL macro?
There's actually a big d
Or
CIJE R15,0,RC0ROUTINE
...etc
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Watkins, Doug
Sent: Tuesday, 23 November 2021 20:00
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Base-less macros
Mark,
Another vote for not us
Actually, if the target field is always 16 bytes, you can do
ZAP_IT ZAP PWORK16(16),0(0,r1)
That eliminates the need for the first LHI
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Dave Clark
Sent: Saturday, 12 February 2022 00
I you only need to find the decimal point, look at SRST, or use Ed Jaffee's
vector code
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Dave Clark
Sent: Wednesday, 16 February 2022 17:13
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject
If my CSECT is more than 4K, I point R12 at the constants and R13 at the
working storage, no code base at all. Conversion from non-rent to rent is
simply a matter of doing GETMAIN and relocating the entire working storage (and
fixing pointers like DCBE address in DCB)
-Original Message
I run 60x160 (3279 emulation) -- and on a 14-inch laptop. No problems
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Farley, Peter
Sent: Friday, 18 November 2022 19:27
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: ASMA500 mess
If you have SDSF or (e)jes, try the ISFCALLS interface.
On May 9, 2023 8:18:53 PM GMT+02:00, "Farley, Peter"
<0dc9d8785c29-dmarc-requ...@listserv.uga.edu> wrote:
>From the Rexx Language Reference:
>
>"To use the CONSOLE environment, you must have CONSOLE command authority."
>
>I do not have
If a work area is shared among exits, I would expect one of those exits to
getmain the area and store the address.
Consider this:
LT Rx,IFAEXITP
JNZ ALLOCATED
STORAGE OBTAIN.
ALLOCATED DC 0H
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMB
ght be inappropriate if another mechanism is documented.
Kind regards,
Abe Kornelis.
===
Op 08/07/2023 om 12:17 schreef Pieter Wiid:
> If a work area is shared among exits, I would expect one of those exits to
> getmain the area and store the address.
>
> Consider this:
&g
I have a PAD macro that takes the alignment as a parameter.
It generates nC'P', where "n" is calculated to align on your selected boundary
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Paul Gilmartin
Sent: Tuesday, 21 November
ASCBJBNI will point to the name of a batch job. If it is zero, then ASCBJBNS
points to the name of the STC/TSU
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Scott Ford
Sent: 18 February 2014 18:35
To: ASSEMBLER-LIST@LIST
It's now been replaced by similar products from IBM, CA and BMC.
I normally use IBM's High Performance Unload, HP Pointer Checker and the DB
Repair Facility.
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Christian Birr
% of a CP.
Pieter Wiid
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of John Walker
Sent: 28 March 2014 16:07
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: ASSEMBLER-LIST Digest - 26 Mar 2014 to 27 Mar 2014 (#2014-57)
Wow
Or, if unsigned, use LLC
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of John McKown
Sent: 03 June 2014 15:12
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Out of Order and Superscalar - small experiment
On Tue, Jun 3, 2014 a
Without your code, it's difficult to say. However, going on the Wikipedia
info, the obvious check is ASCII vs EBCDIC.
I suggest you add a convert-to-ascii to the code & compare results then.
Pieter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.
I got an unexpected response from IMS sysgen macro IMSCTRL. Below is test case
to prove the situation:
MACRO
T1&SYS=
&L SETA N'&SYS
&K SETA N'&SYS(2)
Use macro IEABRCX instead of the COPY
On February 26, 2024 4:32:31 PM GMT+02:00, Seymour J Metz
wrote:
>To clarify, I would like for COPY IEABRC to appear in the listing, but not any
>of the statements that IEABRC contains.
>
>--
>Shmuel (Seymour J.) Metz
>http://mason.gmu.edu/~smetz3
>עַם יִשְ
John Ehrman had an MVC2 macro using this concept. Uses the length of OP2
On February 26, 2024 3:44:17 PM GMT+02:00, Seymour J Metz
wrote:
>Why? What are you trying to solve by wrappng the MVC in a macro?
>
> MVC 0(2),0
> ORG *-4
> DCS(&OP1)
> DCS(&OP2)
NOP translates to BC 0
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Paul Gilmartin
Sent: Wednesday, 01 May 2024 16:21
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: IEABRC anomaly
On 5/1/24 07:56:17, Seymour J Metz wrote:
>
Format is IF CIJ,R1,EQ,00
Or IF CLIJ,R1,EQ,0
X'F00'won't work; the operand is 1 byte
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Seymour J Metz
Sent: Wednesday, 29 May 2024 16:01
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Su
Found a bug in this implementation:
1676 DO ,
00160102
00441684+#@LB2 DC
0H 02-ASMMDOPR
1686
@LISTSERV.UGA.EDU
Subject: Re: Toolkit support for compare and jump?
Pieter Wiid writes:
> Found a bug in this implementation:
> ... 1686 DOEXIT CIJ,R15,NE,0
> ... 1696+ CIJ R15,0
> ** ASMA175S Delimiter error, expected comma -
This example appears to be simply due to using an
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