I am not sure what is the best way to handle multi-page schematics with
gschem.
I have schematic on one page where I have connected the power to VCC
and GND symbols. I have connected the non power inputs and outputs to
Input/Output Generic symbols.
So imagine I want to just hook
Indeed, we can assign different attributes to "lines" in gschem 1.6.1,
when the lines connect at a 90 degree angle (for 180/360 degree angle
gschem tries to be smart and joins the lines to one).
So no modification of gschem is necessary for first evaluation of the
concept. We only have to extend g
Stefan Salewski wrote:
I have to do next layout again myself. But
that layout will be more complicated, it will contain fast differential
signal pairs and BGA footprints. Should be more than 500 hours for me. I
think attributes can support my work, so I will need only 350 hours.
Maybe much less
Stefan Salewski wrote:
> But what people regard as important is very different. Here in Germany
> most people related to electronics seems to give visible appearance a
> very high priority.
On the other hand, the ugly duckling who calls itself "eagle" enjoys
quite some user base in Germany. Bart
Ouabache Designworks wrote:
> Asic synthesis has a step called "uniquification" where you create a module
> and
> instantiate it multiple times. Uniquify will create a new module for each
> instance
> that can be modified independently from the others. You can also modify the
> master to chang
On Mon, 2010-08-16 at 15:27 -0400, Rick Collins wrote:
> I looked at your DSO project. That is pretty impressive. Are you
> looking for any help? That is right up my alley!
>
> Rick
>
Indeed I was hoping for some support during the last two years, but
there was not much interest, some people
Using blocks in mechanical CAD has some issues with this. In
principle
there are 2 ways to use a block:
a) copy and paste
b) reference
Naturally the "edit one modify all" can only work with referencing.
Sometimes in a single construction this is not desired,
I looked at your DSO project. That is pretty impressive. Are you
looking for any help? That is right up my alley!
Rick
At 02:56 PM 8/16/2010, you wrote:
On Mon, 2010-08-16 at 13:55 -0400, Rick Collins wrote:
>
> I guess I am not thinking that there is a problem with
> implementation. My
On Mon, 2010-08-16 at 13:55 -0400, Rick Collins wrote:
>
> I guess I am not thinking that there is a problem with
> implementation. My concern is value. How are these ideas to be used
> by... well, the users? After all, this is the geda-user list,
> no? If getting the work done is the hard
On Mon, Aug 16, 2010 at 07:32:23PM +0200, Stephan Boettcher wrote:
> I usually have hierarchical schematics with multiple instances of the
> same subcircuits referenced from the main page. The deepest until now
> were three layers of hierarchy.
I make do with two, but that's how I work also.
> A
Bert Timmerman wrote:
The right hand rule says: if you spread your first 3 fingers
(starting with thumb) orthogonal to each other, thumb = X,
point = Y, middle = Z ( or if you hook your fingers to
indicate a rotation that will move X into Y, spreaded thumb
poins to Z+). This is the basis for
- Stefan Salewski wrote:
> On Mon, 2010-08-16 at 18:54 +0200, Armin Faltl wrote:
>
> This is true -- but the point is not "100% clear definitions" but
> "skills and time and will" to work and code.
>
> Andrew Poelstra has shown at least some of the last mentioned. My fear
> was, that he mov
Stephan Boettcher wrote:
Stefan Salewski writes:
On Mon, 2010-08-16 at 10:09 +0200, Stephan Boettcher wrote:
John Griessen writes:
If there is work put into partitioning a layout, can't we please have
hierarchical layout instead?
I have still problems to understand the go
At 12:57 PM 8/16/2010, you wrote:
On Mon, 2010-08-16 at 12:00 -0400, Rick Collins wrote:
> >
> >I think we should try to find a better name for the connection between
> >two nodes in a net, maybe segment?
>
> In the layout program I use, a segment is a single section of a PWB
> route between two
Hi,
> -Original Message-
> From: geda-user-boun...@moria.seul.org
> [mailto:geda-user-boun...@moria.seul.org] On Behalf Of Armin Faltl
> Sent: Monday, August 16, 2010 1:04 PM
> To: gEDA user mailing list
> Subject: Re: gEDA-user: Specification of Rotations for Auto Assembly
>
>
>
> Ri
Stefan Salewski writes:
> On Mon, 2010-08-16 at 10:09 +0200, Stephan Boettcher wrote:
>> John Griessen writes:
>>
>> If there is work put into partitioning a layout, can't we please have
>> hierarchical layout instead?
>>
> I have still problems to understand the goals and benefits of
> partit
On Mon, 2010-08-16 at 18:54 +0200, Armin Faltl wrote:
> >
> JG, in my opinion Rick has a point, that without 100% clear definitions from
> and for all of those talking here using "subnet", the whole discussion
> has a high
> chance of getting nowhere
This is true -- but the point is not "100% cl
Ok, if that is the way this group works. I have been told that these
tools can be useful and I assumed that would be the goal of
development. I see lot of comments going in all directions with no
clear indication of how any of it would be used. But I'm just a
practical sort of guy. If you g
Andrew Poelstra wrote:
I like this. Since many features on a PCB are traces, which are long
and thin, I wonder if we could achieve an even-greater speedup by
using "bounding ellipses" rather than circles. With rounded-up sine
tables I think we can do the check nearly as fast as we could with
s
On Mon, 2010-08-16 at 12:00 -0400, Rick Collins wrote:
> >
> >I think we should try to find a better name for the connection between
> >two nodes in a net, maybe segment?
>
> In the layout program I use, a segment is a single section of a PWB
> route between two points. That is, it is the short
DJ Delorie wrote:
I also like the GIMP's way of doing things
Gimp is good by me.
I also like the UI of inkscape.
From this:
http://wiki.inkscape.org/wiki/index.php/Class_Inkscape::UI::Widget::ProgressPannel
it looks like c++ code and not sure what toolkit.
If you have an easy way to install
- John Griessen wrote:
> Andrew Poelstra wrote:
>
> > When you click the "new" button beside the view tabs, you'll get a popup
> > asking if you want to create a:
> > o New functional block
> > o New component (footprint)
> > o Custom view
>
> So are you thinking of reusing the lay
John Griessen wrote:
Rick Collins wrote:
Why not start with what you
are trying to do in the layout, consider what the layout tool needs
to make that happen, then trace that back to what is needed in the
schematic to support the layout?
There are lots of different users of these programs,
I also like the GIMP's way of doing things - big button is
select/activate, side buttons for visibility/lock/whatever.
To save space, perhaps the "big" buttons could be only partially
shown, as if they were hidden behind the PCB? When you hover over
them, they'd move to the front so you can see
> is that all deliberately not included in the gui or would you accept
> patches? is there any written masterplan for (gui) enhancements? is
> there interest to debate reorganizing the current menu system +
> (re)assigning shortcuts at large?
None of PCB's shortcomings are deliberate; we just don
- John Griessen wrote:
> Andrew Poelstra wrote:
>
> > Really? I had been recompiling every time I changed that file :-}.
>
> Yes, it works without recompiling. A restart may be needed. PCB still
> has not got much interprocess communication going on... some with dbus
> maybe...
>
> Are y
> > lib-contents-command = /bin/true
>
> What is this command supposed to do?
The default is the command to provide the M4 library contents.
Without the contents list, there is no M4 library.
___
geda-user mailing list
geda-user@moria.seul.org
http:/
> You're not going to show up and get your way in a FOSS development
> community unless your suggestion is obvious and brilliant at the
> same time.
or if you're willing to do the work yourself, of course :-)
___
geda-user mailing list
geda-user@moria
Andrew Poelstra wrote:
Really? I had been recompiling every time I changed that file :-}.
Yes, it works without recompiling. A restart may be needed. PCB still
has not got much interprocess communication going on... some with dbus
maybe...
Are you going to put your code up on a git reposito
Andrew Poelstra wrote:
When you click the "new" button beside the view tabs, you'll get a popup
asking if you want to create a:
o New functional block
o New component (footprint)
o Custom view
So are you thinking of reusing the layout editor to edit the footprint view?
Then we could c
Rick Collins wrote:
Why not start with what you
are trying to do in the layout, consider what the layout tool needs to
make that happen, then trace that back to what is needed in the
schematic to support the layout?
There are lots of different users of these programs, and they have different
- John Griessen wrote:
>
> When you say shortcuts it sounds like the keybindings for keys to use instead
> of
> menu pulldowns. There is an existing mechanism for changing these in
> pcbmenu.res files
> in a local project directory.
>
Really? I had been recompiling every time I changed
- John Griessen wrote:
> Andrew Poelstra wrote:
>
> > No, that's pretty much it. There are two things I want beyond simply
> > "workspaces" to hold different tool settings for different functional
> > groups:
> >
> > 1. You can create a view based on anything, not just functional
> >
At 11:44 AM 8/16/2010, Stefan Salewski wrote:
On Mon, 2010-08-16 at 15:51 +0200, Armin Faltl wrote:
> >
> Just to make it known, "a subnet is a point to point connection within a
> net" was the
> one and only DEFINITION of what a sub net is I found and understood. All
> other ways
> I can concei
Andrew Poelstra wrote:
I've also done this, but if you take it to its logical conclusion,
you should also add Ctrl+O for open, Ctrl+Z/Y for undo/redo, Ctrl+N
for new, Ctrl+P for print, Ctrl+A for 'select all', etc.
In the end I had to displace a number of existing shortcuts, a
move that I didn'
- Armin Faltl wrote:
>
>
> Andrew Poelstra wrote:
> > I wanted to copy the GIMP: show icons for visibility/locking as part of
> > the list item, that can be toggled independently of visibility. Right-
> > clicking should pop up a full context menu for creating/editing/deleting
> > layers, g
Andrew Poelstra wrote:
No, that's pretty much it. There are two things I want beyond simply
"workspaces" to hold different tool settings for different functional
groups:
1. You can create a view based on anything, not just functional
groups, as will be the default. This includes opening
Andrew Poelstra wrote:
I wanted to copy the GIMP: show icons for visibility/locking as part of
the list item, that can be toggled independently of visibility. Right-
clicking should pop up a full context menu for creating/editing/deleting
layers, geometric transforms, duplicating, etc.
As for
- Rick Collins wrote:
> At 09:12 AM 8/16/2010, you wrote:
> I'm not sure I follow. I was thinking of this when I saw your first
> post. This is a similar problem to displaying graphics using 3D
> information. I have seen a speed up method for that which uses the
> extra memory that typi
Armin Faltl wrote:
One of the things I dislike about pcb is the coordinate system: it's
lefthanded, or z+ is going into the
screen instead of pointing out.
.
.
.
All mechanical CAD systems and robotics controls adhere to this. So to
define a rotation
consistent with production, the first thin
On Mon, 2010-08-16 at 15:51 +0200, Armin Faltl wrote:
> >
> Just to make it known, "a subnet is a point to point connection within a
> net" was the
> one and only DEFINITION of what a sub net is I found and understood. All
> other ways
> I can conceive are generalizations of that, ie. "a subn
Armin Faltl wrote:
My very little experience with autorouters also makes me believe, that
an autorouter has even less understanding of EMI issues than I have ;-)
Sure, that's why I made the analogy to Rainman. Routers are autistic.
Have to be told what to do with many attribs and usually with
Stephan Boettcher wrote:
John Griessen writes:
net attribs plus layout zones get us far
on the way to autorouting success.
If there is work put into partitioning a layout, can't we please have
hierarchical layout instead?
They are independent enough that it's not a choice of either or.
Bot
Andrew Poelstra wrote:
Clearance would be set for each component created or moved, as well as the
components nearby it (still working on the details ;).
I think you will find good working code doing clearances in pcb.
Somewhere in there...
John Griessen
- Armin Faltl wrote:
>
> Andrew Poelstra wrote:
> > This problem prompted me to suggest redoing the layer selector
> > entirely to clean up the code, which in turn spawned the
> > workspace/functional block discussion.
> >
> Since you want to do away with the radio buttons left of the lay
Hi all,
> -Original Message-
> From: geda-user-boun...@moria.seul.org
> [mailto:geda-user-boun...@moria.seul.org] On Behalf Of Armin Faltl
> Sent: Monday, August 16, 2010 5:16 PM
> To: gEDA user mailing list
> Subject: Re: gEDA-user: pcb keyboard shortcuts (and usability
> in general)
>
At 09:12 AM 8/16/2010, you wrote:
On Mon, Aug 16, 2010 at 02:56:17PM +0200, Armin Faltl wrote:
>
> >Actually, I don't think that's true:
> >
> >Suppose I have a trace whose clearance is set to 2.5mm - if I
lay any component
> >too close while the real-time DRC is running, how can it know
that i
Andrew Poelstra wrote:
This problem prompted me to suggest redoing the layer selector
entirely to clean up the code, which in turn spawned the
workspace/functional block discussion.
Since you want to do away with the radio buttons left of the layers for
activating
I suppose you want use left
Stefan Salewski wrote:
On Mon, 2010-08-16 at 06:12 -0700, Andrew Poelstra wrote:
1. I would have to create bounding boxes for every object on the screen,
because you never know if some weird part 10 inches away has a 10-inch
clearance requirement.
Guess: Make bounding boxes wh
- Stefan Tauner wrote:
> i have finally fetched the source from git and rebuilt pcb.
> the most prominent new feature seems to be the polygon hole mode (which
> seems to create "negative" polygons inside polygons essentially). it
> has no keyboard shortcut assigned. since it is related to pol
Andrew Poelstra wrote:
There are two problems with this:
1. I would have to create bounding boxes for every object on the screen,
because you never know if some weird part 10 inches away has a 10-inch
clearance requirement.
If pcb-objects don't have bounding boxes as of now, there's so
Stefan Salewski wrote:
On Sat, 2010-08-07 at 12:58 -0700, Andrew Poelstra wrote:
I agree, but on a high level a net /is/ "a relation between two pads/pins".
(Well, a net can have many pads/pins. A subnet would be restricted to two,
by definition.)
No. A subnet, in my mind, is not r
i have finally fetched the source from git and rebuilt pcb.
the most prominent new feature seems to be the polygon hole mode (which
seems to create "negative" polygons inside polygons essentially). it
has no keyboard shortcut assigned. since it is related to polygons i
would suggest to assign some
On Mon, Aug 16, 2010 at 03:25:08PM +0200, Stefan Salewski wrote:
> On Mon, 2010-08-16 at 06:12 -0700, Andrew Poelstra wrote:
>
> >
> > 1. I would have to create bounding boxes for every object on the screen,
> >because you never know if some weird part 10 inches away has a 10-inch
> >clea
DJ Delorie wrote:
I can't think of a good reason to do this, but I suppose you could
connect to a bus pin (aka "pin with multiple signals") and name the
*bus* while leaving the individual *nets* unnamed, and carry that bus
name on to a second schematic page, still without naming the nets, and
c
On Mon, Aug 16, 2010 at 01:18:37PM +0200, Stefan Salewski wrote:
> On Fri, 2010-08-06 at 17:42 -0700, Andrew Poelstra wrote:
> > Layer groups as I proposed
> > separate the board into different workspaces to keep things organized.
> >
>
> I understand your goal, and support it. But I still have p
On Mon, 2010-08-16 at 06:12 -0700, Andrew Poelstra wrote:
>
> 1. I would have to create bounding boxes for every object on the screen,
>because you never know if some weird part 10 inches away has a 10-inch
>clearance requirement.
Guess: Make bounding boxes which includes the clearance f
Hi John,
> -Original Message-
> From: geda-user-boun...@moria.seul.org
> [mailto:geda-user-boun...@moria.seul.org] On Behalf Of John Doty
> Sent: Monday, August 16, 2010 12:43 AM
> To: gEDA user mailing list
> Subject: Re: gEDA-user: discussion on what busses *mean*
>
>
> On Aug 15, 20
On Mon, Aug 16, 2010 at 02:56:17PM +0200, Armin Faltl wrote:
>
> >Actually, I don't think that's true:
> >
> >Suppose I have a trace whose clearance is set to 2.5mm - if I lay any
> >component
> >too close while the real-time DRC is running, how can it know that it's
> >breaking
> >a rule withou
DJ Delorie wrote:
>
> For PCB, you'd edit $HOME/.pcb/settings to say something like:
>
> lib-newlib = ../imported-
symbols/:../gedasymbols.org_salewski_symbols/:../custom-symbols/
For the GTK GUI this is overwritten by $HOME/.pcb/preferences
IMHO, the settings/preferences confusion needs to be
Armin Faltl wrote:
> you mean the first directory has highest priority, same in linker paths
Ouups, your are right.
---<)kaimartin(>---
--
Kai-Martin Knaak tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211
Welfengart
Actually, I don't think that's true:
Suppose I have a trace whose clearance is set to 2.5mm - if I lay any component
too close while the real-time DRC is running, how can it know that it's breaking
a rule without re-checking the clearance for every object on the PCB?
By checking exactly the
On Sat, 2010-08-07 at 12:58 -0700, Andrew Poelstra wrote:
>
> I agree, but on a high level a net /is/ "a relation between two pads/pins".
> (Well, a net can have many pads/pins. A subnet would be restricted to two,
> by definition.)
>
No. A subnet, in my mind, is not restricted to two nodes (pi
> One of the things I dislike about pcb is the coordinate system: it's
> lefthanded, or z+ is going into the
> screen instead of pointing out.
When exporting to x-y the coordinate system starts in the bottom left
of the screen, i.e. with z+ going out of the screen.
It would be useful to be able t
On Fri, 2010-08-06 at 17:42 -0700, Andrew Poelstra wrote:
> Layer groups as I proposed
> separate the board into different workspaces to keep things organized.
>
I understand your goal, and support it. But I still have problems to
imagine how "workspaces" will work for layout process. At the end
Rick Collins wrote:
This seems like a pretty sharp group. One of the problems I
consistently have is generating an XYRS file for auto assembly of my
boards. The X and Y require a specified origin and orientation of the
board, which is done in the fab drawing. The side is pretty clear as
w
On Mon, 2010-08-16 at 10:09 +0200, Stephan Boettcher wrote:
> John Griessen writes:
>
> > It's not pie in the sky. Some of these ideas to use sets and lists
> > and groups are the easiest kind to implement... Zones in layout are
> > an easy part of what it already does, when we have more layers
On Mon, 2010-08-16 at 11:23 +0200, Armin Faltl wrote:
>
> John Griessen wrote:
> >
> > In your work flow, English words convey duties to hired layout persons.
> > In my example, I only hire the autorouter.
> >
> > Sounds very useful. Especially for open hardware projects and hobbyists,
> > and bo
John Griessen wrote:
In your work flow, English words convey duties to hired layout persons.
In my example, I only hire the autorouter.
Sounds very useful. Especially for open hardware projects and hobbyists,
and bottom line oriented business folk.
Sounds like you suggest the autorouter as
kai-martin knaak wrote:
Look at make_footprint_hash() in src/buffer.c
Maybe we need to read the menus in reverse order?
^
paths?
I'd say, the last path should receive highest priority. This is how the PATH
environment variable
John Griessen wrote:
> On Fri, Aug 13, 2010 at 10:54 AM, Peter Clifton wrote:
> > On Thu, 2010-08-12 at 09:17 -0500, John Griessen wrote:
> > > OpenNurbs.org has the code, public domain. He's considering forking
> > > and licensing it GPL.
> > IMO, that sounds like quite an aggressive thing to do
John Griessen wrote:
1) Assign unique "refdes" value to all netlistable
logical symbols in the schematic. If the
logical symbol is one of several in a
"PHYSICAL_package", then assgined "refdes"
to each logical symbol such as "Uxx_yy";
where yy is the value to identify
a parti
DJ Delorie wrote:
And I want to understand the implications of pins that reflect
multiple signals, too - mapping names and numbers, etc.
I can only envision 2 cases for a multipurpose pin:
a) the generic interface shall be preserved -> don't care what the pin
means, just pass a wire
b) th
DJ Delorie wrote:
Sure, and the big EDA code based on LISP/Guile also uses syntax for
names so a wire with such a name attrib seems to be all that's
necessary to define a bus. Putting the syntax netname[0:7] into
form netname[0], netname[1], for the backends is fine. Seems
to me the com
John Griessen writes:
> It's not pie in the sky. Some of these ideas to use sets and lists
> and groups are the easiest kind to implement... Zones in layout are
> an easy part of what it already does, when we have more layers for
> intermediate calculations. net attribs plus layout zones get u
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