Thanks a lot for bringing this up. I wanted to start such conversation for
a long time as all the full system files in the webpage are deprecated.
Thank you,
Mohammad
On Fri, Apr 7, 2017 at 9:59 AM, Pau Cabre wrote:
> Hi all,
>
>
>
> I would like to start a discussion
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Ship it!
Ship It!
- Mohammad Alian
On Dec. 15, 2016, 4:50 p.m
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Ship it!
Ship It!
- Mohammad Alian
On Nov. 25, 2016, 5:21 p.m
> On Aug. 30, 2016, 3:39 p.m., Michael LeBeane wrote:
> > Any comments on this patch?
I just have some high level question before goring through the code:
Can you explain the use-case for this patch? Probably it means to speed up the
simulation but why do we need to switch on/off
> On Aug. 16, 2016, 9:26 p.m., Mohammad Alian wrote:
> > Thanks for this fix. Just one issue that I think still is not resolved for
> > the termination of dist-gem5 simulations. Maybe Gabor also has an opinoin
> > on this.
> > When one of the gem5 processes (node
uf, length, MSG_WAITALL );
if (ret <= 0 || ret != length)
panic("recv() failed");
return (ret == length);
}
- Mohammad Alian
On Aug. 4, 2016, 4:48 p.m., Michael LeBeane wrote:
>
> ---
> This is an automatically g
changeset a16337161285 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a16337161285
description:
dev, dist: Fixed a scheduling bug in the etherswitch
This patch fixes a bug in etherswitch. When a packet gets inserted
in the output fifo, the txEvent
hip it!
>
> Thanks!
>
>
> - Gabor Dozsa
>
> On July 5th, 2016, 11:44 p.m. UTC, Mohammad Alian wrote:
> Review request for Default.
> By Mohammad Alian.
>
> *Updated July 5, 2016, 11:44 p.m.*
> *Repository: * gem5
> Description
>
> Changeset 11558:dfca4ee0968b
&g
in the reschedule function.
Diffs
-
src/dev/net/etherswitch.cc cdb94f2332a6
Diff: http://reviews.gem5.org/r/3543/diff/
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Hi,
In mem_ctrl.cc, when a write request arrives at the memory controller, in
"addToWriteQueue" function we check if an existing request to the same
address is in the writeQueue to whether we can merge them together:
bool merged = isInWriteQueue.find(burstAlign(addr)) !=
changeset 2aa4d7bd47ec in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=2aa4d7bd47ec
description:
dist, dev: Fixed the packet ordering in etherswitch
This patch fixes the order that packets gets pushed into the output fifo
of etherswitch. If two
Hi All,
I would really appreciate if somebody commit this patch for me. If you
think I'm qualified and/or don't want me to bother you anymore with my
patches, please give me commit access :).
Thank you,
Mohammad
On Thu, Jun 2, 2016 at 10:20 AM, Mohammad Alian <m.alian1...@gmail.com>
s.gem5.org/r/3465/
>
> Ship it!
>
> Ship It!
>
>
> - Andreas Hansson
>
> On May 30th, 2016, 1:32 p.m. UTC, Mohammad Alian wrote:
> Review request for Default.
> By Mohammad Alian.
>
> *Updated May 30, 2016, 1:32 p.m.*
> *Repository:
macro for that if I remember correctly), or alternatively the
> > cpt_upgrader.py in util needs to be updated and add the field.
>
> Mohammad Alian wrote:
> I've added a cpt_upgrader to fix this issue.
>
> Andreas Hansson wrote:
> Fantastic. Thanks for that!
A
> On May 24, 2016, 10 p.m., Andreas Hansson wrote:
> > src/dev/net/etherswitch.cc, line 93
> > <http://reviews.gem5.org/r/3465/diff/7/?file=55548#file55548line93>
> >
> > should this perhaps even be a warn (or do we ever expect this to happen
> >
util/cpt_upgraders/etherswitch.py PRE-CREATION
Diff: http://reviews.gem5.org/r/3465/diff/
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l. To reply, visit:
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On May 30, 2016, 2:46 a.m., Mohammad Alian wrote:
>
> ---
> This is an automatically generated e-m
util/cpt_upgraders/etherswitch.py PRE-CREATION
Diff: http://reviews.gem5.org/r/3465/diff/
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oEntry::unserialize"
- Mohammad
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On May
Diff: http://reviews.gem5.org/r/3465/diff/
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e at the same tick, it can lead to non-deterministic simulations
>
>
> Diffs
> -
>
> src/dev/net/etherswitch.hh 954d3014f7f0
> src/dev/net/etherswitch.cc 954d3014f7f0
>
> Diff: http://reviews.gem5.org/r/3465/diff/
>
>
> Testing
> ---
>
>
> Thanks,
>
> Mohammad Alian
>
>
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On May 23, 2016, 8:08 p.m., Mohammad Alian wrote:
>
> --
Diff: http://reviews.gem5.org/r/3465/diff/
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t:
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On May 20, 2016, 6:39 p.m., Mohammad Alian wrote:
>
> ---
> This is an automatically generated e-m
Diff: http://reviews.gem5.org/r/3465/diff/
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On May 18, 2016, 8:06 p.m., Mohammad Alian wrote:
>
: http://reviews.gem5.org/r/3465/diff/
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hammad
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On May 17, 2016, 3:22 a.m., Mohammad A
Diff: http://reviews.gem5.org/r/3465/diff/
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IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Mohammad Alian
+
+# This is an example of an n port network switch to work in dist-gem5.
+# Users can extend this to have different different topologies
+
+import optparse
+import sys
+
een here waiting for 2 month. Thanks
- Mohammad
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-------
ESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Anthony Gutierrez
+ *
Dear Tony,
Could you please commit these two patches? I will appreciate it as these
patches are essential for dist-gem5 functionality.
http://reviews.gem5.org/r/3231/
http://reviews.gem5.org/r/3230/
Thank you,
Mohammad Alian
On Wed, Jan 27, 2016 at 12:55 PM, Tony Gutierrez <anthony.gut
/etherswitch.hh PRE-CREATION
Diff: http://reviews.gem5.org/r/3230/diff/
Testing
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On Jan. 24, 2016, 8:35 p.m., Mohammad Alian wrote:
>
> ---
> This
-
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On Jan. 24, 2016, 8:35 p.m., Mohammad Alian wrote:
>
>
/etherswitch.cc PRE-CREATION
Diff: http://reviews.gem5.org/r/3230/diff/
Testing
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d on an old patch which never gets commited to gem5 tree, so
I didn't change the basic design descisions.
Apparently you are not happy with the current implementation, so I reflect what
you proposed here into the new revision. It's up to the respected reviewers to
decide which implementation is better to get commited. If you decided to go for
the previous implem
,
Mohammad
On Fri, Jan 8, 2016 at 10:57 AM, Mohammad Alian <al...@wisc.edu> wrote:
> Hi everyone,
>
> To provide the full distributed simulation feature available to the
> public, we would like to commit the rest of dist-gem5 patches asap (by the
> end of next week, Jan-15, if there
en if
> > there is nothing to do.
> >
> > Even if we don't make the model event based, could we at least make
> > sure that it only ticks if there is something to do?
>
> Mohammad Alian wrote:
> Please refer to my prevoius comment. We do not tick when there is no
>
n. 11, 2016, 5:58 a.m., Mohammad Alian wrote:
>
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3230/
> ---
>
> (Update
there is no packet in
the rx or tx queues.
- Mohammad
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------
be much better if this module was event based. Is there a
> > reason why it is not?
>
> Mohammad Alian wrote:
> I couldn't think of any better implementation. We should retry sending
> packets when some of them cannot make it through the fabric (due to
>
PRE-CREATION
src/dev/net/etherswitch.cc PRE-CREATION
Diff: http://reviews.gem5.org/r/3230/diff/
Testing
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9d2364203316
src/dev/net/SConscript 9d2364203316
src/dev/net/etherswitch.hh PRE-CREATION
Diff: http://reviews.gem5.org/r/3230/diff/
Testing
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several testing done with different benchmarks and different switch sizes
Thanks,
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ount associated with the vector port, why not use that?
Done.
- Mohammad
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-
switch model
>
>
> Diffs
> -
>
> src/dev/net/etherswitch.cc PRE-CREATION
> src/dev/net/Ethernet.py 9d2364203316
> src/dev/net/SConscript 9d2364203316
> src/dev/net/etherswitch.hh PRE-CREATION
>
> Diff: htt
, synchronisation and checkpointing but combines
those with the elaborated network switch model from pd-gem5.
Diffs (updated)
-
configs/example/sw.py PRE-CREATION
Diff: http://reviews.gem5.org/r/3231/diff/
Testing
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, synchronisation and checkpointing but combines
those with the elaborated network switch model from pd-gem5.
Diffs (updated)
-
configs/example/sw.py PRE-CREATION
Diff: http://reviews.gem5.org/r/3231/diff/
Testing
---
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> On Jan. 8, 2016, 7:10 p.m., Andreas Hansson wrote:
> > The description should be <80 char lines. I am also not sure about the
> > license header. Is it intentionally the "extended" BSD rather than just the
> > plain BSD?
>
> Mohammad Alian wrote:
il. To reply, visit:
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---
On Nov. 19, 2015, 8:16 p.m., Mohammad Alian wrote:
>
> ---
> This is an automatic
eviews.gem5.org/r/3231/#review7845
---
On Nov. 19, 2015, 8:16 p.m., Mohammad Alian wrote:
>
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3231/
> --
inal Message-
> From: gem5-dev [mailto:gem5-dev-boun...@gem5.org] On Behalf Of Mohammad
> Alian
> Sent: Thursday, November 19, 2015 2:24 PM
> To: gem5 Developer List
> Subject: Re: [gem5-dev] On ReviewBoard: dist-gem5, the integration of
> multi-gem5 and pd-gem5
>
> Th
-CREATION
Diff: http://reviews.gem5.org/r/3231/diff/
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2375b33bddc6
src/dev/SConscript 2375b33bddc6
src/dev/etherswitch.hh PRE-CREATION
src/dev/etherswitch.cc PRE-CREATION
Diff: http://reviews.gem5.org/r/3230/diff/
Testing (updated)
---
several testing done with different benchmarks and different switch sizes
Thanks,
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f35e317d2e1e
Diff: http://reviews.gem5.org/r/3025/diff/
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/etherlink.cc f35e317d2e1e
src/dev/etherswitch.hh PRE-CREATION
src/dev/etherswitch.cc PRE-CREATION
Diff: http://reviews.gem5.org/r/3021/diff/
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f35e317d2e1e
src/dev/etherdump.hh f35e317d2e1e
src/dev/etherlink.hh f35e317d2e1e
src/dev/etherlink.cc f35e317d2e1e
Diff: http://reviews.gem5.org/r/3024/diff/
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configs/example/sw.py PRE-CREATION
util/pd-gem5/pd-gem5.conf PRE-CREATION
util/pd-gem5/pd-gem5.py PRE-CREATION
Diff: http://reviews.gem5.org/r/3023/diff/
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http
with multi-threaded gem5.
Thanks,
Mohammad
On Tue, Jul 21, 2015 at 3:30 PM, Mohammad Alian al...@wisc.edu wrote:
Hi Steve,
Sorry for the misinterpretation, my comment on communication is not
correct and there are certainly values in using other programming models.
My argument is that if we could
synchronization.
I'm going to consult with our local MPI expert and see what he thinks about
using MPI here.
Steve
On Thu, Jul 16, 2015 at 1:07 PM Mohammad Alian al...@wisc.edu wrote:
Hi,
Regarding combining MultiIface and pdgem5 network model, my understanding
is that MultiIface
Hi,
Regarding combining MultiIface and pdgem5 network model, my understanding
is that MultiIface design is tightly dependent on a centralized module that
do both packet forwarding and synchronization at the same place (tcpserver
in multi-gem5). The first thing that comes into mind is to integrate
Here I’m trying to summarize this long discussion ( I just summarize the
points that are discussed in this email thread).
1- Synchronization: using one socket for both communication and
synchronization is superior design (multi-gem5). Both pd-gem5 and
multi-gem5 use barrier synchronization.
2-
.
- Gabor
On 7/7/15, 6:10 PM, Mohammad Alian al...@wisc.edu wrote:
I think you did't understand my point. I'll explain it with an example.
A receive
tick of a packet cannot fall into the current quantum so every packet
can
get scheduled for eceive properly even
. Does that make sense?
- Gabor
On 7/7/15, 4:11 PM, Mohammad Alian al...@wisc.edu wrote:
Then you are assuming taking checkpoint with quantum size smaller than
link
latency which contradicts your initial motivation for unsync checkpoint!:
(I copied this sentence from earlier messages
implementation for MultiIface ;-)
- Gabor
On 7/7/15, 6:29 AM, Mohammad Alian al...@wisc.edu wrote:
Gabor- My concern about unsync checkpoint is that when you restore from an
unsync checkpoint, you'll have gem5 processes that each is running in
different tick. Then how do you handle accurate delivery
On 01/07/2015 21:41, gem5-dev on behalf of Mohammad Alian
gem5-dev-boun...@gem5.org on behalf of al...@wisc.edu wrote:
Thanks Gabor for the reply.
I feel this conversation is useful as we can find out pros/cons of
each
design.
Please find my response in-lined below.
Thank you
must not rely on synchronicity. It is vital for several
workloads that we can checkpoint the various gem5 instances at different
Ticks (due to the way the workloads are constructed).
Andreas
On 01/07/2015 21:41, gem5-dev on behalf of Mohammad Alian
gem5-dev-boun...@gem5.org on behalf
patch so let me add some more
clarifications and answer to your concerns. My comments are inline below.
Thanks,
- Gabor
On 6/27/15, 10:20 AM, Mohammad Alian al...@wisc.edu wrote:
Hi All,
Curtis-Thank you for listing some of the differences. I was waiting for
the
completed multi-gem5
is at least as fast and more scalable.
Thanks,
Curtis
From: gem5-dev [gem5-dev-boun...@gem5.org] On Behalf Of Mohammad Alian [
al...@wisc.edu]
Sent: Friday, June 26, 2015 7:37 PM
To: gem5 Developer List
Subject: Re: [gem5-dev] pd-gem5: simulating
of Mohammad Alian [
al...@wisc.edu]
Sent: Wednesday, June 24, 2015 12:43 PM
To: gem5 Developer List
Subject: Re: [gem5-dev] pd-gem5: simulating a parallel/distributed system
on multiple physical hosts
Hi Andreas,
Thanks for the comment.
I think the checkpointing support in both works is the same
/diff/
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.
Does this sound reasonable?
Thanks,
Andreas
On 24/06/2015 05:05, gem5-dev on behalf of Mohammad Alian
gem5-dev-boun...@gem5.org on behalf of al...@wisc.edu wrote:
Hello All,
I have submitted a chain of patches which enables gem5 to simulate a
cluster on multiple physical
features
from both works.
Thank you,
Mohammad Alian
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-CREATION
scriptdir/TEST/tux0.sh PRE-CREATION
scriptdir/TEST/tux1.sh PRE-CREATION
scriptdir/TEST/tux2.sh PRE-CREATION
scriptdir/TEST/tux3.sh PRE-CREATION
Diff: http://reviews.gem5.org/r/2915/diff/
Testing
---
Thanks,
Mohammad Alian
/example/sw.py PRE-CREATION
util/pd_gem5/pd-gem5.conf PRE-CREATION
util/pd_gem5/pd-gem5.py PRE-CREATION
Diff: http://reviews.gem5.org/r/2914/diff/
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/
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acceptTap function.
Diffs
-
src/base/socket.hh e4f63f1d502d
src/base/socket.cc e4f63f1d502d
src/dev/Ethernet.py e4f63f1d502d
src/dev/ethertap.hh e4f63f1d502d
src/dev/ethertap.cc e4f63f1d502d
Diff: http://reviews.gem5.org/r/2910/diff/
Testing
---
Thanks,
Mohammad Alian
This is an interesting feature if we could have in gem5. Actually, we have
done the same work in enabling parallel/distributed simulation of a cluster
using gem5. Please refer to a recently published paper on this for more
information:
Hi All,
Does anybody knows if TCP segmentation offload feature for Intel NIC model
works? If it works, how should I enable it?
Based on this commit, TSO has been added to NIC model:
http://repo.gem5.org/gem5/rev/b98a6a9739fe
Thank you,
Mohammad
___
Well, I found the solution, just to share with others:
You should set the following flags in the kernel .config file and recompile
the kernel:
*CONFIG_NET_VENDOR_INTEL=yCONFIG_E100=yCONFIG_E1000=yCONFIG_E1000E=y*
--Mohammad
On Fri, Mar 6, 2015 at 6:41 PM, Mohammad Alian al...@wisc.edu
Hi all,
How should I enable PCIe devices (Ethernet) in the DVFS enabled kernel?
This is what I get when I try to bring up eth0 after I boot linux with DVFS
enabled kernel:
*#ifconfig eth0 upSIOCSIFADDR: No such deviceeth0: ERROR while getting
interface flags: No such device*
This is also
?
If it takes about 10 minutes, I suggest that you come over to the CS
building so that I can take a look at your setup.
--
Nilay
On Sat, 24 Jan 2015, Mohammad Alian wrote:
After digging into the issue, I found out that ruby actually doesn't
cache memory requests within memory mapped devices
: 5253512 KBytes
Program aborted at cycle 2379481334283000
Aborted (core dumped)
Any idea about what is going on here and possible fixes?
Thank you,Mohammad
On Thursday, January 22, 2015 10:28 AM, Mohammad Alian via gem5-dev
gem5-dev@gem5.org wrote:
Hello,
How can I force a request
Hello,
How can I force a request to be uncacheable when using Ruby memory
system?req-setFlags(Request::UNCACHEABLE) works for classic memory system
but it doesn't have any effect on the request while using Ruby.
Thank you,Mohammad
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From: gem5-dev [gem5-dev-boun...@gem5.org] on behalf of Nilay Vaish via
gem5-dev [gem5-dev@gem5.org]
Sent: Wednesday, October 01, 2014 9:41 AM
To: Mohammad Alian via gem5-dev
Subject: Re: [gem5-dev] Ethernet device doesn't work with O3 cpu model in X86
ISA
How did you do this? My current
?
Thanks,
Steve
On Mon, Sep 8, 2014 at 2:55 PM, Mohammad Alian via gem5-dev
gem5-dev@gem5.org wrote:
Hi,
For some reasons gem5 doesn't recognize that PCI device address ranges are
uncacheable. I set UNCACHEABLE flag for all accesses in the PCI physical
address range and it fixed the problem
, 2014 at 2:30 PM, Mohammad Alian via gem5-dev
gem5-dev@gem5.org wrote:
Hi all,
Ethernet device work perfectly with atomic cpu in X86 ISA but I get an
error when I switch cpu to detailed O3 cpu. The error is:
gem5.opt: build/X86/dev/i8254xGBe.cc:182: virtual Tick
IGbE::read(PacketPtr
Aborted
I noticed that the size of packet that Ethenet device receive with O3 cpu
is same as cache line size(64Bytes) however the Ethernet device just
support 32bit accesses.
Any Idea how to fix this problem?
Thank you,
Mohammad Alian
___
gem5-dev mailing
On July 18, 2014, 1:39 p.m., Andreas Sandberg wrote:
LGTM. Thanks for fixing this!
Hi,
Have you ever tried to boot system or use Ethernet device with O3 cpu model?
With O3 cpu I get this error:
gem5.opt: build/X86/dev/i8254xGBe.cc:182: virtual Tick IGbE::read(PacketPtr):
Assertion
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