[gem5-dev] [S] Change in gem5/gem5[develop]: mem-cache: schedule already ready pf next cycle

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/67473?usp=email ) Change subject: mem-cache: schedule already ready pf next cycle .. mem-cache: schedule already ready pf

[gem5-dev] [S] Change in gem5/gem5[develop]: mem-cache: schedule already ready pf next cycle

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/67473?usp=email ) Change subject: mem-cache: schedule already ready pf next cycle .. mem-cache: schedule

[gem5-dev] [M] Change in gem5/gem5[develop]: mem-cache: use MMU instead of TLB in prefetchers

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/66831?usp=email ) Change subject: mem-cache: use MMU instead of TLB in prefetchers .. mem-cache: use MMU instead of TLB

[gem5-dev] [M] Change in gem5/gem5[develop]: mem-cache: use MMU instead of TLB in prefetchers

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/66831?usp=email ) Change subject: mem-cache: use MMU instead of TLB in prefetchers .. mem-cache: use MMU

[gem5-dev] Change in gem5/gem5[develop]: misc: advertise auto-compress debug output

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/49670 ) Change subject: misc: advertise auto-compress debug output .. misc: advertise auto-compress debug output

[gem5-dev] Change in gem5/gem5[develop]: misc: advertise auto-compress debug output

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/49670 ) Change subject: misc: advertise auto-compress debug output .. misc: advertise auto-compress debug

[gem5-dev] Change in gem5/gem5[develop]: misc: limit debug output file size

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/49672 ) Change subject: misc: limit debug output file size .. misc: limit debug output file size Add an option

[gem5-dev] Change in gem5/gem5[develop]: misc: sync debug tracing with m5op reset/dump stats

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/49671 ) Change subject: misc: sync debug tracing with m5op reset/dump stats .. misc: sync debug tracing

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: reuse local variable in QueuedPrefetcher

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/48684 ) Change subject: mem-cache: reuse local variable in QueuedPrefetcher .. mem-cache: reuse local variable

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: print VA and PA in the prefetch queues

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/48683 ) Change subject: mem-cache: print VA and PA in the prefetch queues .. mem-cache: print VA and PA in the prefetch

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: print VA and PA in the prefetch queues

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/48683 ) Change subject: mem-cache: print VA and PA in the prefetch queues .. mem-cache: print VA and PA

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: reuse local variable in QueuedPrefetcher

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/48684 ) Change subject: mem-cache: reuse local variable in QueuedPrefetcher .. mem-cache: reuse local variable

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: print prefetch queues in Queued prefetcher

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47199 ) Change subject: mem-cache: print prefetch queues in Queued prefetcher .. mem-cache: print prefetch queues

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: accuracy and coverage stat for prefetchers

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47603 ) Change subject: mem-cache: accuracy and coverage stat for prefetchers .. mem-cache: accuracy and coverage stat

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: move unusedPrefetches stat to prefetcher

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47599 ) Change subject: mem-cache: move unusedPrefetches stat to prefetcher .. mem-cache: move unusedPrefetches stat

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: add a prefetch useful stat

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47602 ) Change subject: mem-cache: add a prefetch useful stat .. mem-cache: add a prefetch useful stat Count how many

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: add pfIssued stat in MultiPrefetcher

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47600 ) Change subject: mem-cache: add pfIssued stat in MultiPrefetcher .. mem-cache: add pfIssued stat in MultiPrefetcher

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: show in DPPRINTF if block is prefetched

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47202 ) Change subject: mem-cache: show in DPPRINTF if block is prefetched .. mem-cache: show in DPPRINTF if block

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: add option to send pf on hit on pf

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47201 ) Change subject: mem-cache: add option to send pf on hit on pf .. mem-cache: add option to send pf on hit on pf

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: adding late prefetch stats

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47204 ) Change subject: mem-cache: adding late prefetch stats .. mem-cache: adding late prefetch stats Adding a late

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: print when hitting on a prefetched line

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47601 ) Change subject: mem-cache: print when hitting on a prefetched line .. mem-cache: print when hitting

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: count pf filtered by demand to the same cache line

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47203 ) Change subject: mem-cache: count pf filtered by demand to the same cache line .. mem-cache: count pf filtered

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: accuracy and coverage stat for prefetchers

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47603 ) Change subject: mem-cache: accuracy and coverage stat for prefetchers .. mem-cache: accuracy

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: move unusedPrefetches stat to prefetcher

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47599 ) Change subject: mem-cache: move unusedPrefetches stat to prefetcher .. mem-cache: move unusedPrefetches

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: print when hitting on a prefetched line

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47601 ) Change subject: mem-cache: print when hitting on a prefetched line .. mem-cache: print when hitting

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: add a prefetch useful stat

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47602 ) Change subject: mem-cache: add a prefetch useful stat .. mem-cache: add a prefetch useful stat Count

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: add pfIssued stat in MultiPrefetcher

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47600 ) Change subject: mem-cache: add pfIssued stat in MultiPrefetcher .. mem-cache: add pfIssued stat

[gem5-dev] Change in gem5/gem5[develop]: mem: add useful stats in prefetchers

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47200 ) Change subject: mem: add useful stats in prefetchers .. mem: add useful stats in prefetchers Added

[gem5-dev] Change in gem5/gem5[develop]: mem-cache: show in DPPRINTF if block is prefetched

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47202 ) Change subject: mem-cache: show in DPPRINTF if block is prefetched .. mem-cache: show in DPPRINTF

[gem5-dev] Change in gem5/gem5[develop]: mem: count pf filtered by demand to the same cache line

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47203 ) Change subject: mem: count pf filtered by demand to the same cache line .. mem: count pf filtered

[gem5-dev] Change in gem5/gem5[develop]: mem: adding late prefetch stats

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47204 ) Change subject: mem: adding late prefetch stats .. mem: adding late prefetch stats Adding a late

[gem5-dev] Change in gem5/gem5[develop]: mem: add option to send pf on hit on pf

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47201 ) Change subject: mem: add option to send pf on hit on pf .. mem: add option to send pf on hit on pf

[gem5-dev] Change in gem5/gem5[develop]: mem: print prefetch queues in Queued prefetcher

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47199 ) Change subject: mem: print prefetch queues in Queued prefetcher .. mem: print prefetch queues in Queued

[gem5-dev] Change in gem5/gem5[develop]: mem: format address in hex in the memory controller debug trace

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47043 ) Change subject: mem: format address in hex in the memory controller debug trace .. mem: format address in hex

[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: add more DPRINTF for when cache is blocked

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/47042 ) Change subject: cpu-o3: add more DPRINTF for when cache is blocked .. cpu-o3: add more DPRINTF for when cache

[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: add more DPRINTF for when cache is blocked

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47042 ) Change subject: cpu-o3: add more DPRINTF for when cache is blocked .. cpu-o3: add more DPRINTF for when

[gem5-dev] Change in gem5/gem5[develop]: mem: format address in hex in the memory controller debug trace

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/47043 ) Change subject: mem: format address in hex in the memory controller debug trace .. mem: format

[gem5-dev] Re: de-templating the O3 CPU

Hi Gabe, I totally agree with you on this. I think it’s also quite a blocker when learning gem5 as it makes the code difficult to follow and understand. Do you intend to do it as one big patch or split that into several steps (if that’s possible)? Thanks, Nathanael From: Gabe Black via

[gem5-dev] Change in gem5/gem5[develop]: base: Reinstate Debug::All flag

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/39055 ) Change subject: base: Reinstate Debug::All flag .. base: Reinstate Debug::All flag Reinstate the All

[gem5-dev] Re: Testing fail on GCN3_X86 on Arm machine

docker we created: - https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/util/dockerfiles/gcn-gpu/README.md - http://www.gem5.org/2020/05/27/modern-gpu-applications.html Thanks, Matt On Mon, Jan 11, 2021 at 8:42 AM Nathanael Premillieu via gem5-dev mailto:gem5-dev@gem5.org>&g

[gem5-dev] Testing fail on GCN3_X86 on Arm machine

I need to set up something to make it work? Thanks, Nathanael Premillieu The trace: /scratch/npremill/gem5_public.git/build/GCN3_X86/gem5.opt You may want to run with only a single ISA(--isa=), use --skip-build, or use 'rerun'. MOESI_AMD_Base-dir.sm:220: Warning: Non-void return ignored, return

[gem5-dev] Change in gem5/gem5[develop]: base: avoid recreating socket at each call to listen()

Nathanael Premillieu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32994 ) Change subject: base: avoid recreating socket at each call to listen() .. base: avoid recreating socket at each

[gem5-dev] Change in gem5/gem5[develop]: base: avoid recreating socket at each call to listen()

Nathanael Premillieu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/32994 ) Change subject: base: avoid recreating socket at each call to listen() .. base: avoid recreating socket

Re: [gem5-dev] Review Request 3744: cpu: Remove branch predictor function predictInOrder

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3744/#review9164 --- Ship it! Ship It! - Nathanael Premillieu On Nov. 23, 2016, 4:10 p.m

Re: [gem5-dev] Review Request 3743: cpu: implement L-TAGE branch predictor

> On Nov. 23, 2016, 3:17 p.m., Jason Lowe-Power wrote: > > src/cpu/pred/BranchPredictor.py, line 100 > > > > > > Comment is now wrong. > > > > Also, does it make more sense to call this histBufferEntries (or > >

Re: [gem5-dev] Review Request 3743: cpu: implement L-TAGE branch predictor

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3743/#review9159 --- Ship it! Ship It! - Nathanael Premillieu On Nov. 23, 2016, 2:52 p.m

Re: [gem5-dev] Review Request 3722: cpu: change comments in tournament branch predictor to reflect what the code does

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3722/#review9151 --- Ship it! Ship It! - Nathanael Premillieu On Nov. 18, 2016, 1:01 p.m

Re: [gem5-dev] Review Request 3727: cpu: disallow speculative update of the conditional branch predictor tables (o3)

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3727/#review9150 --- Ship it! Ship It! - Nathanael Premillieu On Nov. 18, 2016, 3:14 p.m

Re: [gem5-dev] Review Request 3710: cpu: Resolve targets of predicted 'taken' conditional direct branches at decode (o3)

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3710/#review9149 --- Ship it! Ship It! - Nathanael Premillieu On Nov. 18, 2016, 3:21 p.m

Re: [gem5-dev] Review Request 3458: cpu: Physical register structural + flat indexing

> On May 13, 2016, 4:22 a.m., Steve Reinhardt wrote: > > src/cpu/o3/comm.hh, line 70 > > > > > > put '{}' on a separate line. ';' is unnecessary Fixed. > On May 13, 2016, 4:22 a.m., Steve Reinhardt wrote: > >

Re: [gem5-dev] Review Request 3457: arch, cpu: Architectural Register structural indexing

> On May 13, 2016, 3:40 a.m., Steve Reinhardt wrote: > > Nice! It's great to see someone unafraid to take on big cleanup tasks like > > this. Several little things below that could be tweaked, but on the whole > > it's a very positive change! Thanks! Thanks for your review! I've fixed most

Re: [gem5-dev] Replace the unified register space by a structural one

Hi, I have not seen any reviews or comments on those changes. As we would like to push them as soon as possible, is it possible for some of you to have a look? Thanks, Nathanael On 28/04/2016 14:51, "gem5-dev on behalf of Nathanael Premillieu" <gem5-dev-boun...@gem5.

Re: [gem5-dev] Review Request 3453: o3: Clarify meaning of cachePorts variable in lsq_unit.hh

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3453/#review8283 --- Ship it! Ship It! - Nathanael Premillieu On April 26, 2016, 12:42

[gem5-dev] Replace the unified register space by a structural one

Hi, Gem5 currently rely on a unified space to map a register index to a class of register and a relative index. While such a mapping is quite straightforward when dealing with two classes of registers, it starts to make less sense when adding more registers classes. A patch has been created [1]

[gem5-dev] changeset in gem5: arm: Fix disasm printing

changeset 21d4eb082b5a in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=21d4eb082b5a description: arm: Fix disasm printing Fix the printDataInst function to properly print the immediate value. diffstat: src/arch/arm/insts/static_inst.cc | 4 ++--

[gem5-dev] changeset in gem5: arm: Fix fplib 128-bit shift operators

changeset a7a718faaf56 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a7a718faaf56 description: arm: Fix fplib 128-bit shift operators Appease clang. diffstat: src/arch/arm/insts/fplib.cc | 10 -- 1 files changed, 8 insertions(+), 2 deletions(-)

[gem5-dev] changeset in gem5: arm: Add secure flag to TableWalker request w...

changeset 4daf60db14d7 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4daf60db14d7 description: arm: Add secure flag to TableWalker request when needed diffstat: src/arch/arm/table_walker.cc | 11 --- 1 files changed, 8 insertions(+), 3 deletions(-)

Re: [gem5-dev] Review Request 2829: cpu: o3: support operand width with functional units

not at the byte level, to be more generic. Although you've done this change for simd, it could be used for other type of operations. - Nathanael Premillieu On May 17, 2015, 9:56 p.m., Nilay Vaish wrote: --- This is an automatically

[gem5-dev] Review Request: ARM: Set ldr_ret_uop as Conditional or Unconditional control

8666e81607a69397aef9d07d6ccd4a366142a932 Diff: http://reviews.gem5.org/r/1728/diff/ Testing --- Thanks, Nathanael Premillieu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request: Checker CPU: change the floating reg index in the copyResult function

://reviews.gem5.org/r/1684/diff/ Testing --- It seems to correct the bug I had with the checker. However, I have not done extensive tests. Thanks, Nathanael Premillieu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5

[gem5-dev] changeset in gem5: arm: set movret_uop as conditional or uncondi...

changeset 3cd40209af8d in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=3cd40209af8d description: arm: set movret_uop as conditional or unconditional control A flag was missing for the movret_uop microop instruction. This patch adds that flag when the

[gem5-dev] changeset in gem5: arm: set uopSet_uop as conditional or uncondi...

changeset bd30fcbf8d28 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=bd30fcbf8d28 description: arm: set uopSet_uop as conditional or unconditional control uopSet_uop is microop instruction that has the IsControl flags set, but the IsCondControl or

[gem5-dev] changeset in gem5: o3 cpu: remove some unused buggy functions in...

changeset aa761458ddcb in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=aa761458ddcb description: o3 cpu: remove some unused buggy functions in the lsq Committed by: Nilay Vaish ni...@cs.wisc.edu diffstat: src/cpu/o3/lsq.hh | 6 --

[gem5-dev] Review Request: ARM: Set movret_uop as Conditional or Unconditional control

4229aedfdd09d5e06dcb2e0359604f580f5f6441 Diff: http://reviews.gem5.org/r/1536/diff/ Testing --- Thanks, Nathanael Premillieu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request: ARM: SetuopSet_uop as Conditional or Unconditional control

/macromem.isa a5ede748a1d97a989e9631aba37afbc43de953ed Diff: http://reviews.gem5.org/r/1463/diff/ Testing --- The generation of the ISA-related is working. Tests to see if it has an impact are under progress. Thanks, Nathanael Premillieu

Re: [gem5-dev] Review Request: ARM: Set uopSet_uop as Conditional or Unconditional control

. Tests to see if it has an impact are under progress. Thanks, Nathanael Premillieu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request: ARM: Set uopSet_uop as Conditional or Unconditional control

) Diffs - src/arch/arm/isa/templates/macromem.isa a5ede748a1d97a989e9631aba37afbc43de953ed Diff: http://reviews.gem5.org/r/1463/diff/ Testing --- The generation of the ISA-related is working. Tests to see if it has an impact are under progress. Thanks, Nathanael Premillieu

[gem5-dev] changeset in gem5: ARM: Inst writing to cntrlReg registers not s...

changeset 5d0fcec59036 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=5d0fcec59036 description: ARM: Inst writing to cntrlReg registers not set as control inst Deletion of the fact that instructions that writes to registers of type cntrlReg are not

Re: [gem5-dev] Review Request: O3: remove some unused buggy functions in the lsq (numLoadsReady)

On Aug. 17, 2012, 9:39 a.m., Nilay Vaish wrote: The diff does not apply cleanly, hence it is not possible to view it. Nathanael Premillieu wrote: That's strange, I have just test it on the last version of the repository (using hg qimport) and it is applied with no problem

Re: [gem5-dev] Review Request: O3: remove some unused buggy functions in the lsq (numLoadsReady)

/1354/diff/ Testing --- As it was unused code, there is not difference in the final program. Thanks, Nathanael Premillieu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request: O3: remove some unused buggy functions in the lsq (numLoadsReady)

aa76bc9f729d309c80337d26359cf43969038576 Diff: http://reviews.gem5.org/r/1354/diff/ Testing --- As it was unused code, there is not difference in the final program. Thanks, Nathanael Premillieu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman

Re: [gem5-dev] Review Request: O3: remove some unused buggy functions in the lsq (numLoadsReady)

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1354/#review3273 --- On Aug. 17, 2012, 7:24 a.m., Nathanael Premillieu wrote

[gem5-dev] changeset in gem5: util: Fix issues with style checker.

changeset 64d4c9d8a384 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=64d4c9d8a384 description: util: Fix issues with style checker. diffstat: util/style.py | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diffs (12 lines): diff -r 275232ad377d -r

Re: [gem5-dev] Review Request: Cache: Handle invalidation of temporary blocks correctly

On July 6, 2012, 12:12 a.m., Andreas Hansson wrote: Any tests to confirm: 1) that it works :), 2) that it does what it is intended to do? At least it has corrected the problem I had with some of my simulations. So from my point of view, the answer is yes to the two questions :) -

[gem5-dev] changeset in gem5: O3: Track if the RAS has been pushed or not t...

changeset 6222624550e7 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=6222624550e7 description: O3: Track if the RAS has been pushed or not to pop the RAS if neccessary. Add new flag (named pushedRAS) in the PredictorHistory structure. This flag