Not seeing a newer guide, but this one will walk you through it: OSA-Express
Integrated Console Controller Implementation Guide (SG24-6364-01).
Believe the gist you are looking for lies between the IODF RESOURCE macro
statement and OSA-ICC CONFIG_SESSION source file.
Let's say two systems (SYS
No. Not quite identical. He spelled his name differently.
Sent from my iPhone
> On Jun 10, 2016, at 18:36, Ed Jaffe wrote:
>
>> On 6/10/2016 2:39 PM, Andr é Schoeman wrote:
>> I've got code that schedules a SRB routine (using IEAMSCHD), since z/OS
>> V1R13 (successfully).
>
> Yes. You have t
On 6/10/2016 2:39 PM, Andr é Schoeman wrote:
I've got code that schedules a SRB routine (using IEAMSCHD), since z/OS V1R13
(successfully).
Yes. You have two identical posts saying the same thing...
Q2: When was the filling of bits 0-31 with x'' in the GPRs and ARs
introduced ???
I
I've got code that schedules a SRB routine (using IEAMSCHD), since z/OS V1R13
(successfully).
Although the manual states that the issuer of IEAMSCHD must be AMODE(31), the
issuer actually
runs in AMODE(64) and all schedules have been successful, the SRB routine
receives control (in AMODE31)
and
I've got code that schedules a SRB routine (using IEAMSCHD), since z/OS V1R13
(successfully).
Although the manual states that the issuer of IEAMSCHD must be AMODE(31), the
issuer actually
runs in AMODE(64) and all schedules have been successful, the SRB routine
receives control (in AMODE31)
and
I thinks that irrelevant when I SSAR I know it's the right address space 1 is
secondary
I am quite sure that the the source is primary ALET 0 I also tried it with ALET
2 which is home
And that failed too
Sent from my iPhone
> On Jun 10, 2016, at 3:15 PM, Philippe Leite wrote:
>
> I don't k
I don't know exactly what you are trying to do but I would check your MODE=
parameter both on SETFRR and SCHEDULE calls and check if you are getting the
right SASN before you enter in AR Mode with ALET 1.
Regards,
Philippe Leite
z/OS System Programmer
Banco Safra
-
On Fri, 10 Jun 2016 09:01:43 -0700, Lizette Koehler wrote:
>I am running into an issue where I will see messages like the following
>
>BPXTF010E FILESYSTEM IS FULL: /tmp��
>
>What I need to know is what/who was running at the time that caused this
>condition.
>
I'd try the UNIX command, "ls -alr
On 10 June 2016 at 12:01, Lizette Koehler wrote:
> BPXTF010E FILESYSTEM IS FULL: /tmp
>
> I have automation to trap these messages to send me a notification when they
> occur.
>
> What I need to know is what/who was running at the time that caused this
> condition.
>
> I have been looking at the
Try issuing from OMVS: fuser -cu /tmp
But that will only work if the task/user is still running.
- Gladys
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Try issuing from OMVS: fuser -cu /tmp
But that will only work if the task/user is still running.
Gladys
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Well
I was able to Post the adress space seems like I am having issuing getting
the data there
First the Enivorment this code is a FRR of a SRB so I guess this primary the
Address space I scheduled it from is Home I am try ing to move it Seconday
the data is the SDWA
I have WTO it loo
On Fri, 10 Jun 2016 07:41:10 -0700, Phil Smith wrote:
>If you have a z/OS application that uses System SSL but needs its own private
>TCP/IP stack, how would one configure that? I spent some time Googling but
>didn't find anything. Since System SSL sits between the application and the
>TCP/IP
On Fri, Jun 10, 2016 at 11:01 AM, Lizette Koehler
wrote:
> I am running into an issue where I will see messages like the following
>
> BPXTF009E FILESYSTEM EXCEEDS 94% FULL: /tmp
>
> BPXTF009E FILESYSTEM EXCEEDS 99% FULL: /tmp
>
> BPXTF010E FILESYSTEM IS FULL: /tmp
>
> I have automation to trap t
I am running into an issue where I will see messages like the following
BPXTF009E FILESYSTEM EXCEEDS 94% FULL: /tmp
BPXTF009E FILESYSTEM EXCEEDS 99% FULL: /tmp
BPXTF010E FILESYSTEM IS FULL: /tmp
I have automation to trap these messages to send me a notification when they
occur.
What I n
Also int setibmopt(int cmd, struct ibm_tcpimage *bfrp);
System SSL sits logically between you and the TCP stack but I believe it
honors the above option.
Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Phil Smith
Sent: Friday,
Allan Staller wrote:
---> Look at the POLICY AGENT (PAGENT). There are some additional low
level OMVS changes needed to support multiple TCP/IP stacks. I haven't checked,
but PAGENT may be able to help here. You might/might not need an additional
stack.
and
---> Add //SYSTCPD DD DSN=.
Thanks Kirk, I thought it was a bit odd!
On 10/06/2016 9:48 PM, Kirk Wolf wrote:
David,
I think that what you are seeing is a packaging problem.
See this APAR:
https://www-304.ibm.com/support/entdocview.wss?uid=isg1OA50517
Kirk Wolf
Dovetailed Technologies
http://dovetail.com
On Fri, Jun 10,
Might be better asked on the TCPIP list. IBM TCP/IP List
Y
You can find this via the normal LSOFT processes.
Responses interspersed:
If you have a z/OS application that uses System SSL but needs its own private
TCP/IP stack, how would one configure that? I spent some time Googling but
didn
If you have a z/OS application that uses System SSL but needs its own private
TCP/IP stack, how would one configure that? I spent some time Googling but
didn't find anything. Since System SSL sits between the application and the
TCP/IP stack, it isn't clear to me what would get configured: is it
David,
I think that what you are seeing is a packaging problem.
See this APAR:
https://www-304.ibm.com/support/entdocview.wss?uid=isg1OA50517
Kirk Wolf
Dovetailed Technologies
http://dovetail.com
On Fri, Jun 10, 2016 at 5:52 AM, David Crayford wrote:
> I noticed that there is a libzz.a library
Thanks and yes I use CELQEPLG for 64-bit ,but my understanding is EDCXELPG is
needed for 31-bit.
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf
Of Philippe Leite
Sent: 10 June 2016 13:26
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Assem
Also, for architectures that put actual parameters on the stack, it would catch
a mismatch between the count of formal and actual parameters, rather than
branching erroneously.
Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf
Of
http://www.theregister.co.uk/2016/06/10/intel_control_flow_enforcement/
...
CET works by introducing a shadow stack – which only contains return
addresses, is held in system RAM, and is protected by the CPU's memory
management unit. When a subroutine is called, the return address is stashed
on th
Think of the OSA-ICC as an analog to TN3270 (with an enhancement for MCS
support). It speaks TCP/IP on one side and (MCS or LOCAL SNA) on the other.
As to how the data gets from "here to there, I cannot speak to the internals.
HTH,
Does anyone know how OSA-ICC devices (3270-X) are mapped in H
Walt Farrell wrote:
Perhaps, but I think DEL is just the IDCAMS DELETE command issued in a
different context, so it's not really a TSO enhancement :)
And, indeed, that is the case, as documented. But you have to read all
the way down to the 6th paragraph under Delete in the TSO/E Commands
You will have to use macro CELQEPLG that has the correct Member ID AL1(15).
Regards,
Philippe Leite
z/OS System Programmer
Banco Safra
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send email to lists...@li
W dniu 2016-06-10 o 13:23, linda golding pisze:
Thought to post this question as i couldn't find this information in any of
the IBM documentation .
Does anyone know how OSA-ICC devices (3270-X) are mapped in HSA ?
I did a search in our systems and see that OSA-ICC devices are concurrently
activ
On Thu, 9 Jun 2016 23:22:18 -0500, Edward Gould wrote:
>> On Jun 9, 2016, at 7:08 PM, Paul Gilmartin
>> <000433f07816-dmarc-requ...@listserv.ua.edu> wrote:
>>
>> On 2016-06-09 17:20, Lizette Koehler wrote:
>>> Cross posting to IBM Main and TSO-REXX
>>>
>>> I have just created this RFE, so
Thought to post this question as i couldn't find this information in any of
the IBM documentation .
Does anyone know how OSA-ICC devices (3270-X) are mapped in HSA ?
I did a search in our systems and see that OSA-ICC devices are concurrently
active on all LPARS of the sysplex . I also see that PC
I noticed that there is a libzz.a library in /usr/lpp/hzc/lib but the
include directory is empty. IBM have implemented three extra functions.
I'm guessing that the user is expected to roll their own function
prototypes for those and use the existing zlib header files. Is my
assumption correct?
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