The controller driver supports two types of DWC USB3 devices: with a
common interrupt lane and with individual interrupts for each mode. Add
support for both these cases to the DWC USB3 DT schema.
Signed-off-by: Serge Semin
Reviewed-by: Rob Herring
---
Changelog v2:
- Grammar fix: "s
The host controller device might be designed to work for the particular
products or applications. In that case its DT node is supposed to be
equipped with the tpl-support property.
Signed-off-by: Serge Semin
Reviewed-by: Rob Herring
---
Changelog v2:
- Grammar fix: "s/it'/its"
With minor peculiarities (like uploading some vendor-specific firmware)
these are just Generic xHCI controllers fully compatible with its
properties. Make sure the Renesas USB xHCI DT nodes are also validated
against the Generic xHCI DT schema.
Signed-off-by: Serge Semin
Reviewed-by: Rob Herring
Aside from the UTMI+ there are also ULPI, Serial and HSIC PHY types
that can be specified in the phy_type HCD property. Add them to the
enumeration of the acceptable values.
Signed-off-by: Serge Semin
Reviewed-by: Rob Herring
---
Changelog v2:
- Grammar fix: "s/PHY types can be/PHY
://lore.kernel.org/linux-usb/20201010224121.12672-16-sergey.se...@baikalelectronics.ru/
Signed-off-by: Serge Semin
Reviewed-by: Martin Blumenstingl
Reviewed-by: Neil Armstrong
Reviewed-by: Krzysztof Kozlowski
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1
Syonpsys IP cores are supposed to be defined with "snps" vendor-prefix.
Use it instead of the deprecated "synopsys" one.
Signed-off-by: Serge Semin
Reviewed-by: Krzysztof Kozlowski
---
arch/arm/boot/dts/keystone-k2e.dtsi | 2 +-
arch/arm/boot/dts/keystone.dtsi | 2 +-
On Tue, Dec 01, 2020 at 04:59:21PM +0800, luojiaxing wrote:
>
> On 2020/11/30 19:22, Andy Shevchenko wrote:
> > On Mon, Nov 30, 2020 at 05:36:19PM +0800, Luo Jiaxing wrote:
> > > The mask and unmask registers are not configured in dwapb_irq_enable() and
> > > dwapb_irq_disable(). In the following
Hi Wan,
On Sun, Dec 06, 2020 at 09:56:47AM +, Wan Mohamad, Wan Ahmad Zainie wrote:
> Hi Serge.
>
> > -Original Message-
> > From: Serge Semin
> > Sent: Saturday, December 5, 2020 11:24 PM
> > To: Nyman, Mathias ; Felipe Balbi
> > ; Krzysztof Kozlo
-by: kernel test robot
Signed-off-by: Serge Semin
Cc: Randy Dunlap
Cc: Ramil Zaripov
---
Mark, I see you haven't applied the previous version of the patch yet. So
please replace it with this one.
Randy, sorry for resending the patch. I've just realized that your
solution doesn't completely fix t
ically mapped ROM
support")
Link: https://lore.kernel.org/lkml/202011021254.xc70baqt-...@intel.com/
Signed-off-by: Serge Semin
Reported-by: kernel test robot
Cc: Alexey Malahov
Cc: Pavel Parkhomenko
---
Link: https://lore.kernel.org/lkml/20201120113929.0aff2...@canb.auug.org.au/
Chan
On Sat, Nov 21, 2020 at 06:42:28AM -0600, Rob Herring wrote:
> On Thu, Nov 12, 2020 at 01:29:46PM +0300, Serge Semin wrote:
> > On Wed, Nov 11, 2020 at 02:14:23PM -0600, Rob Herring wrote:
> > > On Wed, Nov 11, 2020 at 12:08:45PM +0300, Serge Semin wrote:
> > > >
On Mon, Nov 23, 2020 at 03:02:55PM +0800, Tian Tao wrote:
> fixed the coccicheck:
> drivers/spi/spi-dw-bt1.c:220:27-30: ERROR: Missing
> resource_size with mem.
Thanks, Tian!
Acked-by: Serge Semin
>
> Signed-off-by: Tian Tao
> ---
> drivers/spi/spi-dw-bt1.c | 2 +-
n the core SPI DW driver is to avoid presenting the mem_ops
> pointer if the exec_op function is not set.
Thanks for sending the patch fixing the regression.
Acked-by: Serge Semin
>
> Fixes: 6423207e57ea (spi: dw: Add memory operations support)
> Signed-off-by: Lars Povlsen
> ---
>
Hello Luo,
Thanks for fixing this. Definitely
Acked-by: Serge Semin
On Thu, Nov 26, 2020 at 03:16:31PM +0800, Luo Jiaxing wrote:
> Following Calltrace is found when running echo freeze > /sys/power/state.
>
> [ 272.755506] Unable to handle kernel NULL pointer dereference at virtua
, and don't define them
otherwise, so to let the corresponding drivers to use the non-atomic
q-suffixed accessors.
Signed-off-by: Serge Semin
Suggested-by: Arnd Bergmann
Cc: Vadim V. Vlasov
---
arch/mips/include/asm/io.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips
Hello Peter,
On Sun, Jun 09, 2019 at 09:34:54PM +, Peter Rosin wrote:
> On 2019-04-26 01:20, Serge Semin wrote:
> > The GPIOs request loop can be safely moved to a separate function.
> > First of all it shall improve the code readability. Secondly the
> > initializati
: mux/i801: Switch to use descriptor passing")
Cc: Mika Westerberg
Cc: Andy Shevchenko
Cc: Peter Rosin
Cc: Jean Delvare
Cc: Linus Walleij
Signed-off-by: Serge Semin
---
drivers/i2c/busses/i2c-i801.c| 2 +-
drivers/i2c/muxes/i2c-mux-gpio.c | 10 +-
2 files changed, 6 inser
On Fri, Jun 14, 2019 at 06:04:33PM +, Peter Rosin wrote:
> On 2019-06-14 18:31, Serge Semin wrote:
> > Hello Peter,
> >
> > On Sun, Jun 09, 2019 at 09:34:54PM +, Peter Rosin wrote:
> >> On 2019-04-26 01:20, Serge Semin wrote:
> >>> The GPIOs requ
Hello Ding,
Thanks for the patch. My comments are below.
On Sat, Aug 22, 2020 at 12:27:53PM +0800, Ding Tianhong wrote:
> The hisilicon ascend soc's gpio is based on the synopsys DW gpio,
> and expand the register to support for INTCOMB_MASK, the new
> register is used to enable/disable the
On Wed, Aug 19, 2020 at 10:43:51AM +0800, Wang Hai wrote:
> Remove linux/clk.h which is included more than once
>
> Reported-by: Hulk Robot
> Signed-off-by: Wang Hai
Thanks!
Acked-by: Serge Semin
> ---
> drivers/bus/bt1-apb.c | 1 -
> 1 file changed, 1 deletion(-)
>
Hello Andrew.
On Fri, Sep 18, 2020 at 03:54:03PM +0200, Andrew Lunn wrote:
> On Fri, Sep 18, 2020 at 06:55:16AM +, 劉偉權 wrote:
> > Hi Serge,
>
> > Thanks for your reply. There is a confidential issue that realtek
> > doesn't offer the detail of a full register layout for configuration
> >
On Fri, Sep 25, 2020 at 11:54:20AM +0800, Jiaxun Yang wrote:
>
>
> 在 2020/9/20 19:00, Serge Semin 写道:
> > In accordance with [1, 2] memory transactions using CCA=2 (Uncached
> > Cacheability and Coherency Attribute) are always strongly ordered. This
> > means the yo
ial: 8250_dw: Fix common clocks usage race condition")
Fixes: 868f3ee6e452 ("serial: 8250: Add 8250 port clock update method")
Reported-by: Hans de Goede
Signed-off-by: Serge Semin
Cc: Alexey Malahov
Cc: Pavel Parkhomenko
Cc: Andy Shevchenko
Cc: Maxime Ripard
Cc: Will Deacon
Cc:
8250: Add 8250 port clock update method")
Signed-off-by: Serge Semin
---
drivers/tty/serial/8250/8250_port.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_port.c
b/drivers/tty/serial/8250/8250_port.c
index c71d647eb87a..1259fb6b66b3 100644
--- a/drivers/
Signed-off-by: Serge Semin
---
drivers/tty/serial/8250/8250_port.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_port.c
b/drivers/tty/serial/8250/8250_port.c
index 1259fb6b66b3..b0af13074cd3 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/
Hans de Goede
Signed-off-by: Serge Semin
---
drivers/tty/serial/8250/8250_dw.c | 54 +++
1 file changed, 19 insertions(+), 35 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_dw.c
b/drivers/tty/serial/8250/8250_dw.c
index 87f450b7c177..9e204f9b799a 100644
--- a/drivers/
On Mon, Oct 12, 2020 at 05:41:50PM +0200, Greg Kroah-Hartman wrote:
> On Sun, Oct 11, 2020 at 08:53:33PM +0300, Serge Semin wrote:
> > On Sun, Oct 11, 2020 at 04:42:36PM +0200, Greg Kroah-Hartman wrote:
> > > On Sun, Oct 11, 2020 at 01:41:05AM +0300, Serge Semin wrote:
On Tue, Oct 13, 2020 at 07:14:41AM -0500, Rob Herring wrote:
> On Sun, Oct 11, 2020 at 01:41:04AM +0300, Serge Semin wrote:
> > The generic USB HCD properties have been described in the legacy bindings
> > text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
> >
On Tue, Oct 13, 2020 at 07:30:04AM -0500, Rob Herring wrote:
> On Sun, Oct 11, 2020 at 01:41:10AM +0300, Serge Semin wrote:
> > Currently the DT bindings of Generic xHCI Controllers are described by means
> > of the legacy text file. Since such format is deprecated in favor of th
On Tue, Oct 13, 2020 at 07:36:24AM -0500, Rob Herring wrote:
> On Sun, Oct 11, 2020 at 01:41:13AM +0300, Serge Semin wrote:
> > DWC USB3 DT node is supposed to be compliant with the Generic xHCI
> > Controller schema, but with additional vendor-specific properties, the
> >
On Tue, Oct 13, 2020 at 07:38:59AM -0500, Rob Herring wrote:
> On Sun, Oct 11, 2020 at 01:41:17AM +0300, Serge Semin wrote:
> > In accordance with the IP core databook the
> > snps,quirk-frame-length-adjustment property can be set within [0, 0x3F].
> > Let's make sure
On Tue, Oct 13, 2020 at 07:42:03AM -0500, Rob Herring wrote:
> On Sun, Oct 11, 2020 at 01:41:19AM +0300, Serge Semin wrote:
> > Amlogic G12A USB DT sub-nodes are supposed to be compatible with the
> > generic DWC USB2 and USB3 devices. Since now we've got DT schemas for
> >
In accordance with the IP core databook the
snps,quirk-frame-length-adjustment property can be set within [0, 0x3F].
Let's make sure the DT schema applies a correct restriction on the
property.
Signed-off-by: Serge Semin
---
Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 2 ++
1 file
opsys,
Inc. is presented with just "snps" vendor prefix.
Signed-off-by: Serge Semin
---
Changelog v2:
- Drop quotes from around the compat string constant.
---
Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Docu
the DWC USB3 nodes are also validated against the
usb-xhci.yaml schema.
Note we have to discard the nodename restriction of being prefixed with
"dwc3@" string, since in accordance with the usb-hcd.yaml schema USB nodes
are supposed to be named as "^usb(@.*)".
Signed-off-by: Serge Se
,
single interrupts source, and is supposed to optionally contain up to two
reference clocks for the controller core and CSRs.
Signed-off-by: Serge Semin
---
Changelog v2:
- Add explicit "additionalProperties: true" to the usb-xhci.yaml schema,
since additionalProperties/unevaluated
TI Keystone DWC3 compatible DT node is supposed to have a DWC USB3
compatible sub-node to describe a fully functioning USB interface.
Since DWC USB3 has now got a DT schema describing its DT node, let's make
sure the TI Keystone DWC3 sub-node passes validation against it.
Signed-off-by: Serge
Aside from the UTMI+ there are also ULPI, Serial and HSIC PHY types
that can be specified in the phy_type HCD property. Add them to the
enumeration of the acceptable values.
Signed-off-by: Serge Semin
---
Changelog v2:
- Grammar fix: "s/PHY types can be/PHY types that can be"
- D
The generic USB HCD properties have been described in the legacy bindings
text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
convert it' content into the USB HCD DT schema properties so all USB DT
nodes would be validated to have them properly utilized.
Signed-off-by: Serge
The host controller device might be designed to work for the particular
products or applications. In that case its DT node is supposed to be
equipped with the tpl-support property.
Signed-off-by: Serge Semin
---
Changelog v2:
- Grammar fix: "s/it'/its"
- Discard '|' from th
With minor peculiarities (like uploading some vendor-specific firmware)
these are just Generic xHCI controllers fully compatible with its
properties. Make sure the Renesas USB xHCI DT nodes are also validated
against the Generic xHCI DT schema.
Signed-off-by: Serge Semin
---
Documentation
The controller driver supports two types of DWC USB3 devices: with a
common interrupt lane and with individual interrupts for each mode. Add
support for both these cases to the DWC USB3 DT schema.
Signed-off-by: Serge Semin
---
Changelog v2:
- Grammar fix: "s/both of these cases su
In accordance with the driver comments the PIPE3 de-emphasis can be tuned
to be either -6dB, -2.5dB or disabled. Let's add the de-emphasis
property restriction so the DT schema would make sure the controller DT
node is equipped with correct value.
Signed-off-by: Serge Semin
---
Changelog v2
compatible names.
Signed-off-by: Serge Semin
---
Please, test the patch out to make sure it doesn't brake the dependent DTS
files. I did only a manual grepping of the possible nodes dependencies.
---
arch/arm/boot/dts/bcm5301x.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-cp11
d in
the generic USB HCD binding file so it would be validated against the
nodes in which it's specified. Mark the property as deprecated to
discourage the developers from using it.
Signed-off-by: Serge Semin
---
Changelog v2:
- Discard '|' from the property description, since we don't need to
.
Link:
https://lore.kernel.org/linux-usb/20201010224121.12672-16-sergey.se...@baikalelectronics.ru/
Signed-off-by: Serge Semin
Acked-by: Neil Armstrong
---
Note the same problem is in the DT source file
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi .
---
.../devicetree/bindings/usb/amlogic
For some reason the "brcm,xhci-brcm-v2" compatible string has been missing
in the original bindings file. Add it to the Generic xHCI Controllers DT
schema since the controller driver expects it to be supported.
Signed-off-by: Serge Semin
---
Documentation/devicetree/bindings/u
nodes name
[PATCH 19/20] arch: dts: Fix xHCI DT nodes name
[PATCH 20/20] arch: dts: Fix DWC USB3 DT nodes name
Signed-off-by: Serge Semin
Cc: Alexey Malahov
Cc: Pavel Parkhomenko
Cc: Andy Gross
Cc: Bjorn Andersson
Cc: Manu Gautam
Cc: Roger Quadros
Cc: Lad Prabhakar
Cc: Yoshihiro Sh
Amlogic G12A USB DT sub-nodes are supposed to be compatible with the
generic DWC USB2 and USB3 devices. Since now we've got DT schemas for
both of the later IP cores let's make sure that the Amlogic G12A USB
DT nodes are fully evaluated including the DWC sub-nodes.
Signed-off-by: Serge Semin
es names of
arch/arm64/boot/dts/apm/{apm-storm.dtsi,apm-shadowcat.dtsi} since the
in-source comment says that the nodes name need to be preserved as
"^dwusb@.*" for some backward compatibility.
Signed-off-by: Serge Semin
---
Please, test the patch out to make sure it doesn't brake the
to be named as generic
USB HCD ("^usb(@.*)?") one we have to accordingly fix the sub-nodes name
regexp and fix the DT node example.
Signed-off-by: Serge Semin
---
Changelog v2:
- Discard the "^dwc3@[0-9a-f]+$" nodes from being acceptable as sub-nodes.
---
Documentation/devicetr
compatible names.
Signed-off-by: Serge Semin
---
Please, test the patch out to make sure it doesn't brake the dependent DTS
files. I did only a manual grepping of the possible nodes dependencies.
---
arch/arc/boot/dts/axs10x_mb.dtsi | 4 ++--
arch/arc/boot/dts/hsdk.dts
There are only four OTG revisions are currently supported by the kernel:
0x0100, 0x0120, 0x0130, 0x0200. Any another value is considered as
invalid.
Signed-off-by: Serge Semin
---
Documentation/devicetree/bindings/usb/usb-hcd.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
On Wed, Feb 03, 2021 at 10:06:46AM +0100, Greg Kroah-Hartman wrote:
> On Tue, Feb 02, 2021 at 05:02:08PM -0600, Bjorn Andersson wrote:
> > On Sat 05 Dec 09:56 CST 2020, Serge Semin wrote:
> >
> > > In accordance with the USB HCD/DRD schema all the USB controllers are
&
, Serge Semin wrote:
> There is a single register provided by the SoC system controller,
> which can be used to tune the L2-cache RAM up. It only provides a way
> to change the L2-RAM access latencies. So aside from "be,bt1-l2-ctl"
> compatible string the device node can
On Thu, May 14, 2020 at 02:13:18PM -0500, Rob Herring wrote:
> On Thu, May 07, 2020 at 01:22:57AM +0300, Serge Semin wrote:
> > Baikal-T1 Clocks Control Unit is responsible for transformation of a
> > signal coming from an external oscillator into clocks of various
> > fre
On Tue, May 19, 2020 at 05:42:13PM +0200, Thomas Bogendoerfer wrote:
> On Wed, May 06, 2020 at 08:42:30PM +0300, sergey.se...@baikalelectronics.ru
> wrote:
> > From: Serge Semin
> >
> > When XPA mode is enabled the normally 32-bits MAAR pair registers
> > are e
On Tue, May 19, 2020 at 05:50:53PM +0200, Thomas Bogendoerfer wrote:
> On Mon, May 18, 2020 at 11:57:52PM +0300, Serge Semin wrote:
> > On Mon, May 18, 2020 at 06:32:06PM +0200, Thomas Bogendoerfer wrote:
> > > On Mon, May 18, 2020 at 04:48:20PM +0300, Serge Semin wrote:
>
On Tue, May 19, 2020 at 05:50:53PM +0200, Thomas Bogendoerfer wrote:
> On Mon, May 18, 2020 at 11:57:52PM +0300, Serge Semin wrote:
> > On Mon, May 18, 2020 at 06:32:06PM +0200, Thomas Bogendoerfer wrote:
> > > On Mon, May 18, 2020 at 04:48:20PM +0300, Serge Semin wrote:
>
On Wed, May 20, 2020 at 03:12:02PM +0300, Serge Semin wrote:
> On Tue, May 19, 2020 at 05:50:53PM +0200, Thomas Bogendoerfer wrote:
> > On Mon, May 18, 2020 at 11:57:52PM +0300, Serge Semin wrote:
> > > On Mon, May 18, 2020 at 06:32:06PM +0200, Thomas Bogendoerfer wrote:
>
On Wed, May 20, 2020 at 03:38:27PM +0200, Thomas Bogendoerfer wrote:
> On Wed, May 20, 2020 at 03:12:01PM +0300, Serge Semin wrote:
> > Since you don't like the way I initially fixed it, suppose there we don't
> > have
> > another way but to introduce something like CONFIG_M
On Wed, May 20, 2020 at 02:59:27PM +0300, Serge Semin wrote:
> On Tue, May 19, 2020 at 05:50:53PM +0200, Thomas Bogendoerfer wrote:
> > On Mon, May 18, 2020 at 11:57:52PM +0300, Serge Semin wrote:
> > > On Mon, May 18, 2020 at 06:32:06PM +0200, Thomas Bogendoerfer wrote:
>
On Wed, May 27, 2020 at 04:36:56PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 03:25:25PM +0300, Serge Semin wrote:
> > Recently the I2C-controllers slave interface support was added to the
> > kernel I2C subsystem. In this case Linux can be used as, for example,
&
-bit address is expected in the "reg"-property.
If I2C_TEN_BIT_ADDRESS is set, then the 10-bit address check will be
performed. The I2C_OWN_SLAVE_ADDRESS flag will be just ignored.
[1] kernel/Documentation/i2c/slave-interface.rst
[2] kernel/include/dt-bindings/i2c/i2c.h
Signed-off-by: Serge Semin
Cc: Alexe
On Wed, May 27, 2020 at 04:42:20PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 03:01:06PM +0300, Serge Semin wrote:
> > Currently Intel Baytrail I2C semaphore is a feature of the DW APB I2C
> > platform driver. It's a bit confusing to see it's config in the menu at
>
On Wed, May 27, 2020 at 04:43:39PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 03:01:07PM +0300, Serge Semin wrote:
> > A PM workaround activated by the flag MODEL_CHERRYTRAIL has been removed
> > since commit 9cbeeca05049 ("i2c: designware: Remove Cherry Tr
On Wed, May 27, 2020 at 04:50:23PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 03:01:08PM +0300, Serge Semin wrote:
> > Seeing the DW I2C driver is using flags-based accessors with two
> > conditional clauses it would be better to replace them with the regmap
>
On Wed, May 27, 2020 at 04:58:01PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 03:01:10PM +0300, Serge Semin wrote:
> > This is a preparation patch before adding a quirk with custom registers
> > map creation required for the Baikal-T1 System I2C support.
>
> L
On Wed, May 27, 2020 at 05:03:03PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 03:01:11PM +0300, Serge Semin wrote:
> > Baikal-T1 System Controller is equipped with a dedicated I2C Controller
> > which functionality is based on the DW APB I2C IP-core, the only
> >
I2C controller or with Microsemi Ocelot SoC I2C
one, to have registers, interrupts and clocks properties. In addition
the node may have clock-frequency, i2c-sda-hold-time-ns,
i2c-scl-falling-time-ns and i2c-sda-falling-time-ns optional properties.
Signed-off-by: Serge Semin
Reviewed-by: Rob Herring
it with "depends on I2C_DESIGNWARE_PLATFORM" statement. By doing so the
config menu will display the feature right below the DW I2C platform
driver item and will indent it to the right so signifying its belonging.
Signed-off-by: Serge Semin
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
nce it must be merged in to the dtc upstream repository.
Link:
https://lore.kernel.org/linux-i2c/20200527120111.5781-1-sergey.se...@baikalelectronics.ru
Changelog v5:
- Replace or-assignment with just assignment operator when getting
the quirk flags.
- Keep alphabetical order of the include statements.
- Di
we can
discard the ifeq construction in favor to the more natural and less bulky
`-$(CONFIG_X) += x.o`
Signed-off-by: Serge Semin
Acked-by: Jarkko Nikula
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Andy Shevchenko
Cc: Mika Westerberg
Cc: Rob Herring
Cc: linux-m...@vger.kernel.o
2/i2c@112/eeprom@64:reg: I2C address must
be less than 10-bits, got "0x4064"
In order to silence dtc up let's discard the flag from the DW I2C DT
binding example for now. Just revert this commit when dtc is fixed.
Signed-off-by: Serge Semin
Cc: Alexey Malahov
Cc: Thomas Bog
Add the "baikal,bt1-sys-i2c" compatible string to the DW I2C binding. Even
though the corresponding node is supposed to be a child of the Baikal-T1
System Controller, its reg property is left required for compatibility.
Signed-off-by: Serge Semin
Cc: Alexey Malahov
Cc: Thomas Bogend
let's retrieve the model flags right after the DW I2C private
data is created. While at it replace the or-assignment with just
assignment operator since or-ing is redundant at this stage.
Signed-off-by: Serge Semin
Reviewed-by: Andy Shevchenko
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Rob
stage. The rest of the code won't do this because basically we have
MMIO-based regmap so non of the read/write methods can fail (this also
won't be needed for the Baikal-T1-specific I2C controller).
Suggested-by: Andy Shevchenko
Signed-off-by: Serge Semin
Tested-by: Jarkko Nikula
Acked
This is a preparation patch before adding a quirk with custom registers
map creation required for the Baikal-T1 System I2C support.
Signed-off-by: Serge Semin
Reviewed-by: Andy Shevchenko
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Rob Herring
Cc: linux-m...@vger.kernel.org
Cc: devicet
SCC_OCELOT is
the only model-flag left, redefine it to be 0x100 so setting a very first
bit in the MODEL_MASK bits range.
Signed-off-by: Serge Semin
Acked-by: Jarkko Nikula
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Rob Herring
Cc: linux-m...@vger.kernel.org
Cc: devicet...@vger.kernel.org
---
Ch
I
versions of the IP core, but it still depends on the DW I2C core
functionality and must be available only if the last one is enabled.
So make sure the DW APB I2C slave config is only available if the
I2C_DESIGNWARE_CORE config is enabled.
Signed-off-by: Serge Semin
Acked-by: Jarkko Nikula
Cc: Alex
-by: Serge Semin
Reviewed-by: Andy Shevchenko
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Rob Herring
Cc: linux-m...@vger.kernel.org
Cc: devicet...@vger.kernel.org
---
Changelog v3:
- This is a new patch, which has been created due to declining the
glue-layer approach.
Changelog v4:
- Use
Rob,
Could you pay attention to this patch? The patchset review procedure is
nearly over, while the DT part is only partly reviewed by you.
Thanks
-Sergey
On Wed, May 27, 2020 at 06:30:37PM +0300, Serge Semin wrote:
> dtc currently doesn't support I2C_OWN_SLAVE_ADDRESS flag set in the
> i2
Rob,
Could you please pay attention to this patch? The patchset review procedure
is nearly over, while the DT part is only partly reviewed by you.
Thanks
-Sergey
On Wed, May 27, 2020 at 06:30:38PM +0300, Serge Semin wrote:
> Add the "baikal,bt1-sys-i2c" compatible string to the D
On Wed, May 27, 2020 at 06:46:32PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 05:24:06PM +0300, Serge Semin wrote:
> > On Wed, May 27, 2020 at 04:42:20PM +0300, Andy Shevchenko wrote:
> > > On Wed, May 27, 2020 at 03:01:06PM +0300, Serge Semin wrote:
> > >
On Wed, May 27, 2020 at 06:55:33PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 06:30:41PM +0300, Serge Semin wrote:
> > Currently Intel Baytrail I2C semaphore is a feature of the DW APB I2C
> > platform driver. It's a bit confusing to see it's config in the menu at
>
On Wed, May 27, 2020 at 06:57:25PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 06:30:42PM +0300, Serge Semin wrote:
> > A PM workaround activated by the flag MODEL_CHERRYTRAIL has been removed
> > since commit 9cbeeca05049 ("i2c: designware: Remove Cherry Tr
On Wed, May 27, 2020 at 07:03:37PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 06:30:43PM +0300, Serge Semin wrote:
> > Seeing the DW I2C driver is using flags-based accessors with two
> > conditional clauses it would be better to replace them with the regmap
>
On Wed, May 27, 2020 at 07:05:44PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 06:30:46PM +0300, Serge Semin wrote:
> > Baikal-T1 System Controller is equipped with a dedicated I2C Controller
> > which functionality is based on the DW APB I2C IP-core, the only
> >
On Wed, May 27, 2020 at 07:08:47PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 06:30:35PM +0300, Serge Semin wrote:
> > Jarkko, Wolfram, the merge window is upon us, please review/merge
> > in/whatever
> > the patchset.
> >
> > Initially this has bee
On Wed, May 27, 2020 at 09:25:49AM -0700, Guenter Roeck wrote:
> On Tue, May 26, 2020 at 04:38:23PM +0300, Serge Semin wrote:
[nip]
> > +
> > +=== ===
> > ===
> > +Name
On Wed, May 27, 2020 at 09:58:00AM -0700, Guenter Roeck wrote:
> On 5/27/20 9:52 AM, Serge Semin wrote:
> > On Wed, May 27, 2020 at 09:25:49AM -0700, Guenter Roeck wrote:
> >> On Tue, May 26, 2020 at 04:38:23PM +0300, Serge Semin wr
On Wed, May 27, 2020 at 11:12:04AM -0600, Rob Herring wrote:
> On Wed, May 27, 2020 at 03:01:02PM +0300, Serge Semin wrote:
> > dtc currently doesn't support I2C_OWN_SLAVE_ADDRESS flag set in the
> > i2c "reg" property. If it is the compiler will print a warning:
>
On Thu, May 28, 2020 at 09:03:11AM +0200, Sebastian Reichel wrote:
> Hi,
>
> On Tue, May 26, 2020 at 04:50:59PM +0300, Serge Semin wrote:
> > This is a small patchset about tuning the syscon infrastructure a bit.
> > As it's going to be general in the framework of the
On Wed, May 27, 2020 at 08:56:24PM +0300, Andy Shevchenko wrote:
> On Wed, May 27, 2020 at 08:18:41PM +0300, Serge Semin wrote:
> > On Wed, May 27, 2020 at 11:12:04AM -0600, Rob Herring wrote:
> > > On Wed, May 27, 2020 at 03:01:02PM +0300, Serge Semin wrote:
> > > >
ring
the I2C_OWN_SLAVE_ADDRESS bit in the reg property and converting the
sub-node to be compatible with normal EEPROM like "atmel,24c02".
Just revert this commit when dtc is fixed.
Signed-off-by: Serge Semin
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Andy Shevchenko
Cc: Mika We
I2C controller or with Microsemi Ocelot SoC I2C
one, to have registers, interrupts and clocks properties. In addition
the node may have clock-frequency, i2c-sda-hold-time-ns,
i2c-scl-falling-time-ns and i2c-sda-falling-time-ns optional properties.
Signed-off-by: Serge Semin
Reviewed-by: Rob Herring
This is a preparation patch before adding a quirk with custom registers
map creation required for the Baikal-T1 System I2C support.
Signed-off-by: Serge Semin
Reviewed-by: Andy Shevchenko
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Rob Herring
Cc: linux-m...@vger.kernel.org
Cc: devicet
stage. The rest of the code won't do this because basically we have
MMIO-based regmap so non of the read/write methods can fail (this also
won't be needed for the Baikal-T1-specific I2C controller).
Suggested-by: Andy Shevchenko
Signed-off-by: Serge Semin
Tested-by: Jarkko Nikula
Acked
-by: Serge Semin
Reviewed-by: Andy Shevchenko
Cc: Alexey Malahov
Cc: Thomas Bogendoerfer
Cc: Rob Herring
Cc: linux-m...@vger.kernel.org
Cc: devicet...@vger.kernel.org
---
Changelog v3:
- This is a new patch, which has been created due to declining the
glue-layer approach.
Changelog v4:
- Use
I
versions of the IP core, but it still depends on the DW I2C core
functionality and must be available only if the last one is enabled.
So make sure the DW APB I2C slave config is only available if the
I2C_DESIGNWARE_CORE config is enabled.
Signed-off-by: Serge Semin
Acked-by: Jarkko Nikula
Cc: Alex
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