The better ones use optically contacted crystals to avoid browning of the
adhesive due to the high power densities of the 1064nm laser required for
efficient frequency doubling.
Brue
> On 11 June 2018 at 22:52 Dana Whitlow wrote:
>
>
> Mark's description about how (most) green laser pointers
PPLN (Periodically poled lithium Niobate) is the frequency doubler of choice
for such applications however it needs to operated in a temperature regulated
oven.
To achieve efficient frequency doubling the input light needs to remain in sync
with the frequency doubled output light as they propag
The output wavelength of a VCSEL is current and temperature dependent so using
a low noise current source and regulating the chip temperature is usually
necessary to allow locking to an atomic transition.
Most VCSELS for such applications include a peltier module within the housing.
Bruce
> On
Theres also
http://www.photonics.philips.com/application-areas/sensing/components
and
https://www.sacher-laser.com/home/industriallasers/point_and_line_laser_module/industrial_laser_modules/micron_laser.html
Bruce
> On 09 June 2018 at 20:54 mimitech mimitech wrote:
>
>
> Thanks Attila for you
00 ft. It's
> just that I don't know how bad the
> multimode dispersion problem would be when using shorter wavelengths, and
> I'm sure not equipped to
> make any measurements at home now that I'm retired and far away from the
> observatory.
>
> Dana
Even with single mode fiber its finite group delay dispersion will likely
restrict the usable light source bandwidth.
Bruce
> On 13 May 2018 at 03:38 Dana Whitlow wrote:
>
>
> It may be that a nicely-written request to Corning could yield the loan of
> a big spool of fiber
> for the duration
Like this so called star target?:
https://www.edmundoptics.com/test-targets/resolution-test-targets/1-black-1-white-glass-star-target-5deg-wedge-pair-angle/
Bruce
> On 13 May 2018 at 02:45 Bob kb8tq wrote:
>
>
> Hi
>
>
>
> > On May 12, 2018, at 7:01 AM, jimlux wrote:
> >
> > On 5/11/18 9:0
Thus a DDMTD using NB7V52's as the mixers should have useful performance
Bruce
> On 14 April 2018 at 03:54 John Larkin wrote:
>
>
> If you walk the differential data and clock inputs of an NB7V52 CML
> flipflop across one another in time, the equivalent jitter is below 20
> fs RMS. That's w
Its more accurate and has less measurement noise than the SR620.
The input bandwidth is also greater.
The accuracy is no better than that of a modern TDC chip, however its
measurement noise is lower.
Bruce
>
> On 11 April 2018 at 07:17 Gerhard Hoffmann wrote:
>
> I have been offered
Just use a standard attenuator between a pair of bias T's with their dc ports
connected together.
Bruce
>
> On 02 April 2018 at 10:29 Azelio Boriani wrote:
>
> An unusual attenuator with a DC pass.
>
> On Sun, Apr 1, 2018 at 10:21 PM, David C. Partridge
>
> wrote:
>
>
I have a quad LT3042 board somewhere.
I should get around to measuring its output noise.
Bruce
> On 20 March 2018 at 03:11 John Ackermann N8UR wrote:
>
>
> Thanks, all. I think I'll end up using the 3042 with pass transistor,
> partly for reasons of cost. I have no idea whether paralleling
The details are on the LT3042 datasheet.
A small series ballast resistor is used in series with each output and the Iref
terminals are connected in parallel so only the offset of the unity gain output
buffer is of significance.
Bruce
>
> On 20 March 2018 at 02:23 Peter Vince wrote:
>
>
Use an LT3045, its the 0.5A version of the LT3042.
Bruce
> On 19 March 2018 at 09:13 John Ackermann N8UR wrote:
>
>
> Reviving the conversation about superb voltage regulators, I am looking
> for one to run the analog and PLL bits of a high performance frequency
> synthesizer chip.
>
> The c
See final pages in:
http://www.hparchive.com/Manuals/HP-10811AB-Manual.pdf
The 60111 variant is a lower spec version intended for use in counters.
Bruce
>
> On 07 March 2018 at 17:50 Perry Sandeen via time-nuts
> wrote:
>
> List,
> When perusing HP xtal oscillators on ebay I not
ature hybrid to split the test source instead of a standard splitter. The
output of the phase detector is low pass filtered and amplified and fed to a
high resolution ADC such as a sound card.
Bruce
>
> On 05 March 2018 at 13:59 Hal Murray wrote:
>
> Bruc
encies.
>
> Cheers
> Leo
>
> On 4 Mar 2018, at 10:20, Bruce Griffiths wrote:
>
> > >
> > Somewhat worse than an LTC6957 particularly at low offset
> > frequencies.
> >
> > Either that or the manufac
Somewhat worse than an LTC6957 particularly at low offset frequencies.
Either that or the manufacturers PN noise measurement method doesn't work well
at low offsets.
Bruce
>
> On 04 March 2018 at 22:34 Leo Bodnar wrote:
>
> Ulf,
>
> What level of jitter would you consider accept
External cavity lasers with piezoelectric tuning (usually varies cavity length
or tilts frequency selective grating) are usually used for such applications.
Sacher laser do some compact units with integrated Peltier cooler etc:
https://www.sacher-laser.com/home/industrial-lasers/point_and_line_l
Monitoring the output frequency whilst the oven "heats" up may give additional
clues as will monitoring the heater current.
Bruce
>
> On 04 March 2018 at 16:12 Tom Holmes wrote:
>
> Bob...
>
> Interesting point about the heater not working vs the XTAL having drifted
> too far. M
These devices are only suitable for driving source terminated 50 ohm
transmission lines not a 50 ohm load to ground (or even 1/2Vcc) to produce CMOS
levels at the load.
If you are driving a low pass filter or similar intending to produce a sinewave
output then its somewhat easier.
Even paralle
.
Bruce
> On 04 March 2018 at 10:56 Bruce Griffiths wrote:
>
>
> Hystersis (exhibited by 74xx14 devices) results in AM to PM conversion which
> increases as the amount of hysteresis increases.
>
>
> Bruce
>
> >
> > On 04 March 2018 at 10:34 Bruce Grif
Hystersis (exhibited by 74xx14 devices) results in AM to PM conversion which
increases as the amount of hysteresis increases.
Bruce
>
> On 04 March 2018 at 10:34 Bruce Griffiths
> wrote:
>
> Ideally one should use a Collins style optimised cascade of increasing
Ideally one should use a Collins style optimised cascade of increasing
bandwidth and gain limiting stages. The LTC6957 with its selectable input stage
bandwidth has a performance that is comparable with the Holzworth sine to CMOS
"amplifier" which is better than any comparator by itself. If the
approach
> is not very fast…..
>
> Bob
>
>
> > > On Feb 3, 2018, at 8:15 PM, Bruce Griffiths
> mailto:bruce.griffi...@xtra.co.nz > wrote:
> >
> >
> > Fluid jet polishing perhaps?
> >
> > At
Fluid jet polishing perhaps?
At least on fused quartz and optical glass there is no associated subsurface
damage.
Bruce
>
> On 04 February 2018 at 14:05 Bob kb8tq wrote:
>
> Hi
>
> If you try “normal” machining techniques on a resonator, you are very
> likely to create micro
At least one model used a comparatively noisy wideband unity gain analog buffer
IC.
Without the buffer the OCXO PN was is lower.
Bruce
> On 31 January 2018 at 12:41 Chris Caudle wrote:
>
>
> > What are the markings of the devices close to the BNC connector?
>
> Just a guess based on some pre
http://www.chronos.co.uk/files/pdfs/mic/3120a.pdf
Bruce
>
> On 28 January 2018 at 11:57 "Dr. Ulrich L. Rohde via time-nuts"
> wrote:
>
> What are the specs ? 73 de N1UL
>
> Sent from my iPhone
>
> > >
> > On Jan 27, 2018, at 5:38 PM, John Miles wrote:
> >
> >
I wonder what the timing jitter is like.
It may be useful to measure it along with its additive PN.
Bruce
>
> On 22 January 2018 at 07:31 Robert LaJeunesse wrote:
>
> How about using a single 8-pin DIP IC that is under $2.50? The Microchip
> MIC4422AYN "gate driver" takes a 3.3V sign
An npn emitter follower with collector connected to the 10V supply will produce
a 4.2V swing in a 50 ohm load.
However it only works well if reflections from the load are small.
Otherwise, assuming that you want a 0-5V signal at the 50 ohm load its
possible to build a back matched driver using
et to +22 dbm … shame on you. If the part can do
> well over +7 to
> +13 dbm, that will cover the vast majority of the 10 MHz oscillators /
> signal sources out there.
>
> Bob
>
> > >
> > On Jan 19, 2018, at 8:51 PM, Bruce Griffiths
> &
.
>
> None of this is to say you *should* hit the diodes. No matter what sort they
> are, the performance will
> degrade a bit when you do. How much is of course a “that depends”. Most of us
> are not driving the
> gate with a -180 dbc/Hz source and expecting -1
5% or somewhat looser tolerance should be
suffice.
Bruce
>
> On 20 January 2018 at 14:14 Bruce Griffiths
> wrote:
>
> Something like the attached circuit is suitable for driving the MCU clock
> input directly.
> The diodes should be schottky signal diodes l
Something like the attached circuit is suitable for driving the MCU clock
input directly.
The diodes should be schottky signal diodes like the 1N5711 series. The series
resistors limit the diode peak current and the CLK input protection network
current. It should work with inputs from 1V pp to
A fast DIP comparator such as an LT1016 should work but it won't perform well
without an effective ground plane.
If a CMOS gate is used then a low Q LC impedance step up network or equivalent
will be needed to increase the signal swing at the gate input. Add a couple of
schottky diode clamps fo
Now, if one added an optional TTL threshold 5V CMOS single gate inverter/buffer
to produce 5V output when required and added an SMT 5V->3.3V regulator and
mounted it all on a small PCB with pins to make it DIP compatible that would
meet the brief and then some.
Otherwise an SMT (not many DIP on
Tom
What's the input signal amplitude?
What's the desired output signal (eg 5V CMOS, 3.3V CMOS etc)?
Bruce
> On 20 January 2018 at 08:31 Tom Van Baak wrote:
>
>
> John's TADD-2-mini [1] uses the Wenzel sine-to-square converter. It performs
> very well but requires +10 V.
>
> I'm looking for a
Yes, but the PN noise (outside the PLL bandwidth) will be much higher than with
a classical multiplier.
Bruce
>
> On 09 January 2018 at 02:14 Chris Wilson wrote:
>
> Hello Bruce, Sorry, this went to you direct as well, in error.
>
> Thanks for the very fast reply! Would it be pos
Divide the 10MHz by 2 and use a filter to extract the fifth harmonic from the
5MHz square wave output.
Amplify the 25MHz output from the filter if required...
Bruce
>
> On 09 January 2018 at 00:31 Chris Wilson wrote:
>
> 08/01/2018 11:28
>
> Is there an easy way to get 25 or 27
It was not my intent to suggest that Perry should continue the work using Latex.
I was merely considering the most effective and efficient way to complete this
undertaking, whoever elects to pick it up.
The original is written in English so an extensive knowledge of French isn't
required.
At 6
Using Latex for the typesetting is probably the optimum solution for a
Technical/Scientific publiication such as this.
Most such publications are typeset using Latex these days.
If one is familiar with Latex the odd typo when typesetting an equation (for
example) can make it blatantly obvious t
An optional ressistor in series with gate output would be nice for reducing
aberrations seen at a high impedance load at the end of a piece of 50 ohm coax.
Bruce
>
> On 24 December 2017 at 13:18 Bob kb8tq wrote:
>
> Hi
>
> There’s a lot of debate out there about that.
>
> Wh
However the dimensions of the coil former vary with moisture content.
Impregnation with waxes and other organic materials merely serves to slow down
the rate of absorption and doesn't prevent it.
Bruce
> On 28 November 2017 at 12:36 Poul-Henning Kamp wrote:
>
>
>
> In message <2b66d68
What is the effect of the C-field coil dimension tempco?
At some point this will surely dominate overthe coil current tempco.
Bruce
>
> On 22 November 2017 at 09:16 Charles Steinmetz
> wrote:
>
> Luciano wrote:
>
> > >
> > what you refer is the resistance relation r
The performance of virtually all CMOS gate sine to CMOS converters degrades
significantly once the signal at the gate input exceeds the supplies
sufficiently to cause the input protection circuitry to conduct. This effect is
very easy to measure with HCMOS.
Bruce
>
> On 20 November 2017
Oops I meat to say:
Thats a MOSFET variant of a fairly standard JFET-BJT feedback amplifier.
Bruce
> On 20 November 2017 at 11:47 Bruce Griffiths
> wrote:
>
>
> Hoi Attila
>
> That's a fairly standard JFET BJT negative feedback amp that's not
> us
Hoi Attila
That's a fairly standard JFET BJT negative feedback amp that's not usually
unstable.
The unity gain version has been employed as the input stage of various high
impedance oscilloscope preamps.
Bruce
>
> On 20 November 2017 at 11:21 Attila Kinali wrote:
>
> On Sun, 19 Nov
The 16 bit ADCs (at least the LTC lower sample rate ones ) tend to be a few
dBc/Hz quieter.
However the difference is < 12 dBc/Hz.
Bruce
>
> On 27 October 2017 at 14:35 Li Ang <379...@qq.com> wrote:
>
> Hi
> I just found Andrew recently post a phase noise measruement page on
> ww
One has to provide noise models that work with the Spice transient simulation
for all devices including resistors. Random number generators can be used but
they need to be independent and must not repeat during the entire simulation.
Bruce
>
> On 23 October 2017 at 10:25 Bruce Gri
If one for example wishes to estimate PN down to an offset of 1Hz then an
equivalent filter noise bandwidth of 0.1Hz or perhaps less is desirable (the PN
spectrum at low offsets is far from flat). To achive accurate noise estimates
a simulation time of at least 100 x the reciprocal of the equiv
Hoi Attila
Since close in phase noise can result from up conversion of supply noise etc
via circuit non linearities, using an AC analysis won't work.
Only transient simulation or perhaps analytical modelling of the various non
linearities will provide accurate estimates of upconverted PN. If yo
It appears to be merely an ECL comparator;
https://www.eevblog.com/forum/projects/yet-another-fast-edge-pulse-generator/
Bruce
> On 11 October 2017 at 09:14 Magnus Danielson
> wrote:
>
>
> Hi,
>
> On 10/10/2017 09:42 PM, Brooke Clarke wrote:
> > Hi Larry:
> >
> > How does it work.
> > When I
rk on.
Bruce
> On 04 October 2017 at 20:23 Attila Kinali wrote:
>
>
> Hoi Bruce,
>
>
> Thanks for the link. That's some nice data.
>
> On Wed, 4 Oct 2017 12:02:35 +1300 (NZDT)
> Bruce Griffiths wrote:
>
> > I have measured the PN of the LTC6957-4 at 1
Substrate currents biasing on parasitic devices in junction isolated process?
If so, then silicon on insulator CMOS may not exhibit the effect.
Bruce
> On 05 October 2017 at 10:18 Attila Kinali wrote:
>
>
> On Thu, 5 Oct 2017 10:11:37 +1300 (NZDT)
> Bruce Griffiths wrote:
&g
Just avoid current flowing in the input protection circuitry.
Once the protection circuit is activated the jitter increases significantly.
Bruce
>
> On 05 October 2017 at 04:21 Mark Sims wrote:
>
> Wenzel says an HC device tends to work better than an AC device in
> squarer applicati
John
Do you recall what the amplitude of the input signal to the Wenzel shaper was?
Since I used a 1:2 (3dB) terminated splitter for my measurements the input to
the splitter is the same as the Timepod reference signal amplitude
Bruce
> On 04 October 2017 at 14:12 John Miles wrote:
>
>
> > I
PN measurements for LTC6957-4 here:
http://www.ko4bb.com/getsimple/index.php?id=phase-noise-and-other-measurements-with-a-timepod
NB HX2410 plot below is for a Holzworth sine to CMOS converter.
Bruce
> On 04 October 2017 at 12:02 Bruce Griffiths
> wrote:
>
>
> Attila
Attila
I have measured the PN of the LTC6957-4 at 10MHz.
I could measure the PN of the TAPR variant of the Wenzel circuit as well as the
PN of the comparator based circuit (with CMOS output buffer).
Bruce
>
> On 04 October 2017 at 11:38 Attila Kinali wrote:
>
> Moin,
>
> The
HCPL7101 and similar 50MBaud optocouplers claim 50ps rms jitter.
Some non optical isolated couplers specify ~30ps jitter.
Bruce
>
> On 01 September 2017 at 00:12 Anders Wallin
> wrote:
>
> Hi all,
> I'm looking for a solution for galvanic isolation of a 1PPS signal-input
> to
>
Use an LTC6957 the CMOS output of which has its PN specified at frequencies up
to 300MHz.
Virtually any discrete circuit replacement with similar performance will
require a higher voltage and dissipate more power.
Bruce
>
> On 31 July 2017 at 09:25 Attila Kinali wrote:
>
> On Sun, 3
With a sinewave input LF feedback from the 74AC04 output to the shaper inputs
could be used to regulate the output duty cycle by adjusting the switching
threshold. However ensuring that the input amplitude is sufficiently large to
override potential LF oscillation. The LF feedback will also comp
The simplest solution to the divider and clock shaper is perhaps to use an
LTC6954. The LTC6954 offers PECL/CMOS and LVDS outputs together with a low
jitter (sub ps) programmable (SPI) divider (1-63).A couple of coax relays like
those from Dow Key microwave together with some hardline and a coup
A run of the mill 2 way power splitter has better than 10ps phase matching at
100MHz there are few digital devices that offer that degree of matching at best
they are usually 10x worse.
Bruce
>
> On 09 July 2017 at 06:58 Mark Sims wrote:
>
> Yes, they do show up... but usually for bi
They aren't idiot proof though.
I've seen them assembled backwards so that the contact occurred on the flat
springs with predictable results.
Bruce
>
> On 22 June 2017 at 19:19 Tom Van Baak wrote:
>
> Wes, Don,
>
> I am quite surprised at the negative reaction to Anderson Power
The monostable is a bit of a kludge.
Surely using a shift register to synchronise the PPS to 10MHz (or 1MHz) and
comparing (using the same gated integrator arrangement) the synchroniser delay
against a fixed pulse width generated by different taps on the same SR would be
somewhat more stable? Th
Your assumptions about my comment are unfounded. It was just intended as an
additional reason as to why direct connection to a comparator input isnt a good
idea with a high source impedance. The original post asked why a buffer was
needed.
Bruce
>
> On 21 June 2017 at 22:14 Charles Stein
If the source impendance at dc is 10k at dc a bias current of a few microamp
produces a dc offset of tens of millivolts which may be an issue if the signal
amplitude is low and has a low slew rate.
Bruce
>
> On 21 June 2017 at 09:11 Charles Steinmetz wrote:
>
> Attila wrote:
>
>
Its somewhat difficult to achieve a 1Megohm input with just a bipolar
comparator input stage especially if AC coupling is required.
Bruce
>
> On 20 June 2017 at 19:20 Attila Kinali wrote:
>
> Hi,
>
> I had a look at the PM668x[1] and CNT-90[2] schematics yesterday and
> notic
alpha quartz to beta quartz phase transition at 573C amongst other factors.
Bruce
>
> On 10 June 2017 at 12:31 Hal Murray wrote:
>
> > >
> > You can’t quite process a crystal at 300C, but you can get close.
> >
> > >
> What happens if you get it too hot or too
ttp://www.aspe.net/publications/Annual_2008/POSTERS/08UNCER/2643.PDF
Bruce
>
> On 06 June 2017 at 09:49 Bruce Griffiths
> wrote:
>
> Here's a NIST paper on Thermistor stability:
>
> http://nvlpubs.nist.gov/nistpubs/jres/83/jresv83
gt; quantified allusion that I have seen to this subject. Is there any actual
> > data available on the long term performance of NTC sensors?
> >
> > Roman
> >
> > > > >
> > > On 5 Jun 2017, at 9:53 AM, Br
Yes, I have a TEC mounted on a convection heatsink that illustrates that point.
Initially ice forms on the cold surface but eventually the heatsink temperature
rises sufficiently that the ice melts. A larger blown heatsink or perhaps a
water cooled heatsink would be necessary if this setup was in
Really??
The circuitry employed is something of a joke surely?
Relying on the MOSFET characteristics to limit warm up current is unwise.
The temperature sensor also would appear to suffer from large variations in
output from one part to another.
Bruce
>
> On 05 June 2017 at 01:21 "R. K
The other issue that needs to be considered is the drift in temperature sensor
characteristics when operated at a constant temperature (as is typical in a
continuously operated crystal oven). High quality thermistors can achieve
drifts of around 1mK/month. Its unlikely that something as complex
Thermomechanical fatigue can significantly reduce the lifetime of Peltier
devices if the ripple current flowing in the Peltier device is too high. This
can become an issue with switchmode drive to a Peltier cooler.
Bruce
>
> On 03 June 2017 at 11:02 jimlux wrote:
>
> On 6/2/17 2:51
With an AT crystal, manufacturing tolerances will likely ensure that the
inflection point slope is non zero whereas the same manufacturing tolerances
will merely change the turnover temperature. Its likely that a more
manufacturable design will result if one operates at a turnover point (with th
CERN have flagged another potential issue with the 53230A in that every so
often seemingly randomly communications go hawire.
Bruce
>
> On 10 May 2017 at 04:46 "Richard (Rick) Karlquist"
> wrote:
>
> On 5/9/2017 12:05 AM, Poul-Henning Kamp wrote:
> >
>
> > >
> >
Use a USB or LSB mixer, it only requires a few more parts and a little
ingenuity.
Bruce
>
> On 27 April 2017 at 06:52 al wolfe wrote:
>
> I am surprised that no one has mentioned the idea of heterodyning a
> known frequency with the unknown to measure the unknown. I use a
> Mi
Reciprocal counter where one measures the period of the output of a divide by N
and then takes the reciprocal of this period multiplied by N as the frequency
of the divider input. With a 100MHz clock one can achieve ~ 0.01ppm resolution
for a 1 second averaging time. if one uses interpolators w
More precisely the active EFC range is +1.25 to +3.75V with an absolute minimum
of 0V and an absolute max of +5V.
At least this is the range that the pseudo differential AD7714 ADC inputs
monitoring the EFC are configured for.
Bruce
> On 16 April 2017 at 14:57 Bruce Griffiths wr
0 to +5V dc max, however only the 0 to 2.5V range appears measurable by the
AD7714 ADC on the PCB.
Increasing the EFC voltage decreases the capacitance in series with the crystal
requiring an increase in the inductance exhibited by the crystal hence
requiring a lower oscillator frequency.
Bruc
Tom
#1 proved useful when this sub assembly failed (no 10MHz output) in my E1938A.
Someday I'll disassemble it to see what exactly failed.
Also have #3 which works well when one figures out the connections on the PCB
and the unusual backplane connector.
Bruce
>
> On 16 April 2017 at 00
Typically External Cavity diode lasers use either the Littrow or the
Littman-Metcalf configurations.
A typical Littrow configuration is:
http://www.moglabs.com/uploads/2/4/2/1/24212474/manual_ecd_rev4.20.pdf
Alternatively a cat eye external cavity can be used:
http://www.moglabs.com/uploads/2/
The gold standard is a random pulse source.
Using something like a SPAD as the source of random pulses is popular as the
average rate can be easily adjusted by changing the light level. It also avoids
using radioactive sources.
Bruce
> On 03 April 2017 at 15:05 Bruce Griffiths wr
A protection diode needs to also have a fast turn on with little or no
overshoot of the forward voltage.
Reverse recovery time can be an issue if one is relying on the clamp for
protection against a periodic overload such as when an input is overdriven by a
sinewave input and one wishes to mak
http://www.spacetechexpo.eu/assets/files/2015/Recent-Developments-in-Phase-Stable-Cables.pdf
is a more readily accessible source of data on coax cable delay tempco et.
Bruce
>
> On 04 April 2017 at 00:13 Bruce Griffiths
> wrote:
>
> Copper jacketed low density PTFE
On Mon, 3 Apr 2017 15:05:55 +1200 (NZST)
> Bruce Griffiths wrote:
>
> > >
> > For even more fun you could try to detect the PTFE phase change at
> > around 20C using a cable with PTFE dielectric.
> >
> > >
> This will r
For even more fun you could try to detect the PTFE phase change at around 20C
using a cable with PTFE dielectric.
A pulse source with somewhat more pulse to pulse jitter may be more useful in
that averaging will occur over a wider range of fine interpolator codes.
Bruce
>
> On 03 April 2
Its usually not possible to uniquely assign individual channel delays in this
way, however swapping cables allows the cable delay mismatch to be eliminated
from the measurement of the differential delay between channels.
Eliminating the effect of cable delay mismatch can be useful when adjusting
rail-rail comparator may behave when common-mode biased in that
> region.
>
> On Fri, Mar 31, 2017 at 11:22 PM Bruce Griffiths
>
> wrote:
>
> > >
> > Attempting sub nanosecond timing with an actual 1Mohm source is an
> >
Attempting sub nanosecond timing with an actual 1Mohm source is an exercise in
futility. There are very few cases where one would want to attempt precision
timing measurements with such a high impedance source. The 1M pulldown on the
TICC input is merely intended to maintain a valid logic input
A single or dual supply CMOS output comparator should suffice together with
some diode clamps.
Since the TICC only resolves a few tens of picosec the choice of comparator etc
isnt critical.
LTC6752 (~$US2) or similar perhaps?
A single supply comparator should suffice unless you want to measur
Attila
Differential inputs, either LVDS or PECL compatible, together with a fast
single supply comparator for the CMOS to PECL to LVDS/differential PECL would
be the conservative approach. Ultra fast comparators with aaa delay belo
2ns are readilyy available.
Alternatively a CMOS t
Mohammad
The LTC6957-4 is inputs are intended to be AC coupled.
With AC coupling a variable rate pulse will experience varying switching
thresholds.
A constant fraction discriminator minimises timing walk when the pulse
amplitude varies whilst the ristetime remains constant.
If the pulse ri
An Early (~1980?) NS/FEI paper on optically pumped cesium beam tubes:
http://tf.nist.gov/general/pdf/732.pdf
Bruce
>
> On 18 March 2017 at 17:28 "Richard (Rick) Karlquist"
> wrote:
>
> Len Cutler was all set to build an optically
> pumped Cs beam 20 years ago. Even then, he could
The apparent drift will be determined largely by that of the reference
oscillator due to the embedded continuous interpolator calibration. Placing it
in an oven will probably degrade the resolution due to the bin size tempco.
All time interval instruments have an offset between channels, This is
The datasheet is less than convincing.
The change in resolution/noise with time delay isnt well documented.
Performance may differ when a 1MHz reference clock is used as opposed to the
10MHz clock they appear to have used for some of the plots on the datasheet.
The customer support person appears
> >>
> >> This is for a high stability part. The list does keep going on for a
> >> while, but that should
> >> give you a pretty good idea.
> >>
> >> Bob
> >>
> >>> On Mar 15, 2017, at 3:11 AM, Gilles Clement
>
; > > Hi,
> > > So what is the « best » design for DIY a high stability OCVXO
> > > ?
> > > I am looking after one, needed for an exotic frequency :
> > > 5184kHZ
> > > Thx,
> > > G
y : 5184kHZ
> Thx,
> Gilles.
>
> > >
> > Le 14 mars 2017 à 18:02, Richard (Rick) Karlquist
> > a écrit :
> >
> > On 3/14/2017 4:03 AM, Bruce Griffiths wrote:
> >
> > > > >
> > >
the amplitude
etc).
The E1938A bridged T oscillator along with some of Driscoll's many XO circuits
are simpler and more effective.
Bruce
> On 15 March 2017 at 06:02 "Richard (Rick) Karlquist"
> wrote:
>
>
>
>
> On 3/14/2017 4:03 AM, Bruce Gr
1 - 100 of 3058 matches
Mail list logo
