Module Name: src
Committed By: jmcneill
Date: Sun Dec 7 18:32:13 UTC 2014
Modified Files:
src/sys/arch/arm/allwinner: awin_board.c awin_gpio.c awin_intr.h
awin_io.c awin_ir.c awin_reg.h awin_var.h
src/sys/arch/evbarm/awin: awin_start.S
src/sys/arch/evbarm/conf: ALLWINNER_A80
Log Message:
Add A80 PIO L,M,N and A80 CIR (RX) support.
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/allwinner/awin_board.c \
src/sys/arch/arm/allwinner/awin_var.h
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/allwinner/awin_gpio.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/allwinner/awin_intr.h
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/allwinner/awin_io.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/allwinner/awin_ir.c
cvs rdiff -u -r1.70 -r1.71 src/sys/arch/arm/allwinner/awin_reg.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/evbarm/awin/awin_start.S
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/evbarm/conf/ALLWINNER_A80
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_board.c
diff -u src/sys/arch/arm/allwinner/awin_board.c:1.32 src/sys/arch/arm/allwinner/awin_board.c:1.33
--- src/sys/arch/arm/allwinner/awin_board.c:1.32 Sun Dec 7 15:00:37 2014
+++ src/sys/arch/arm/allwinner/awin_board.c Sun Dec 7 18:32:13 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_board.c,v 1.32 2014/12/07 15:00:37 jmcneill Exp $ */
+/* $NetBSD: awin_board.c,v 1.33 2014/12/07 18:32:13 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -36,7 +36,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.32 2014/12/07 15:00:37 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.33 2014/12/07 18:32:13 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -58,6 +58,9 @@ __KERNEL_RCSID(1, "$NetBSD: awin_board.c
#include <arm/cortex/gtmr_var.h>
bus_space_handle_t awin_core_bsh;
+#if defined(ALLWINNER_A80)
+bus_space_handle_t awin_rcpus_bsh;
+#endif
struct arm32_bus_dma_tag awin_dma_tag = {
_BUS_DMAMAP_FUNCS,
@@ -190,6 +193,14 @@ awin_bootstrap(vaddr_t iobase, vaddr_t u
__func__, "io", error);
KASSERT(awin_core_bsh == iobase);
+#ifdef ALLWINNER_A80
+ error = bus_space_map(&awin_bs_tag, AWIN_A80_RCPUS_PBASE,
+ AWIN_A80_RCPUS_SIZE, 0, &awin_rcpus_bsh);
+ if (error)
+ panic("%s: failed to map awin %s registers: %d",
+ __func__, "rcpus", error);
+#endif
+
#ifdef VERBOSE_INIT_ARM
printf("CPU Speed is");
#endif
Index: src/sys/arch/arm/allwinner/awin_var.h
diff -u src/sys/arch/arm/allwinner/awin_var.h:1.32 src/sys/arch/arm/allwinner/awin_var.h:1.33
--- src/sys/arch/arm/allwinner/awin_var.h:1.32 Sun Dec 7 00:36:26 2014
+++ src/sys/arch/arm/allwinner/awin_var.h Sun Dec 7 18:32:13 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_var.h,v 1.32 2014/12/07 00:36:26 jmcneill Exp $ */
+/* $NetBSD: awin_var.h,v 1.33 2014/12/07 18:32:13 jmcneill Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -93,6 +93,9 @@ struct awin_dma_channel;
extern struct bus_space awin_bs_tag;
extern struct bus_space awin_a4x_bs_tag;
extern bus_space_handle_t awin_core_bsh;
+#if defined(ALLWINNER_A80)
+extern bus_space_handle_t awin_rcpus_bsh;
+#endif
extern struct arm32_bus_dma_tag awin_dma_tag;
extern struct arm32_bus_dma_tag awin_coherent_dma_tag;
Index: src/sys/arch/arm/allwinner/awin_gpio.c
diff -u src/sys/arch/arm/allwinner/awin_gpio.c:1.15 src/sys/arch/arm/allwinner/awin_gpio.c:1.16
--- src/sys/arch/arm/allwinner/awin_gpio.c:1.15 Fri Dec 5 11:53:43 2014
+++ src/sys/arch/arm/allwinner/awin_gpio.c Sun Dec 7 18:32:13 2014
@@ -35,7 +35,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_gpio.c,v 1.15 2014/12/05 11:53:43 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_gpio.c,v 1.16 2014/12/07 18:32:13 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -226,6 +226,17 @@ static struct awin_gpio_pin_group {
.grp_pin_mask = 0,
.grp_nc_name = "nc-pm",
},
+ [13] = {
+ .grp_offset = 0,
+ .grp_gc_tag = {
+ .gp_cookie = &pin_groups[13],
+ .gp_pin_read = awin_gpio_pin_read,
+ .gp_pin_write = awin_gpio_pin_write,
+ .gp_pin_ctl = awin_gpio_pin_ctl,
+ },
+ .grp_pin_mask = 0,
+ .grp_nc_name = "nc-pn",
+ },
};
@@ -448,6 +459,8 @@ awin_gpio_init(void)
pin_groups[12].grp_offset = AWIN_A31_CPUPIO_OFFSET +
1 * AWIN_PIO_GRP_SIZE;
pin_groups[12].grp_pin_mask = __BIT(AWIN_A31_PIO_PM_PINS) - 1;
+ pin_groups[13].grp_offset = 0; /* PN */
+ pin_groups[13].grp_pin_mask = 0; /* PN */
} else if (awin_chip_id() == AWIN_CHIP_ID_A80) {
pin_groups[0].grp_pin_mask = __BIT(AWIN_A80_PIO_PA_PINS) - 1;
pin_groups[0].grp_offset = AWIN_A80_PIO_OFFSET +
@@ -479,10 +492,15 @@ awin_gpio_init(void)
pin_groups[9].grp_pin_mask = 0; /* PJ */
pin_groups[10].grp_offset = 0; /* PK */
pin_groups[10].grp_pin_mask = 0; /* PK */
- pin_groups[11].grp_offset = 0; /* PL */
- pin_groups[11].grp_pin_mask = 0; /* PL */
- pin_groups[12].grp_offset = 0; /* PM */
- pin_groups[12].grp_pin_mask = 0; /* PM */
+ pin_groups[11].grp_offset = AWIN_A80_RPIO_OFFSET +
+ 0 * AWIN_PIO_GRP_SIZE;
+ pin_groups[11].grp_pin_mask = __BIT(AWIN_A80_PIO_PL_PINS) - 1;
+ pin_groups[12].grp_offset = AWIN_A80_RPIO_OFFSET +
+ 1 * AWIN_PIO_GRP_SIZE;
+ pin_groups[12].grp_pin_mask = __BIT(AWIN_A80_PIO_PM_PINS) - 1;
+ pin_groups[13].grp_offset = AWIN_A80_RPIO_OFFSET +
+ 2 * AWIN_PIO_GRP_SIZE;
+ pin_groups[13].grp_pin_mask = __BIT(AWIN_A80_PIO_PN_PINS) - 1;
}
for (u_int i = 0; i < __arraycount(pin_groups); i++) {
@@ -491,8 +509,16 @@ awin_gpio_init(void)
if (grp->grp_offset == 0)
continue;
- bus_space_subregion(sc->sc_bst, awin_core_bsh,
- grp->grp_offset, AWIN_PIO_GRP_SIZE, &grp->grp_bsh);
+#if defined(ALLWINNER_A80)
+ if (i >= 11) {
+ bus_space_subregion(sc->sc_bst, awin_rcpus_bsh,
+ grp->grp_offset, AWIN_PIO_GRP_SIZE, &grp->grp_bsh);
+ } else
+#endif
+ {
+ bus_space_subregion(sc->sc_bst, awin_core_bsh,
+ grp->grp_offset, AWIN_PIO_GRP_SIZE, &grp->grp_bsh);
+ }
for (u_int j = 0; j < 4; j++) {
grp->grp_cfg.cfg[j] = bus_space_read_4(sc->sc_bst,
@@ -538,6 +564,10 @@ awin_gpio_pinset_available(const struct
KASSERT(
('A' <= req->pinset_group && req->pinset_group <= 'I') ||
('L' <= req->pinset_group && req->pinset_group <= 'M'));
+ } else if (awin_chip_id() == AWIN_CHIP_ID_A80) {
+ KASSERT(
+ ('A' <= req->pinset_group && req->pinset_group <= 'I') ||
+ ('L' <= req->pinset_group && req->pinset_group <= 'N'));
} else {
KASSERT('A' <= req->pinset_group && req->pinset_group <= 'I');
}
@@ -744,6 +774,9 @@ awin_gpio_pin_reserve(const char *name,
if (awin_chip_id() == AWIN_CHIP_ID_A31) {
KASSERT(('A' <= pin_data[2] && pin_data[2] <= 'I') ||
('L' <= pin_data[2] && pin_data[2] <= 'M'));
+ } else if (awin_chip_id() == AWIN_CHIP_ID_A80) {
+ KASSERT(('A' <= pin_data[2] && pin_data[2] <= 'I') ||
+ ('L' <= pin_data[2] && pin_data[2] <= 'N'));
} else {
KASSERT('A' <= pin_data[2] && pin_data[2] <= 'I');
}
Index: src/sys/arch/arm/allwinner/awin_intr.h
diff -u src/sys/arch/arm/allwinner/awin_intr.h:1.13 src/sys/arch/arm/allwinner/awin_intr.h:1.14
--- src/sys/arch/arm/allwinner/awin_intr.h:1.13 Sun Dec 7 00:36:26 2014
+++ src/sys/arch/arm/allwinner/awin_intr.h Sun Dec 7 18:32:13 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_intr.h,v 1.13 2014/12/07 00:36:26 jmcneill Exp $ */
+/* $NetBSD: awin_intr.h,v 1.14 2014/12/07 18:32:13 jmcneill Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -198,6 +198,7 @@
#define AWIN_A80_IRQ_WATCHDOG 56
#define AWIN_A80_IRQ_KEYADC 62
#define AWIN_A80_IRQ_NMI 64
+#define AWIN_A80_IRQ_R_CIR 69
#define AWIN_A80_IRQ_R_RSB 71
#define AWIN_A80_IRQ_DMA 82
#define AWIN_A80_IRQ_HSTIMER0 83
Index: src/sys/arch/arm/allwinner/awin_io.c
diff -u src/sys/arch/arm/allwinner/awin_io.c:1.38 src/sys/arch/arm/allwinner/awin_io.c:1.39
--- src/sys/arch/arm/allwinner/awin_io.c:1.38 Sun Dec 7 00:36:26 2014
+++ src/sys/arch/arm/allwinner/awin_io.c Sun Dec 7 18:32:13 2014
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.38 2014/12/07 00:36:26 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.39 2014/12/07 18:32:13 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -182,6 +182,7 @@ static const struct awin_locators awin_l
{ "awinir", OFFANDSIZE(IR0), 0, AWIN_IRQ_IR0, A10|A20 },
{ "awinir", OFFANDSIZE(IR1), 1, AWIN_IRQ_IR1, A10|A20 },
{ "awinir", OFFANDSIZE(A31_CIR), NOPORT, AWIN_A31_IRQ_CIR, A31 },
+ { "awinir", OFFANDSIZE(A80_CIR), NOPORT, AWIN_A80_IRQ_R_CIR, A80 },
};
static int
@@ -221,14 +222,13 @@ awinio_attach(device_t parent, device_t
switch (awin_chip_id()) {
#ifdef ALLWINNER_A80
case AWIN_CHIP_ID_A80:
+ sc->sc_a80_rcpus_bsh = awin_rcpus_bsh;
bus_space_subregion(sc->sc_bst, sc->sc_bsh,
AWIN_A80_CCU_SCLK_OFFSET, 0x1000, &sc->sc_ccm_bsh);
bus_space_map(sc->sc_bst, AWIN_A80_USB_PBASE,
AWIN_A80_USB_SIZE, 0, &sc->sc_a80_usb_bsh);
bus_space_map(sc->sc_bst, AWIN_A80_CORE2_PBASE,
AWIN_A80_CORE2_SIZE, 0, &sc->sc_a80_core2_bsh);
- bus_space_map(sc->sc_bst, AWIN_A80_RCPUS_PBASE,
- AWIN_A80_RCPUS_SIZE, 0, &sc->sc_a80_rcpus_bsh);
break;
#endif
default:
Index: src/sys/arch/arm/allwinner/awin_ir.c
diff -u src/sys/arch/arm/allwinner/awin_ir.c:1.4 src/sys/arch/arm/allwinner/awin_ir.c:1.5
--- src/sys/arch/arm/allwinner/awin_ir.c:1.4 Sat Nov 15 14:56:18 2014
+++ src/sys/arch/arm/allwinner/awin_ir.c Sun Dec 7 18:32:13 2014
@@ -1,4 +1,6 @@
-/* $NetBSD: awin_ir.c,v 1.4 2014/11/15 14:56:18 jmcneill Exp $ */
+/* $NetBSD: awin_ir.c,v 1.5 2014/12/07 18:32:13 jmcneill Exp $ */
+
+#define AWIN_IR_DEBUG
/*-
* Copyright (c) 2014 Jared D. McNeill <[email protected]>
@@ -29,7 +31,7 @@
#include "opt_ddb.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_ir.c,v 1.4 2014/11/15 14:56:18 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_ir.c,v 1.5 2014/12/07 18:32:13 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -48,7 +50,7 @@ __KERNEL_RCSID(0, "$NetBSD: awin_ir.c,v
#include <dev/ir/cirio.h>
#include <dev/ir/cirvar.h>
-#define AWIN_IR_RXSTA_MASK __BITS(7,0)
+#define AWIN_IR_RXSTA_MASK __BITS(6,0)
struct awin_ir_softc {
device_t sc_dev;
@@ -116,13 +118,15 @@ awin_ir_attach(device_t parent, device_t
struct awinio_attach_args * const aio = aux;
const struct awin_locators * const loc = &aio->aio_loc;
struct ir_attach_args iaa;
+ bus_space_handle_t bsh = awin_chip_id() == AWIN_CHIP_ID_A80 ?
+ aio->aio_a80_rcpus_bsh : aio->aio_core_bsh;
sc->sc_dev = self;
sc->sc_bst = aio->aio_core_bst;
sc->sc_port = loc->loc_port;
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_IR);
cv_init(&sc->sc_cv, "awinir");
- bus_space_subregion(sc->sc_bst, aio->aio_core_bsh,
+ bus_space_subregion(sc->sc_bst, bsh,
loc->loc_offset, loc->loc_size, &sc->sc_bsh);
aprint_naive("\n");
@@ -187,7 +191,35 @@ awin_ir_init(struct awin_ir_softc *sc, s
AWIN_A31_PRCM_CIR_CLK_REG, clk);
bus_space_unmap(sc->sc_bst, prcm_bsh, prcm_size);
- } else {
+ } else if (awin_chip_id() == AWIN_CHIP_ID_A80) {
+ const struct awin_gpio_pinset pinset =
+ { 'L', AWIN_A80_PIO_PL_CIR_FUNC, AWIN_A80_PIO_PL_CIR_PINS,
+ GPIO_PIN_PULLUP };
+ bus_space_handle_t prcm_bsh;
+ bus_size_t prcm_size = 0x200;
+
+ bus_space_subregion(sc->sc_bst, aio->aio_a80_rcpus_bsh,
+ AWIN_A80_RPRCM_OFFSET, prcm_size, &prcm_bsh);
+
+ awin_gpio_pinset_acquire(&pinset);
+
+ awin_reg_set_clear(sc->sc_bst, prcm_bsh,
+ AWIN_A80_RPRCM_APB0_GATING_REG,
+ AWIN_A80_RPRCM_APB0_GATING_CIR, 0);
+ awin_reg_set_clear(sc->sc_bst, prcm_bsh,
+ AWIN_A80_RPRCM_APB0_RST_REG,
+ AWIN_A80_RPRCM_APB0_RST_CIR, 0);
+ awin_reg_set_clear(sc->sc_bst, prcm_bsh,
+ AWIN_A80_RPRCM_CIR_CLK_REG,
+ __SHIFTIN(AWIN_CLK_SRC_SEL_CIR_HOSC, AWIN_CLK_SRC_SEL) |
+ __SHIFTIN(7, AWIN_CLK_DIV_RATIO_M) |
+ __SHIFTIN(0, AWIN_CLK_DIV_RATIO_N) |
+ AWIN_CLK_ENABLE,
+ AWIN_CLK_SRC_SEL |
+ AWIN_CLK_DIV_RATIO_M | AWIN_CLK_DIV_RATIO_N);
+
+ bus_space_unmap(sc->sc_bst, prcm_bsh, prcm_size);
+ } else {
const struct awin_gpio_pinset pinset =
{ 'B', AWIN_PIO_PB_IR0_FUNC, AWIN_PIO_PB_IR0_PINS };
uint32_t clk;
@@ -253,7 +285,8 @@ awin_ir_open(void *priv, int flag, int m
cir |= __SHIFTIN(0, AWIN_IR_CIR_SCS2);
cir |= __SHIFTIN(8, AWIN_IR_CIR_NTHR);
cir |= __SHIFTIN(2, AWIN_IR_CIR_ITHR);
- if (awin_chip_id() == AWIN_CHIP_ID_A31) {
+ if (awin_chip_id() == AWIN_CHIP_ID_A31 ||
+ awin_chip_id() == AWIN_CHIP_ID_A80) {
cir |= __SHIFTIN(99, AWIN_IR_CIR_ATHR);
cir |= __SHIFTIN(0, AWIN_IR_CIR_ATHC);
}
@@ -264,6 +297,8 @@ awin_ir_open(void *priv, int flag, int m
IR_WRITE(sc, AWIN_IR_RXSTA_REG, AWIN_IR_RXSTA_MASK);
rxint = AWIN_IR_RXINT_RPEI_EN;
+ rxint |= AWIN_IR_RXINT_ROI_EN;
+ rxint |= AWIN_IR_RXINT_RAI_EN;
rxint |= __SHIFTIN(31, AWIN_IR_RXINT_RAL);
IR_WRITE(sc, AWIN_IR_RXINT_REG, rxint);
Index: src/sys/arch/arm/allwinner/awin_reg.h
diff -u src/sys/arch/arm/allwinner/awin_reg.h:1.70 src/sys/arch/arm/allwinner/awin_reg.h:1.71
--- src/sys/arch/arm/allwinner/awin_reg.h:1.70 Sun Dec 7 16:20:33 2014
+++ src/sys/arch/arm/allwinner/awin_reg.h Sun Dec 7 18:32:13 2014
@@ -2708,6 +2708,8 @@ struct awin_a31_dma_desc {
* These offsets are relative to AWIN_A80_RCPUS_PBASE
*/
#define AWIN_A80_RPRCM_OFFSET 0x00001400
+#define AWIN_A80_CIR_OFFSET 0x00002000
+#define AWIN_A80_RPIO_OFFSET 0x00002c00
#define AWIN_A80_RSB_OFFSET 0x00003400
#define AWIN_A80_SDMMC_COMM_SDC_RESET_SW __BIT(18)
@@ -2813,6 +2815,13 @@ struct awin_a31_dma_desc {
#define AWIN_A80_SYS_CTRL_EMAC_CLK_REG 0x0030
#define AWIN_A80_SYS_CTRL_DISP_MUX_CTRL_REG 0x0038
+#define AWIN_A80_RPRCM_APB0_GATING_REG 0x0028
+#define AWIN_A80_RPRCM_CIR_CLK_REG 0x0054
+#define AWIN_A80_RPRCM_APB0_RST_REG 0x00b0
+
+#define AWIN_A80_RPRCM_APB0_GATING_CIR __BIT(1)
+#define AWIN_A80_RPRCM_APB0_RST_CIR __BIT(1)
+
#define AWIN_A80_RSB_CMD_REG 0x002c
#define AWIN_A80_RSB_DAR_REG 0x0030
@@ -2864,4 +2873,12 @@ struct awin_a31_dma_desc {
#define AWIN_A80_PIO_PH_UART0_FUNC 2
#define AWIN_A80_PIO_PH_UART0_PINS 0x00003000 /* PH pins 13-12 */
+#define AWIN_A80_PIO_PL_PINS 14
+#define AWIN_A80_PIO_PL_CIR_FUNC 3
+#define AWIN_A80_PIO_PL_CIR_PINS 0x00000040 /* PL pin 6 */
+
+#define AWIN_A80_PIO_PM_PINS 16
+
+#define AWIN_A80_PIO_PN_PINS 2
+
#endif /* _ARM_ALLWINNER_AWIN_REG_H_ */
Index: src/sys/arch/evbarm/awin/awin_start.S
diff -u src/sys/arch/evbarm/awin/awin_start.S:1.6 src/sys/arch/evbarm/awin/awin_start.S:1.7
--- src/sys/arch/evbarm/awin/awin_start.S:1.6 Wed Nov 5 17:46:51 2014
+++ src/sys/arch/evbarm/awin/awin_start.S Sun Dec 7 18:32:13 2014
@@ -41,7 +41,7 @@
#include <arm/allwinner/awin_reg.h>
#include <evbarm/awin/platform.h>
-RCSID("$NetBSD: awin_start.S,v 1.6 2014/11/05 17:46:51 matt Exp $")
+RCSID("$NetBSD: awin_start.S,v 1.7 2014/12/07 18:32:13 jmcneill Exp $")
#if defined(VERBOSE_INIT_ARM)
#define XPUTC(n) mov r0, n; bl xputc
@@ -463,6 +463,18 @@ ASEND(a31_mpinit)
(AWIN_CORE_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+#if defined(ALLWINNER_A80)
+ /* Map AWIN RCPUS (for PIO L-N) */
+ MMU_INIT(AWIN_A80_RCPUS_VBASE, AWIN_A80_RCPUS_PBASE,
+ (AWIN_A80_RCPUS_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+
+ /* Map AWIN RCPUS (for PIO L-N) */
+ MMU_INIT(AWIN_A80_RCPUS_PBASE, AWIN_A80_RCPUS_PBASE,
+ (AWIN_A80_RCPUS_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+#endif
+
/* end of table */
MMU_INIT(0, 0, 0, 0)
Index: src/sys/arch/evbarm/conf/ALLWINNER_A80
diff -u src/sys/arch/evbarm/conf/ALLWINNER_A80:1.10 src/sys/arch/evbarm/conf/ALLWINNER_A80:1.11
--- src/sys/arch/evbarm/conf/ALLWINNER_A80:1.10 Sun Dec 7 14:25:09 2014
+++ src/sys/arch/evbarm/conf/ALLWINNER_A80 Sun Dec 7 18:32:13 2014
@@ -1,4 +1,4 @@
-# $NetBSD: ALLWINNER_A80,v 1.10 2014/12/07 14:25:09 jmcneill Exp $
+# $NetBSD: ALLWINNER_A80,v 1.11 2014/12/07 18:32:13 jmcneill Exp $
#
# ALLWINNER_A80 - Allwinner A80 boards (Cubieboard4, OptimusBoard, etc)
#
@@ -241,8 +241,8 @@ com0 at awinio? port 0 # UART0 (conso
options CONADDR=0x07000000, CONSPEED=115200
# Consumer IR
-#awinir0 at awinio?
-#cir0 at awinir0
+awinir0 at awinio?
+cir0 at awinir0
# Watchdog timers
awinwdt* at awinio?
