Triode wrote: > It's a different output from the imx35 chip and has a different device > driver. So its not certain the soc can handle it at present. I've not > yet looked at this again.
I see. By the way, I read Jack's post. Seems the other thread is not active. Quote below just in case you haven't read it. JIJ3 wrote: > Triode, thinking some more about this. > > If DIV2 is really set to 1 for both 48K and 96K, then PM must be > different for these two cases (unless external logic changes the master > clock rate, which would seem silly). I assume the master clock for 48K, > 96K, (and therefore 192K) is 24.476 Mhz. Then 48K requires a divide by > 16 to generate a 1.5298 Mhz bit clock, 96 K would require a divide by 8, > (and 192K a divide by 4). If DIV2 is set to one for 48K and 96K, then PV > would have to be 3 for 48K, 1 for 96K (and zero for 192K, if DIV2 stayed > at 1). > > I know you're very busy with the USB work, but when you get a chance you > might want to look closely at the DIV2 and PM bit settings for all > cases. > > Jack ------------------------------------------------------------------------ mldb's Profile: http://forums.slimdevices.com/member.php?userid=56216 View this thread: http://forums.slimdevices.com/showthread.php?t=94512 _______________________________________________ Touch mailing list Touch@lists.slimdevices.com http://lists.slimdevices.com/mailman/listinfo/touch
