>> + cfi_array->amd_bypass_supported = 0; > do you need to set this ? doesnt it always start out at 0 via the bus driver > itself declaring it as 0 ? You mean that it should be zeroed in the urj_flash_cfi_detect? >> The mpc837x.patch improves the programming speed via the mpc837x bus >> using the bypass flashing method. > but does that always work ? or does it only work when you're programming > flashes that are bypass_supported==1 ? > -mike In latching mode the bus write cycle consists of the following: Put out address to the bus and load it to the latch. Until you do not write new address to the latch it holds it. And then you write the data to the data bus.
So if in two consecutive bus cycle uses the same address the latching cycle is unneccessary because the latch holds the address written to it previously. So to summarize: Yes it works with flashes without bypass support. I have tested it because these flashes can be written in non bypass mode too. ------------------------------------------------------------------------------ Get a FREE DOWNLOAD! and learn more about uberSVN rich system, user administration capabilities and model configuration. Take the hassle out of deploying and managing Subversion and the tools developers use with it. http://p.sf.net/sfu/wandisco-d2d-2 _______________________________________________ UrJTAG-development mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/urjtag-development
