On Wednesday 11 July 2012 01:35:20 Jon Elson did opine: > Gene Heskett wrote: > > On Tuesday 10 July 2012 23:59:04 Kasey Matejcek did opine: > >> It set to 1000 > >> setp ppmc.0.pwm.03.scale 1000 > >> > >> when you watch ppmc.0.pwm.03.value it changes from 1000 to -1000 and > >> back and forth it goes > >> when I set s 50 rpm then after some time ppmc.0.pwm.03.value goes to > >> like 50 after some time but it still surges up and down and so does > >> the number if left long enough ppmc.0.pwm.03.value goes to 0 or some > >> really small number when the rpm is set lower than 100rpm but really > >> never get stable above 100 rpm it just keeps surging up and down > > > > One other question might be in order here, just to remove the > > possibility of a hidden low frequency pole in the feedback loop, what > > are you using for an interface between the pwmgen output, and the > > spindle motors own controller? > > He is using my PWM servo amplifiers, these are 4-quadrant PWM amps with > no smoothing or control loops in them. Motor voltage = DC supply * PWM > duty cycle. > So, I don't think that is it. I have done this on my minimill, but > without the closed-loop > part. It is not a stiff speed control, but it is free from instability, > of course. > > > Hmmm, but there IS one other possibility. If you command 100% duty > cycle of the PWM, the bootstrap capacitors that create the gate bias > for the high-side transistors > will run down. Then, the motor may surge about like Kasey describes. > So, that's > why in the univpwm_motion.hal file it has : > > setp ppmc.0.pwm.03.max-dc 0.95 > > which sets it to 95 % duty cycle. You could as a test change that to > 0.9 and see if > it makes any difference. But, usually 95% is plenty of headroom, even > 99% should work. > > In the partial file given by Kasey I did not see a frequency setting, as > in > > setp ppmc.0.pwm.00-03.freq 50000 > > for 50 KHz.
Yikes Jon. I have mine set for only 500hz, higher obviously limits the resolution of the control, at least in my system. I tried 10khz once but found I only had about 4 or 5 steps from creep to wide open due to the loss in base thread counts per output hz. Arturo told me once his stuff was happy at 100hz, and with the filtering on the op-amp, its actually a miller run up or run down. But at 100hz at min speed of about 1/3rd an rps, I could actually hear the motor being hammered gently. At the other end, I also have the max set to 99.0%, seems to be a usable timing. I am not done playing with it yet, and that output slew rate limiting 10uf capacitor will likely be a .1 uf when I put it back together the next time. The other cap on that board, also a 10uf, times the relay open/closure, and that had to be dropped to .1 else it was occasionally clearing the fuse. But that isn't germane to this... > If there is no such line in the file, I have no idea > what PWM frequency has been set, and that could cause a big problem. > But, if the X and Z axes work, that probably is not the problem. > This frequency is common to all axes on a UPC board. > > Jon Cheers, Gene -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) My web page: <http://coyoteden.dyndns-free.com:85/gene> is up! Trap full -- please empty. ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
