Hello again to all, I'm reviving this discussion because I started attempting to configure my setup to finally mount it on the machine (once it all works well off course).
Basically I'm using the 6i24 connected to a 7i52s for step output and to read 1 encoder. Here's where I have the first doubts, mostly because I don't do this too often. If I want to use the full 6 stepgens and 6 encoder inputs of the bitfile Peter made for my 6i24 I see on the dmesg that the encoder and stepens are distributed between P3 and P4 of the board. Is this ok? Because the 7i52s as you know only has one 50 pin flat cable port. I'm not planning to use that much encoders and steppers but this guides me to the next question. Is there an easy way to see the correspondence between the pins on the 6i24 and the ones on the 7i52s ? Because if I use only 3 stepgens and 1 encoder I can see they are all in the P4 connector and I have also some free I/Os on that connector too but I don't know how to identify them on the 7i52s other than start probing them one by one. Besides that, I need to modify the PIN file since I need the 7i52s to be plugged to P1 connector of the 6i24 (Notice that the 6i24 has three ports labelled P1, P3, P4). I'm downloading Xilinx ISE 14.7 to try to modify the original file that Peter made for me. Well, that's all for now, if you can help me a little bit I surely can make all this work this weekend hopefully. I also need to try the 7i44 but I need to understand this first. Thanks as always for your help and patience! El jue., 19 dic. 2019 a las 8:54, andy pugh (<bodge...@gmail.com>) escribió: > On Wed, 18 Dec 2019 at 22:32, Leonardo Marsaglia <ldmarsag...@gmail.com> > wrote: > > > Also thanks for the source files, I'll use them to compare with the > others > > and try to understand better how to make my own bit files. > > Just to clarify (for other readers, as you probably know this). If the > stepgen and encoder numbers are limited below maximum in the loadrt > hm2_pci line in the HAL then their pins revert to GPIO. > (But with so much smart-serial available, there is probably no reason > to use them) > > My lathe uses a 6i24, with a 7i44 and 7i49. That leaves one spare > 50-pin header. But with a 7i84 and 7i73 on the 7i44 that port is very > much spare. > > (wandering off topic) > The ultimate retrofit kit now would seem to be a combination of 7i94 > and STMBL drives. > Ethernet out of the PC, and digital end-to-end > > -- > atp > "A motorcycle is a bicycle with a pandemonium attachment and is > designed for the especial use of mechanical geniuses, daredevils and > lunatics." > — George Fitch, Atlanta Constitution Newspaper, 1912 > > > _______________________________________________ > Emc-users mailing list > Emc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-users > _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
