I tested this on Windows, using nVidia driver 195 on nv40, and it seems we are all partially wrong.
SM3 does indeed allow semantics unrelated to hardware resources. However, the semantic indices for any semantic type must be in the range 0-15, or D3DX will report a compiler error during shader compilation: error X2000: syntax error : unexpected token 'dcl_texcoord16' This is further confirmed by the following lines in d3d9types.h: #define MAXD3DDECLUSAGE D3DDECLUSAGE_SAMPLE #define MAXD3DDECLUSAGEINDEX 15 I would guess that these two 4-bit values are combined into an 8-bit value that is then passed directly to hardware like r600 which supports 8-bit semantic indices in hardware. Is this the case on Radeon? Is the 8-bit semantic table a feature of r300 too or only of r600+? In light of this, it may make sense to do some range limitation ourselves too. In particular, a good plan could be limiting all semantic indices to 0-15, except GENERIC, which could support a 0-127 range. This would allow to both directly take advantage of Radeon hardware, and let drivers that need to remap in software do so with direct lookup in a small array. ------------------------------------------------------------------------------ The Planet: dedicated and managed hosting, cloud storage, colocation Stay online with enterprise data centers and the best network in the business Choose flexible plans and management services without long-term contracts Personal 24x7 support from experience hosting pros just a phone call away. http://p.sf.net/sfu/theplanet-com _______________________________________________ Mesa3d-dev mailing list Mesa3d-dev@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mesa3d-dev
